qlge: bugfix: Fix register access error checking.
Some indexed registers do not have error bits. In these cases a value of zero should be used for error checking. Signed-off-by: Ron Mercer <ron.mercer@qlogic.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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459caf5a99
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939678f81a
@ -257,7 +257,7 @@ int ql_get_mac_addr_reg(struct ql_adapter *qdev, u32 type, u16 index,
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{
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status =
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ql_wait_reg_rdy(qdev,
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MAC_ADDR_IDX, MAC_ADDR_MW, MAC_ADDR_E);
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MAC_ADDR_IDX, MAC_ADDR_MW, 0);
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if (status)
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goto exit;
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ql_write32(qdev, MAC_ADDR_IDX, (offset++) | /* offset */
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@ -265,13 +265,13 @@ int ql_get_mac_addr_reg(struct ql_adapter *qdev, u32 type, u16 index,
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MAC_ADDR_ADR | MAC_ADDR_RS | type); /* type */
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status =
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ql_wait_reg_rdy(qdev,
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MAC_ADDR_IDX, MAC_ADDR_MR, MAC_ADDR_E);
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MAC_ADDR_IDX, MAC_ADDR_MR, 0);
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if (status)
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goto exit;
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*value++ = ql_read32(qdev, MAC_ADDR_DATA);
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status =
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ql_wait_reg_rdy(qdev,
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MAC_ADDR_IDX, MAC_ADDR_MW, MAC_ADDR_E);
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MAC_ADDR_IDX, MAC_ADDR_MW, 0);
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if (status)
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goto exit;
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ql_write32(qdev, MAC_ADDR_IDX, (offset++) | /* offset */
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@ -279,14 +279,14 @@ int ql_get_mac_addr_reg(struct ql_adapter *qdev, u32 type, u16 index,
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MAC_ADDR_ADR | MAC_ADDR_RS | type); /* type */
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status =
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ql_wait_reg_rdy(qdev,
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MAC_ADDR_IDX, MAC_ADDR_MR, MAC_ADDR_E);
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MAC_ADDR_IDX, MAC_ADDR_MR, 0);
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if (status)
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goto exit;
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*value++ = ql_read32(qdev, MAC_ADDR_DATA);
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if (type == MAC_ADDR_TYPE_CAM_MAC) {
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status =
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ql_wait_reg_rdy(qdev,
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MAC_ADDR_IDX, MAC_ADDR_MW, MAC_ADDR_E);
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MAC_ADDR_IDX, MAC_ADDR_MW, 0);
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if (status)
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goto exit;
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ql_write32(qdev, MAC_ADDR_IDX, (offset++) | /* offset */
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@ -294,7 +294,7 @@ int ql_get_mac_addr_reg(struct ql_adapter *qdev, u32 type, u16 index,
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MAC_ADDR_ADR | MAC_ADDR_RS | type); /* type */
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status =
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ql_wait_reg_rdy(qdev, MAC_ADDR_IDX,
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MAC_ADDR_MR, MAC_ADDR_E);
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MAC_ADDR_MR, 0);
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if (status)
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goto exit;
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*value++ = ql_read32(qdev, MAC_ADDR_DATA);
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@ -344,7 +344,7 @@ static int ql_set_mac_addr_reg(struct ql_adapter *qdev, u8 *addr, u32 type,
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status =
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ql_wait_reg_rdy(qdev,
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MAC_ADDR_IDX, MAC_ADDR_MW, MAC_ADDR_E);
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MAC_ADDR_IDX, MAC_ADDR_MW, 0);
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if (status)
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goto exit;
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ql_write32(qdev, MAC_ADDR_IDX, (offset++) | /* offset */
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@ -353,7 +353,7 @@ static int ql_set_mac_addr_reg(struct ql_adapter *qdev, u8 *addr, u32 type,
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ql_write32(qdev, MAC_ADDR_DATA, lower);
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status =
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ql_wait_reg_rdy(qdev,
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MAC_ADDR_IDX, MAC_ADDR_MW, MAC_ADDR_E);
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MAC_ADDR_IDX, MAC_ADDR_MW, 0);
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if (status)
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goto exit;
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ql_write32(qdev, MAC_ADDR_IDX, (offset++) | /* offset */
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@ -362,7 +362,7 @@ static int ql_set_mac_addr_reg(struct ql_adapter *qdev, u8 *addr, u32 type,
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ql_write32(qdev, MAC_ADDR_DATA, upper);
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status =
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ql_wait_reg_rdy(qdev,
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MAC_ADDR_IDX, MAC_ADDR_MW, MAC_ADDR_E);
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MAC_ADDR_IDX, MAC_ADDR_MW, 0);
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if (status)
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goto exit;
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ql_write32(qdev, MAC_ADDR_IDX, (offset) | /* offset */
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@ -400,7 +400,7 @@ static int ql_set_mac_addr_reg(struct ql_adapter *qdev, u8 *addr, u32 type,
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status =
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ql_wait_reg_rdy(qdev,
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MAC_ADDR_IDX, MAC_ADDR_MW, MAC_ADDR_E);
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MAC_ADDR_IDX, MAC_ADDR_MW, 0);
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if (status)
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goto exit;
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ql_write32(qdev, MAC_ADDR_IDX, offset | /* offset */
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@ -431,13 +431,13 @@ int ql_get_routing_reg(struct ql_adapter *qdev, u32 index, u32 *value)
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if (status)
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goto exit;
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status = ql_wait_reg_rdy(qdev, RT_IDX, RT_IDX_MW, RT_IDX_E);
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status = ql_wait_reg_rdy(qdev, RT_IDX, RT_IDX_MW, 0);
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if (status)
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goto exit;
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ql_write32(qdev, RT_IDX,
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RT_IDX_TYPE_NICQ | RT_IDX_RS | (index << RT_IDX_IDX_SHIFT));
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status = ql_wait_reg_rdy(qdev, RT_IDX, RT_IDX_MR, RT_IDX_E);
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status = ql_wait_reg_rdy(qdev, RT_IDX, RT_IDX_MR, 0);
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if (status)
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goto exit;
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*value = ql_read32(qdev, RT_DATA);
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