Merge branch 'remotes/lorenzo/pci/brcmstb'
- Add support for BCM4908 with external PERST# signal controller (Rafał Miłecki) * remotes/lorenzo/pci/brcmstb: PCI: brcmstb: support BCM4908 with external PERST# signal controller dt-bindings: PCI: brcmstb: add BCM4908 binding
This commit is contained in:
@ -14,6 +14,7 @@ properties:
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items:
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items:
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- enum:
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- enum:
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- brcm,bcm2711-pcie # The Raspberry Pi 4
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- brcm,bcm2711-pcie # The Raspberry Pi 4
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- brcm,bcm4908-pcie
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- brcm,bcm7211-pcie # Broadcom STB version of RPi4
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- brcm,bcm7211-pcie # Broadcom STB version of RPi4
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- brcm,bcm7278-pcie # Broadcom 7278 Arm
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- brcm,bcm7278-pcie # Broadcom 7278 Arm
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- brcm,bcm7216-pcie # Broadcom 7216 Arm
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- brcm,bcm7216-pcie # Broadcom 7216 Arm
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@ -63,15 +64,6 @@ properties:
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aspm-no-l0s: true
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aspm-no-l0s: true
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resets:
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description: for "brcm,bcm7216-pcie", must be a valid reset
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phandle pointing to the RESCAL reset controller provider node.
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$ref: "/schemas/types.yaml#/definitions/phandle"
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reset-names:
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items:
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- const: rescal
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brcm,scb-sizes:
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brcm,scb-sizes:
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description: u64 giving the 64bit PCIe memory
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description: u64 giving the 64bit PCIe memory
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viewport size of a memory controller. There may be up to
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viewport size of a memory controller. There may be up to
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@ -98,12 +90,39 @@ required:
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allOf:
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allOf:
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- $ref: /schemas/pci/pci-bus.yaml#
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- $ref: /schemas/pci/pci-bus.yaml#
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- if:
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properties:
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compatible:
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contains:
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const: brcm,bcm4908-pcie
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then:
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properties:
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resets:
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items:
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- description: reset controller handling the PERST# signal
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reset-names:
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items:
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- const: perst
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required:
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- resets
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- reset-names
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- if:
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- if:
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properties:
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properties:
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compatible:
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compatible:
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contains:
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contains:
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const: brcm,bcm7216-pcie
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const: brcm,bcm7216-pcie
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then:
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then:
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properties:
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resets:
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items:
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- description: phandle pointing to the RESCAL reset controller
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reset-names:
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items:
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- const: rescal
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required:
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required:
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- resets
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- resets
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- reset-names
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- reset-names
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@ -273,7 +273,7 @@ config VMD
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config PCIE_BRCMSTB
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config PCIE_BRCMSTB
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tristate "Broadcom Brcmstb PCIe host controller"
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tristate "Broadcom Brcmstb PCIe host controller"
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depends on ARCH_BRCMSTB || ARCH_BCM2835 || COMPILE_TEST
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depends on ARCH_BRCMSTB || ARCH_BCM2835 || ARCH_BCM4908 || COMPILE_TEST
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depends on OF
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depends on OF
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depends on PCI_MSI_IRQ_DOMAIN
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depends on PCI_MSI_IRQ_DOMAIN
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default ARCH_BRCMSTB
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default ARCH_BRCMSTB
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@ -97,6 +97,7 @@
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#define PCIE_MISC_REVISION 0x406c
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#define PCIE_MISC_REVISION 0x406c
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#define BRCM_PCIE_HW_REV_33 0x0303
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#define BRCM_PCIE_HW_REV_33 0x0303
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#define BRCM_PCIE_HW_REV_3_20 0x0320
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#define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_BASE_LIMIT 0x4070
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#define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_BASE_LIMIT 0x4070
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#define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_BASE_LIMIT_LIMIT_MASK 0xfff00000
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#define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_BASE_LIMIT_LIMIT_MASK 0xfff00000
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@ -187,6 +188,7 @@
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struct brcm_pcie;
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struct brcm_pcie;
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static inline void brcm_pcie_bridge_sw_init_set_7278(struct brcm_pcie *pcie, u32 val);
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static inline void brcm_pcie_bridge_sw_init_set_7278(struct brcm_pcie *pcie, u32 val);
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static inline void brcm_pcie_bridge_sw_init_set_generic(struct brcm_pcie *pcie, u32 val);
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static inline void brcm_pcie_bridge_sw_init_set_generic(struct brcm_pcie *pcie, u32 val);
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static inline void brcm_pcie_perst_set_4908(struct brcm_pcie *pcie, u32 val);
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static inline void brcm_pcie_perst_set_7278(struct brcm_pcie *pcie, u32 val);
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static inline void brcm_pcie_perst_set_7278(struct brcm_pcie *pcie, u32 val);
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static inline void brcm_pcie_perst_set_generic(struct brcm_pcie *pcie, u32 val);
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static inline void brcm_pcie_perst_set_generic(struct brcm_pcie *pcie, u32 val);
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@ -203,6 +205,7 @@ enum {
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enum pcie_type {
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enum pcie_type {
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GENERIC,
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GENERIC,
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BCM4908,
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BCM7278,
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BCM7278,
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BCM2711,
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BCM2711,
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};
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};
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@ -227,6 +230,13 @@ static const struct pcie_cfg_data generic_cfg = {
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.bridge_sw_init_set = brcm_pcie_bridge_sw_init_set_generic,
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.bridge_sw_init_set = brcm_pcie_bridge_sw_init_set_generic,
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};
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};
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static const struct pcie_cfg_data bcm4908_cfg = {
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.offsets = pcie_offsets,
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.type = BCM4908,
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.perst_set = brcm_pcie_perst_set_4908,
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.bridge_sw_init_set = brcm_pcie_bridge_sw_init_set_generic,
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};
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static const int pcie_offset_bcm7278[] = {
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static const int pcie_offset_bcm7278[] = {
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[RGR1_SW_INIT_1] = 0xc010,
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[RGR1_SW_INIT_1] = 0xc010,
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[EXT_CFG_INDEX] = 0x9000,
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[EXT_CFG_INDEX] = 0x9000,
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@ -279,6 +289,7 @@ struct brcm_pcie {
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const int *reg_offsets;
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const int *reg_offsets;
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enum pcie_type type;
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enum pcie_type type;
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struct reset_control *rescal;
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struct reset_control *rescal;
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struct reset_control *perst_reset;
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int num_memc;
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int num_memc;
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u64 memc_size[PCIE_BRCM_MAX_MEMC];
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u64 memc_size[PCIE_BRCM_MAX_MEMC];
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u32 hw_rev;
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u32 hw_rev;
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@ -735,6 +746,17 @@ static inline void brcm_pcie_bridge_sw_init_set_7278(struct brcm_pcie *pcie, u32
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writel(tmp, pcie->base + PCIE_RGR1_SW_INIT_1(pcie));
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writel(tmp, pcie->base + PCIE_RGR1_SW_INIT_1(pcie));
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}
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}
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static inline void brcm_pcie_perst_set_4908(struct brcm_pcie *pcie, u32 val)
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{
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if (WARN_ONCE(!pcie->perst_reset, "missing PERST# reset controller\n"))
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return;
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if (val)
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reset_control_assert(pcie->perst_reset);
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else
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reset_control_deassert(pcie->perst_reset);
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}
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static inline void brcm_pcie_perst_set_7278(struct brcm_pcie *pcie, u32 val)
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static inline void brcm_pcie_perst_set_7278(struct brcm_pcie *pcie, u32 val)
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{
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{
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u32 tmp;
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u32 tmp;
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@ -1194,6 +1216,7 @@ static int brcm_pcie_remove(struct platform_device *pdev)
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static const struct of_device_id brcm_pcie_match[] = {
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static const struct of_device_id brcm_pcie_match[] = {
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{ .compatible = "brcm,bcm2711-pcie", .data = &bcm2711_cfg },
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{ .compatible = "brcm,bcm2711-pcie", .data = &bcm2711_cfg },
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{ .compatible = "brcm,bcm4908-pcie", .data = &bcm4908_cfg },
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{ .compatible = "brcm,bcm7211-pcie", .data = &generic_cfg },
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{ .compatible = "brcm,bcm7211-pcie", .data = &generic_cfg },
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{ .compatible = "brcm,bcm7278-pcie", .data = &bcm7278_cfg },
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{ .compatible = "brcm,bcm7278-pcie", .data = &bcm7278_cfg },
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{ .compatible = "brcm,bcm7216-pcie", .data = &bcm7278_cfg },
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{ .compatible = "brcm,bcm7216-pcie", .data = &bcm7278_cfg },
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@ -1250,6 +1273,11 @@ static int brcm_pcie_probe(struct platform_device *pdev)
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clk_disable_unprepare(pcie->clk);
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clk_disable_unprepare(pcie->clk);
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return PTR_ERR(pcie->rescal);
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return PTR_ERR(pcie->rescal);
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}
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}
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pcie->perst_reset = devm_reset_control_get_optional_exclusive(&pdev->dev, "perst");
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if (IS_ERR(pcie->perst_reset)) {
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clk_disable_unprepare(pcie->clk);
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return PTR_ERR(pcie->perst_reset);
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}
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ret = reset_control_deassert(pcie->rescal);
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ret = reset_control_deassert(pcie->rescal);
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if (ret)
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if (ret)
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@ -1267,6 +1295,10 @@ static int brcm_pcie_probe(struct platform_device *pdev)
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goto fail;
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goto fail;
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pcie->hw_rev = readl(pcie->base + PCIE_MISC_REVISION);
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pcie->hw_rev = readl(pcie->base + PCIE_MISC_REVISION);
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if (pcie->type == BCM4908 && pcie->hw_rev >= BRCM_PCIE_HW_REV_3_20) {
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dev_err(pcie->dev, "hardware revision with unsupported PERST# setup\n");
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goto fail;
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}
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msi_np = of_parse_phandle(pcie->np, "msi-parent", 0);
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msi_np = of_parse_phandle(pcie->np, "msi-parent", 0);
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if (pci_msi_enabled() && msi_np == pcie->np) {
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if (pci_msi_enabled() && msi_np == pcie->np) {
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