powerpc: Hardware breakpoints rewrite to handle non DABR breakpoint registers
This is a rewrite so that we don't assume we are using the DABR throughout the code. We now use the arch_hw_breakpoint to store the breakpoint in a generic manner in the thread_struct, rather than storing the raw DABR value. The ptrace GET/SET_DEBUGREG interface currently passes the raw DABR in from userspace. We keep this functionality, so that future changes (like the POWER8 DAWR), will still fake the DABR to userspace. Signed-off-by: Michael Neuling <mikey@neuling.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
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@ -4,6 +4,8 @@
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#ifndef _ASM_POWERPC_DEBUG_H
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#define _ASM_POWERPC_DEBUG_H
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#include <asm/hw_breakpoint.h>
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struct pt_regs;
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extern struct dentry *powerpc_debugfs_root;
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@ -15,7 +17,7 @@ extern int (*__debugger_ipi)(struct pt_regs *regs);
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extern int (*__debugger_bpt)(struct pt_regs *regs);
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extern int (*__debugger_sstep)(struct pt_regs *regs);
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extern int (*__debugger_iabr_match)(struct pt_regs *regs);
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extern int (*__debugger_dabr_match)(struct pt_regs *regs);
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extern int (*__debugger_break_match)(struct pt_regs *regs);
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extern int (*__debugger_fault_handler)(struct pt_regs *regs);
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#define DEBUGGER_BOILERPLATE(__NAME) \
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@ -31,7 +33,7 @@ DEBUGGER_BOILERPLATE(debugger_ipi)
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DEBUGGER_BOILERPLATE(debugger_bpt)
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DEBUGGER_BOILERPLATE(debugger_sstep)
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DEBUGGER_BOILERPLATE(debugger_iabr_match)
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DEBUGGER_BOILERPLATE(debugger_dabr_match)
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DEBUGGER_BOILERPLATE(debugger_break_match)
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DEBUGGER_BOILERPLATE(debugger_fault_handler)
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#else
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@ -40,17 +42,18 @@ static inline int debugger_ipi(struct pt_regs *regs) { return 0; }
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static inline int debugger_bpt(struct pt_regs *regs) { return 0; }
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static inline int debugger_sstep(struct pt_regs *regs) { return 0; }
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static inline int debugger_iabr_match(struct pt_regs *regs) { return 0; }
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static inline int debugger_dabr_match(struct pt_regs *regs) { return 0; }
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static inline int debugger_break_match(struct pt_regs *regs) { return 0; }
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static inline int debugger_fault_handler(struct pt_regs *regs) { return 0; }
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#endif
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extern int set_dabr(unsigned long dabr, unsigned long dabrx);
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int set_break(struct arch_hw_breakpoint *brk);
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#ifdef CONFIG_PPC_ADV_DEBUG_REGS
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extern void do_send_trap(struct pt_regs *regs, unsigned long address,
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unsigned long error_code, int signal_code, int brkpt);
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#else
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extern void do_dabr(struct pt_regs *regs, unsigned long address,
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unsigned long error_code);
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extern void do_break(struct pt_regs *regs, unsigned long address,
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unsigned long error_code);
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#endif
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#endif /* _ASM_POWERPC_DEBUG_H */
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@ -24,16 +24,30 @@
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#define _PPC_BOOK3S_64_HW_BREAKPOINT_H
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#ifdef __KERNEL__
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#ifdef CONFIG_HAVE_HW_BREAKPOINT
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struct arch_hw_breakpoint {
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unsigned long address;
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unsigned long dabrx;
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int type;
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u8 len; /* length of the target data symbol */
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bool extraneous_interrupt;
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u16 type;
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u16 len; /* length of the target data symbol */
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};
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/* Note: Don't change the the first 6 bits below as they are in the same order
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* as the dabr and dabrx.
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*/
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#define HW_BRK_TYPE_READ 0x01
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#define HW_BRK_TYPE_WRITE 0x02
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#define HW_BRK_TYPE_TRANSLATE 0x04
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#define HW_BRK_TYPE_USER 0x08
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#define HW_BRK_TYPE_KERNEL 0x10
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#define HW_BRK_TYPE_HYP 0x20
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#define HW_BRK_TYPE_EXTRANEOUS_IRQ 0x80
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/* bits that overlap with the bottom 3 bits of the dabr */
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#define HW_BRK_TYPE_RDWR (HW_BRK_TYPE_READ | HW_BRK_TYPE_WRITE)
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#define HW_BRK_TYPE_DABR (HW_BRK_TYPE_RDWR | HW_BRK_TYPE_TRANSLATE)
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#define HW_BRK_TYPE_PRIV_ALL (HW_BRK_TYPE_USER | HW_BRK_TYPE_KERNEL | \
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HW_BRK_TYPE_HYP)
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#ifdef CONFIG_HAVE_HW_BREAKPOINT
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#include <linux/kdebug.h>
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#include <asm/reg.h>
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#include <asm/debug.h>
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@ -62,7 +76,12 @@ extern void ptrace_triggered(struct perf_event *bp,
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struct perf_sample_data *data, struct pt_regs *regs);
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static inline void hw_breakpoint_disable(void)
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{
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set_dabr(0, 0);
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struct arch_hw_breakpoint brk;
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brk.address = 0;
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brk.type = 0;
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brk.len = 0;
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set_break(&brk);
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}
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extern void thread_change_pc(struct task_struct *tsk, struct pt_regs *regs);
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@ -33,6 +33,7 @@
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#include <linux/cache.h>
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#include <asm/ptrace.h>
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#include <asm/types.h>
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#include <asm/hw_breakpoint.h>
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/* We do _not_ want to define new machine types at all, those must die
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* in favor of using the device-tree
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@ -225,8 +226,7 @@ struct thread_struct {
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struct perf_event *last_hit_ubp;
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#endif /* CONFIG_HAVE_HW_BREAKPOINT */
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#endif
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unsigned long dabr; /* Data address breakpoint register */
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unsigned long dabrx; /* ... extension */
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struct arch_hw_breakpoint hw_brk; /* info on the hardware breakpoint */
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unsigned long trap_nr; /* last trap # on this thread */
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#ifdef CONFIG_ALTIVEC
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/* Complete AltiVec register set */
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@ -206,9 +206,6 @@
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#define DAWRX_KERNEL (1UL << 1)
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#define DAWRX_HYP (1UL << 2)
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#define SPRN_DABR 0x3F5 /* Data Address Breakpoint Register */
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#define DABR_TRANSLATION (1UL << 2)
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#define DABR_DATA_WRITE (1UL << 1)
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#define DABR_DATA_READ (1UL << 0)
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#define SPRN_DABR2 0x13D /* e300 */
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#define SPRN_DABRX 0x3F7 /* Data Address Breakpoint Register Extension */
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#define DABRX_USER (1UL << 0)
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@ -1251,7 +1251,7 @@ handle_dabr_fault:
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ld r4,_DAR(r1)
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ld r5,_DSISR(r1)
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addi r3,r1,STACK_FRAME_OVERHEAD
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bl .do_dabr
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bl .do_break
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12: b .ret_from_except_lite
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@ -73,7 +73,7 @@ int arch_install_hw_breakpoint(struct perf_event *bp)
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* If so, DABR will be populated in single_step_dabr_instruction().
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*/
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if (current->thread.last_hit_ubp != bp)
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set_dabr(info->address | info->type | DABR_TRANSLATION, info->dabrx);
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set_break(info);
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return 0;
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}
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@ -97,7 +97,7 @@ void arch_uninstall_hw_breakpoint(struct perf_event *bp)
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}
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*slot = NULL;
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set_dabr(0, 0);
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hw_breakpoint_disable();
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}
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/*
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@ -127,19 +127,13 @@ int arch_check_bp_in_kernelspace(struct perf_event *bp)
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int arch_bp_generic_fields(int type, int *gen_bp_type)
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{
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switch (type) {
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case DABR_DATA_READ:
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*gen_bp_type = HW_BREAKPOINT_R;
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break;
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case DABR_DATA_WRITE:
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*gen_bp_type = HW_BREAKPOINT_W;
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break;
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case (DABR_DATA_WRITE | DABR_DATA_READ):
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*gen_bp_type = (HW_BREAKPOINT_W | HW_BREAKPOINT_R);
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break;
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default:
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*gen_bp_type = 0;
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if (type & HW_BRK_TYPE_READ)
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*gen_bp_type |= HW_BREAKPOINT_R;
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if (type & HW_BRK_TYPE_WRITE)
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*gen_bp_type |= HW_BREAKPOINT_W;
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if (*gen_bp_type == 0)
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return -EINVAL;
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}
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return 0;
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}
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@ -154,29 +148,22 @@ int arch_validate_hwbkpt_settings(struct perf_event *bp)
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if (!bp)
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return ret;
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switch (bp->attr.bp_type) {
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case HW_BREAKPOINT_R:
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info->type = DABR_DATA_READ;
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break;
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case HW_BREAKPOINT_W:
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info->type = DABR_DATA_WRITE;
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break;
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case HW_BREAKPOINT_R | HW_BREAKPOINT_W:
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info->type = (DABR_DATA_READ | DABR_DATA_WRITE);
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break;
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default:
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info->type = HW_BRK_TYPE_TRANSLATE;
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if (bp->attr.bp_type & HW_BREAKPOINT_R)
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info->type |= HW_BRK_TYPE_READ;
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if (bp->attr.bp_type & HW_BREAKPOINT_W)
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info->type |= HW_BRK_TYPE_WRITE;
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if (info->type == HW_BRK_TYPE_TRANSLATE)
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/* must set alteast read or write */
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return ret;
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}
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if (!(bp->attr.exclude_user))
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info->type |= HW_BRK_TYPE_USER;
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if (!(bp->attr.exclude_kernel))
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info->type |= HW_BRK_TYPE_KERNEL;
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if (!(bp->attr.exclude_hv))
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info->type |= HW_BRK_TYPE_HYP;
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info->address = bp->attr.bp_addr;
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info->len = bp->attr.bp_len;
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info->dabrx = DABRX_ALL;
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if (bp->attr.exclude_user)
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info->dabrx &= ~DABRX_USER;
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if (bp->attr.exclude_kernel)
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info->dabrx &= ~DABRX_KERNEL;
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if (bp->attr.exclude_hv)
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info->dabrx &= ~DABRX_HYP;
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/*
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* Since breakpoint length can be a maximum of HW_BREAKPOINT_LEN(8)
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@ -204,7 +191,7 @@ void thread_change_pc(struct task_struct *tsk, struct pt_regs *regs)
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info = counter_arch_bp(tsk->thread.last_hit_ubp);
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regs->msr &= ~MSR_SE;
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set_dabr(info->address | info->type | DABR_TRANSLATION, info->dabrx);
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set_break(info);
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tsk->thread.last_hit_ubp = NULL;
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}
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@ -222,7 +209,7 @@ int __kprobes hw_breakpoint_handler(struct die_args *args)
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unsigned long dar = regs->dar;
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/* Disable breakpoints during exception handling */
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set_dabr(0, 0);
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hw_breakpoint_disable();
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/*
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* The counter may be concurrently released but that can only
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@ -255,8 +242,9 @@ int __kprobes hw_breakpoint_handler(struct die_args *args)
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* we still need to single-step the instruction, but we don't
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* generate an event.
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*/
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info->extraneous_interrupt = !((bp->attr.bp_addr <= dar) &&
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(dar - bp->attr.bp_addr < bp->attr.bp_len));
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if (!((bp->attr.bp_addr <= dar) &&
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(dar - bp->attr.bp_addr < bp->attr.bp_len)))
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info->type |= HW_BRK_TYPE_EXTRANEOUS_IRQ;
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/* Do not emulate user-space instructions, instead single-step them */
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if (user_mode(regs)) {
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@ -285,10 +273,10 @@ int __kprobes hw_breakpoint_handler(struct die_args *args)
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* As a policy, the callback is invoked in a 'trigger-after-execute'
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* fashion
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*/
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if (!info->extraneous_interrupt)
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if (!(info->type & HW_BRK_TYPE_EXTRANEOUS_IRQ))
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perf_bp_event(bp, regs);
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set_dabr(info->address | info->type | DABR_TRANSLATION, info->dabrx);
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set_break(info);
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out:
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rcu_read_unlock();
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return rc;
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@ -317,10 +305,10 @@ int __kprobes single_step_dabr_instruction(struct die_args *args)
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* We shall invoke the user-defined callback function in the single
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* stepping handler to confirm to 'trigger-after-execute' semantics
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*/
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if (!info->extraneous_interrupt)
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if (!(info->type & HW_BRK_TYPE_EXTRANEOUS_IRQ))
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perf_bp_event(bp, regs);
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set_dabr(info->address | info->type | DABR_TRANSLATION, info->dabrx);
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set_break(info);
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current->thread.last_hit_ubp = NULL;
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/*
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@ -198,7 +198,7 @@ static int kgdb_iabr_match(struct pt_regs *regs)
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return 1;
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}
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static int kgdb_dabr_match(struct pt_regs *regs)
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static int kgdb_break_match(struct pt_regs *regs)
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{
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if (user_mode(regs))
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return 0;
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@ -458,7 +458,7 @@ static void *old__debugger;
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static void *old__debugger_bpt;
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static void *old__debugger_sstep;
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static void *old__debugger_iabr_match;
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static void *old__debugger_dabr_match;
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static void *old__debugger_break_match;
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static void *old__debugger_fault_handler;
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int kgdb_arch_init(void)
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@ -468,7 +468,7 @@ int kgdb_arch_init(void)
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old__debugger_bpt = __debugger_bpt;
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old__debugger_sstep = __debugger_sstep;
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old__debugger_iabr_match = __debugger_iabr_match;
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old__debugger_dabr_match = __debugger_dabr_match;
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old__debugger_break_match = __debugger_break_match;
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old__debugger_fault_handler = __debugger_fault_handler;
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__debugger_ipi = kgdb_call_nmi_hook;
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@ -476,7 +476,7 @@ int kgdb_arch_init(void)
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__debugger_bpt = kgdb_handle_breakpoint;
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__debugger_sstep = kgdb_singlestep;
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__debugger_iabr_match = kgdb_iabr_match;
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__debugger_dabr_match = kgdb_dabr_match;
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__debugger_break_match = kgdb_break_match;
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__debugger_fault_handler = kgdb_not_implemented;
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return 0;
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@ -489,6 +489,6 @@ void kgdb_arch_exit(void)
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__debugger_bpt = old__debugger_bpt;
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__debugger_sstep = old__debugger_sstep;
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__debugger_iabr_match = old__debugger_iabr_match;
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__debugger_dabr_match = old__debugger_dabr_match;
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__debugger_breakx_match = old__debugger_break_match;
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__debugger_fault_handler = old__debugger_fault_handler;
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}
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@ -271,7 +271,7 @@ void do_send_trap(struct pt_regs *regs, unsigned long address,
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force_sig_info(SIGTRAP, &info, current);
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}
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#else /* !CONFIG_PPC_ADV_DEBUG_REGS */
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void do_dabr(struct pt_regs *regs, unsigned long address,
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void do_break (struct pt_regs *regs, unsigned long address,
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unsigned long error_code)
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{
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siginfo_t info;
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@ -281,11 +281,11 @@ void do_dabr(struct pt_regs *regs, unsigned long address,
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11, SIGSEGV) == NOTIFY_STOP)
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return;
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if (debugger_dabr_match(regs))
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if (debugger_break_match(regs))
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return;
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/* Clear the DABR */
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set_dabr(0, 0);
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/* Clear the breakpoint */
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hw_breakpoint_disable();
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/* Deliver the signal to userspace */
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info.si_signo = SIGTRAP;
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@ -296,7 +296,7 @@ void do_dabr(struct pt_regs *regs, unsigned long address,
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}
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#endif /* CONFIG_PPC_ADV_DEBUG_REGS */
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static DEFINE_PER_CPU(unsigned long, current_dabr);
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static DEFINE_PER_CPU(struct arch_hw_breakpoint, current_brk);
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#ifdef CONFIG_PPC_ADV_DEBUG_REGS
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/*
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@ -364,39 +364,72 @@ static void switch_booke_debug_regs(struct thread_struct *new_thread)
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#ifndef CONFIG_HAVE_HW_BREAKPOINT
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static void set_debug_reg_defaults(struct thread_struct *thread)
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{
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if (thread->dabr) {
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thread->dabr = 0;
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thread->dabrx = 0;
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set_dabr(0, 0);
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}
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thread->hw_brk.address = 0;
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thread->hw_brk.type = 0;
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set_break(&thread->hw_brk);
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}
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#endif /* !CONFIG_HAVE_HW_BREAKPOINT */
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#endif /* CONFIG_PPC_ADV_DEBUG_REGS */
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int set_dabr(unsigned long dabr, unsigned long dabrx)
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{
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__get_cpu_var(current_dabr) = dabr;
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if (ppc_md.set_dabr)
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return ppc_md.set_dabr(dabr, dabrx);
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/* XXX should we have a CPU_FTR_HAS_DABR ? */
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#ifdef CONFIG_PPC_ADV_DEBUG_REGS
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static inline int __set_dabr(unsigned long dabr, unsigned long dabrx)
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{
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mtspr(SPRN_DAC1, dabr);
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#ifdef CONFIG_PPC_47x
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isync();
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#endif
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return 0;
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}
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#elif defined(CONFIG_PPC_BOOK3S)
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static inline int __set_dabr(unsigned long dabr, unsigned long dabrx)
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{
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mtspr(SPRN_DABR, dabr);
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mtspr(SPRN_DABRX, dabrx);
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#endif
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return 0;
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}
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#else
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static inline int __set_dabr(unsigned long dabr, unsigned long dabrx)
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{
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return -EINVAL;
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}
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#endif
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static inline int set_dabr(struct arch_hw_breakpoint *brk)
|
||||
{
|
||||
unsigned long dabr, dabrx;
|
||||
|
||||
dabr = brk->address | (brk->type & HW_BRK_TYPE_DABR);
|
||||
dabrx = ((brk->type >> 3) & 0x7);
|
||||
|
||||
if (ppc_md.set_dabr)
|
||||
return ppc_md.set_dabr(dabr, dabrx);
|
||||
|
||||
return __set_dabr(dabr, dabrx);
|
||||
}
|
||||
|
||||
int set_break(struct arch_hw_breakpoint *brk)
|
||||
{
|
||||
__get_cpu_var(current_brk) = *brk;
|
||||
|
||||
return set_dabr(brk);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_PPC64
|
||||
DEFINE_PER_CPU(struct cpu_usage, cpu_usage_array);
|
||||
#endif
|
||||
|
||||
static inline bool hw_brk_match(struct arch_hw_breakpoint *a,
|
||||
struct arch_hw_breakpoint *b)
|
||||
{
|
||||
if (a->address != b->address)
|
||||
return false;
|
||||
if (a->type != b->type)
|
||||
return false;
|
||||
if (a->len != b->len)
|
||||
return false;
|
||||
return true;
|
||||
}
|
||||
|
||||
struct task_struct *__switch_to(struct task_struct *prev,
|
||||
struct task_struct *new)
|
||||
{
|
||||
@ -481,8 +514,8 @@ struct task_struct *__switch_to(struct task_struct *prev,
|
||||
* schedule DABR
|
||||
*/
|
||||
#ifndef CONFIG_HAVE_HW_BREAKPOINT
|
||||
if (unlikely(__get_cpu_var(current_dabr) != new->thread.dabr))
|
||||
set_dabr(new->thread.dabr, new->thread.dabrx);
|
||||
if (unlikely(hw_brk_match(&__get_cpu_var(current_brk), &new->thread.hw_brk)))
|
||||
set_break(&new->thread.hw_brk);
|
||||
#endif /* CONFIG_HAVE_HW_BREAKPOINT */
|
||||
#endif
|
||||
|
||||
|
@ -905,6 +905,9 @@ int ptrace_set_debugreg(struct task_struct *task, unsigned long addr,
|
||||
struct perf_event *bp;
|
||||
struct perf_event_attr attr;
|
||||
#endif /* CONFIG_HAVE_HW_BREAKPOINT */
|
||||
#ifndef CONFIG_PPC_ADV_DEBUG_REGS
|
||||
struct arch_hw_breakpoint hw_brk;
|
||||
#endif
|
||||
|
||||
/* For ppc64 we support one DABR and no IABR's at the moment (ppc64).
|
||||
* For embedded processors we support one DAC and no IAC's at the
|
||||
@ -931,14 +934,17 @@ int ptrace_set_debugreg(struct task_struct *task, unsigned long addr,
|
||||
*/
|
||||
|
||||
/* Ensure breakpoint translation bit is set */
|
||||
if (data && !(data & DABR_TRANSLATION))
|
||||
if (data && !(data & HW_BRK_TYPE_TRANSLATE))
|
||||
return -EIO;
|
||||
hw_brk.address = data & (~HW_BRK_TYPE_DABR);
|
||||
hw_brk.type = (data & HW_BRK_TYPE_DABR) | HW_BRK_TYPE_PRIV_ALL;
|
||||
hw_brk.len = 8;
|
||||
#ifdef CONFIG_HAVE_HW_BREAKPOINT
|
||||
if (ptrace_get_breakpoints(task) < 0)
|
||||
return -ESRCH;
|
||||
|
||||
bp = thread->ptrace_bps[0];
|
||||
if ((!data) || !(data & (DABR_DATA_WRITE | DABR_DATA_READ))) {
|
||||
if ((!data) || !(hw_brk.type & HW_BRK_TYPE_RDWR)) {
|
||||
if (bp) {
|
||||
unregister_hw_breakpoint(bp);
|
||||
thread->ptrace_bps[0] = NULL;
|
||||
@ -948,10 +954,8 @@ int ptrace_set_debugreg(struct task_struct *task, unsigned long addr,
|
||||
}
|
||||
if (bp) {
|
||||
attr = bp->attr;
|
||||
attr.bp_addr = data & ~HW_BREAKPOINT_ALIGN;
|
||||
arch_bp_generic_fields(data &
|
||||
(DABR_DATA_WRITE | DABR_DATA_READ),
|
||||
&attr.bp_type);
|
||||
attr.bp_addr = hw_brk.address;
|
||||
arch_bp_generic_fields(hw_brk.type, &attr.bp_type);
|
||||
|
||||
/* Enable breakpoint */
|
||||
attr.disabled = false;
|
||||
@ -963,16 +967,15 @@ int ptrace_set_debugreg(struct task_struct *task, unsigned long addr,
|
||||
}
|
||||
thread->ptrace_bps[0] = bp;
|
||||
ptrace_put_breakpoints(task);
|
||||
thread->dabr = data;
|
||||
thread->dabrx = DABRX_ALL;
|
||||
thread->hw_brk = hw_brk;
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* Create a new breakpoint request if one doesn't exist already */
|
||||
hw_breakpoint_init(&attr);
|
||||
attr.bp_addr = data & ~HW_BREAKPOINT_ALIGN;
|
||||
arch_bp_generic_fields(data & (DABR_DATA_WRITE | DABR_DATA_READ),
|
||||
&attr.bp_type);
|
||||
attr.bp_addr = hw_brk.address;
|
||||
arch_bp_generic_fields(hw_brk.type,
|
||||
&attr.bp_type);
|
||||
|
||||
thread->ptrace_bps[0] = bp = register_user_hw_breakpoint(&attr,
|
||||
ptrace_triggered, NULL, task);
|
||||
@ -985,10 +988,7 @@ int ptrace_set_debugreg(struct task_struct *task, unsigned long addr,
|
||||
ptrace_put_breakpoints(task);
|
||||
|
||||
#endif /* CONFIG_HAVE_HW_BREAKPOINT */
|
||||
|
||||
/* Move contents to the DABR register */
|
||||
task->thread.dabr = data;
|
||||
task->thread.dabrx = DABRX_ALL;
|
||||
task->thread.hw_brk = hw_brk;
|
||||
#else /* CONFIG_PPC_ADV_DEBUG_REGS */
|
||||
/* As described above, it was assumed 3 bits were passed with the data
|
||||
* address, but we will assume only the mode bits will be passed
|
||||
@ -1349,7 +1349,7 @@ static long ppc_set_hwdebug(struct task_struct *child,
|
||||
struct perf_event_attr attr;
|
||||
#endif /* CONFIG_HAVE_HW_BREAKPOINT */
|
||||
#ifndef CONFIG_PPC_ADV_DEBUG_REGS
|
||||
unsigned long dabr;
|
||||
struct arch_hw_breakpoint brk;
|
||||
#endif
|
||||
|
||||
if (bp_info->version != 1)
|
||||
@ -1397,12 +1397,12 @@ static long ppc_set_hwdebug(struct task_struct *child,
|
||||
if ((unsigned long)bp_info->addr >= TASK_SIZE)
|
||||
return -EIO;
|
||||
|
||||
dabr = (unsigned long)bp_info->addr & ~7UL;
|
||||
dabr |= DABR_TRANSLATION;
|
||||
brk.address = bp_info->addr & ~7UL;
|
||||
brk.type = HW_BRK_TYPE_TRANSLATE;
|
||||
if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_READ)
|
||||
dabr |= DABR_DATA_READ;
|
||||
brk.type |= HW_BRK_TYPE_READ;
|
||||
if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_WRITE)
|
||||
dabr |= DABR_DATA_WRITE;
|
||||
brk.type |= HW_BRK_TYPE_WRITE;
|
||||
#ifdef CONFIG_HAVE_HW_BREAKPOINT
|
||||
if (ptrace_get_breakpoints(child) < 0)
|
||||
return -ESRCH;
|
||||
@ -1427,8 +1427,7 @@ static long ppc_set_hwdebug(struct task_struct *child,
|
||||
hw_breakpoint_init(&attr);
|
||||
attr.bp_addr = (unsigned long)bp_info->addr & ~HW_BREAKPOINT_ALIGN;
|
||||
attr.bp_len = len;
|
||||
arch_bp_generic_fields(dabr & (DABR_DATA_WRITE | DABR_DATA_READ),
|
||||
&attr.bp_type);
|
||||
arch_bp_generic_fields(brk.type, &attr.bp_type);
|
||||
|
||||
thread->ptrace_bps[0] = bp = register_user_hw_breakpoint(&attr,
|
||||
ptrace_triggered, NULL, child);
|
||||
@ -1445,11 +1444,10 @@ static long ppc_set_hwdebug(struct task_struct *child,
|
||||
if (bp_info->addr_mode != PPC_BREAKPOINT_MODE_EXACT)
|
||||
return -EINVAL;
|
||||
|
||||
if (child->thread.dabr)
|
||||
if (child->thread.hw_brk.address)
|
||||
return -ENOSPC;
|
||||
|
||||
child->thread.dabr = dabr;
|
||||
child->thread.dabrx = DABRX_ALL;
|
||||
child->thread.hw_brk = brk;
|
||||
|
||||
return 1;
|
||||
#endif /* !CONFIG_PPC_ADV_DEBUG_DVCS */
|
||||
@ -1495,10 +1493,11 @@ static long ppc_del_hwdebug(struct task_struct *child, long data)
|
||||
ptrace_put_breakpoints(child);
|
||||
return ret;
|
||||
#else /* CONFIG_HAVE_HW_BREAKPOINT */
|
||||
if (child->thread.dabr == 0)
|
||||
if (child->thread.hw_brk.address == 0)
|
||||
return -ENOENT;
|
||||
|
||||
child->thread.dabr = 0;
|
||||
child->thread.hw_brk.address = 0;
|
||||
child->thread.hw_brk.type = 0;
|
||||
#endif /* CONFIG_HAVE_HW_BREAKPOINT */
|
||||
|
||||
return 0;
|
||||
@ -1642,6 +1641,9 @@ long arch_ptrace(struct task_struct *child, long request,
|
||||
}
|
||||
|
||||
case PTRACE_GET_DEBUGREG: {
|
||||
#ifndef CONFIG_PPC_ADV_DEBUG_REGS
|
||||
unsigned long dabr_fake;
|
||||
#endif
|
||||
ret = -EINVAL;
|
||||
/* We only support one DABR and no IABRS at the moment */
|
||||
if (addr > 0)
|
||||
@ -1649,7 +1651,9 @@ long arch_ptrace(struct task_struct *child, long request,
|
||||
#ifdef CONFIG_PPC_ADV_DEBUG_REGS
|
||||
ret = put_user(child->thread.dac1, datalp);
|
||||
#else
|
||||
ret = put_user(child->thread.dabr, datalp);
|
||||
dabr_fake = ((child->thread.hw_brk.address & (~HW_BRK_TYPE_DABR)) |
|
||||
(child->thread.hw_brk.type & HW_BRK_TYPE_DABR));
|
||||
ret = put_user(dabr_fake, datalp);
|
||||
#endif
|
||||
break;
|
||||
}
|
||||
|
@ -252,6 +252,9 @@ long compat_arch_ptrace(struct task_struct *child, compat_long_t request,
|
||||
}
|
||||
|
||||
case PTRACE_GET_DEBUGREG: {
|
||||
#ifndef CONFIG_PPC_ADV_DEBUG_REGS
|
||||
unsigned long dabr_fake;
|
||||
#endif
|
||||
ret = -EINVAL;
|
||||
/* We only support one DABR and no IABRS at the moment */
|
||||
if (addr > 0)
|
||||
@ -259,7 +262,10 @@ long compat_arch_ptrace(struct task_struct *child, compat_long_t request,
|
||||
#ifdef CONFIG_PPC_ADV_DEBUG_REGS
|
||||
ret = put_user(child->thread.dac1, (u32 __user *)data);
|
||||
#else
|
||||
ret = put_user(child->thread.dabr, (u32 __user *)data);
|
||||
dabr_fake = (
|
||||
(child->thread.hw_brk.address & (~HW_BRK_TYPE_DABR)) |
|
||||
(child->thread.hw_brk.type & HW_BRK_TYPE_DABR));
|
||||
ret = put_user(dabr_fake, (u32 __user *)data);
|
||||
#endif
|
||||
break;
|
||||
}
|
||||
|
@ -130,8 +130,9 @@ static int do_signal(struct pt_regs *regs)
|
||||
* user space. The DABR will have been cleared if it
|
||||
* triggered inside the kernel.
|
||||
*/
|
||||
if (current->thread.dabr)
|
||||
set_dabr(current->thread.dabr, current->thread.dabrx);
|
||||
if (current->thread.hw_brk.address &&
|
||||
current->thread.hw_brk.type)
|
||||
set_break(¤t->thread.hw_brk);
|
||||
#endif
|
||||
/* Re-enable the breakpoints for the signal stack */
|
||||
thread_change_pc(current, regs);
|
||||
|
@ -66,7 +66,7 @@ int (*__debugger_ipi)(struct pt_regs *regs) __read_mostly;
|
||||
int (*__debugger_bpt)(struct pt_regs *regs) __read_mostly;
|
||||
int (*__debugger_sstep)(struct pt_regs *regs) __read_mostly;
|
||||
int (*__debugger_iabr_match)(struct pt_regs *regs) __read_mostly;
|
||||
int (*__debugger_dabr_match)(struct pt_regs *regs) __read_mostly;
|
||||
int (*__debugger_break_match)(struct pt_regs *regs) __read_mostly;
|
||||
int (*__debugger_fault_handler)(struct pt_regs *regs) __read_mostly;
|
||||
|
||||
EXPORT_SYMBOL(__debugger);
|
||||
@ -74,7 +74,7 @@ EXPORT_SYMBOL(__debugger_ipi);
|
||||
EXPORT_SYMBOL(__debugger_bpt);
|
||||
EXPORT_SYMBOL(__debugger_sstep);
|
||||
EXPORT_SYMBOL(__debugger_iabr_match);
|
||||
EXPORT_SYMBOL(__debugger_dabr_match);
|
||||
EXPORT_SYMBOL(__debugger_break_match);
|
||||
EXPORT_SYMBOL(__debugger_fault_handler);
|
||||
#endif
|
||||
|
||||
|
@ -249,8 +249,8 @@ int __kprobes do_page_fault(struct pt_regs *regs, unsigned long address,
|
||||
#if !(defined(CONFIG_4xx) || defined(CONFIG_BOOKE) || \
|
||||
defined(CONFIG_PPC_BOOK3S_64))
|
||||
if (error_code & DSISR_DABRMATCH) {
|
||||
/* DABR match */
|
||||
do_dabr(regs, address, error_code);
|
||||
/* breakpoint match */
|
||||
do_break(regs, address, error_code);
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
@ -43,6 +43,7 @@
|
||||
#include <asm/setjmp.h>
|
||||
#include <asm/reg.h>
|
||||
#include <asm/debug.h>
|
||||
#include <asm/hw_breakpoint.h>
|
||||
|
||||
#ifdef CONFIG_PPC64
|
||||
#include <asm/hvcall.h>
|
||||
@ -607,7 +608,7 @@ static int xmon_sstep(struct pt_regs *regs)
|
||||
return 1;
|
||||
}
|
||||
|
||||
static int xmon_dabr_match(struct pt_regs *regs)
|
||||
static int xmon_break_match(struct pt_regs *regs)
|
||||
{
|
||||
if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) != (MSR_IR|MSR_64BIT))
|
||||
return 0;
|
||||
@ -740,8 +741,14 @@ static void insert_bpts(void)
|
||||
|
||||
static void insert_cpu_bpts(void)
|
||||
{
|
||||
if (dabr.enabled)
|
||||
set_dabr(dabr.address | (dabr.enabled & 7), DABRX_ALL);
|
||||
struct arch_hw_breakpoint brk;
|
||||
|
||||
if (dabr.enabled) {
|
||||
brk.address = dabr.address;
|
||||
brk.type = (dabr.enabled & HW_BRK_TYPE_DABR) | HW_BRK_TYPE_PRIV_ALL;
|
||||
brk.len = 8;
|
||||
set_break(&brk);
|
||||
}
|
||||
if (iabr && cpu_has_feature(CPU_FTR_IABR))
|
||||
mtspr(SPRN_IABR, iabr->address
|
||||
| (iabr->enabled & (BP_IABR|BP_IABR_TE)));
|
||||
@ -769,7 +776,7 @@ static void remove_bpts(void)
|
||||
|
||||
static void remove_cpu_bpts(void)
|
||||
{
|
||||
set_dabr(0, 0);
|
||||
hw_breakpoint_disable();
|
||||
if (cpu_has_feature(CPU_FTR_IABR))
|
||||
mtspr(SPRN_IABR, 0);
|
||||
}
|
||||
@ -1138,7 +1145,7 @@ bpt_cmds(void)
|
||||
printf(badaddr);
|
||||
break;
|
||||
}
|
||||
dabr.address &= ~7;
|
||||
dabr.address &= ~HW_BRK_TYPE_DABR;
|
||||
dabr.enabled = mode | BP_DABR;
|
||||
}
|
||||
break;
|
||||
@ -2917,7 +2924,7 @@ static void xmon_init(int enable)
|
||||
__debugger_bpt = xmon_bpt;
|
||||
__debugger_sstep = xmon_sstep;
|
||||
__debugger_iabr_match = xmon_iabr_match;
|
||||
__debugger_dabr_match = xmon_dabr_match;
|
||||
__debugger_break_match = xmon_break_match;
|
||||
__debugger_fault_handler = xmon_fault_handler;
|
||||
} else {
|
||||
__debugger = NULL;
|
||||
@ -2925,7 +2932,7 @@ static void xmon_init(int enable)
|
||||
__debugger_bpt = NULL;
|
||||
__debugger_sstep = NULL;
|
||||
__debugger_iabr_match = NULL;
|
||||
__debugger_dabr_match = NULL;
|
||||
__debugger_break_match = NULL;
|
||||
__debugger_fault_handler = NULL;
|
||||
}
|
||||
}
|
||||
|
Loading…
Reference in New Issue
Block a user