arm64: alternative: Introduce feature for GICv3 CPU interface
Add a new item to the feature set (ARM64_HAS_SYSREG_GIC_CPUIF) to indicate that we have a system register GIC CPU interface This will help KVM switching to alternative instruction patching. Reviewed-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org> Acked-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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@ -24,8 +24,9 @@
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#define ARM64_WORKAROUND_CLEAN_CACHE 0
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#define ARM64_WORKAROUND_DEVICE_LOAD_ACQUIRE 1
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#define ARM64_WORKAROUND_845719 2
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#define ARM64_HAS_SYSREG_GIC_CPUIF 3
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#define ARM64_NCAPS 3
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#define ARM64_NCAPS 4
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#ifndef __ASSEMBLY__
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@ -38,6 +39,11 @@ struct arm64_cpu_capabilities {
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u32 midr_model;
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u32 midr_range_min, midr_range_max;
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};
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struct { /* Feature register checking */
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u64 register_mask;
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u64 register_value;
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};
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};
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};
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@ -22,7 +22,23 @@
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#include <asm/cpu.h>
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#include <asm/cpufeature.h>
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static bool
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has_id_aa64pfr0_feature(const struct arm64_cpu_capabilities *entry)
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{
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u64 val;
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val = read_cpuid(id_aa64pfr0_el1);
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return (val & entry->register_mask) == entry->register_value;
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}
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static const struct arm64_cpu_capabilities arm64_features[] = {
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{
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.desc = "GIC system register CPU interface",
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.capability = ARM64_HAS_SYSREG_GIC_CPUIF,
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.matches = has_id_aa64pfr0_feature,
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.register_mask = (0xf << 24),
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.register_value = (1 << 24),
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},
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{},
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};
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