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clk: qcom: gcc-sa8775p: Set FORCE_MEM_CORE_ON for gcc_ufs_phy_ice_core_clk

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Update the force mem core bit for UFS ICE clock to force the core on
signal to remain active during halt state of the clk. If force mem
core bit of the clock is not set, the memories of the subsystem will
not retain the logic across power states.

Fixes: 08c51ceb12 ("clk: qcom: add the GCC driver for sa8775p")
Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20240612-sa8775p-v2-gcc-gpucc-fixes-v2-3-adcc756a23df@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
This commit is contained in:
Taniya Das 2024-06-12 16:38:23 +05:30 committed by Bjorn Andersson
parent be208c0ccf
commit 955606a7b0
1 changed files with 3 additions and 0 deletions
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3
drivers/clk/qcom/gcc-sa8775p.c
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@ -4686,6 +4686,9 @@ static int gcc_sa8775p_probe(struct platform_device *pdev)
qcom_branch_set_clk_en(regmap, 0x34004); /* GCC_VIDEO_AHB_CLK */ qcom_branch_set_clk_en(regmap, 0x34004); /* GCC_VIDEO_AHB_CLK */
qcom_branch_set_clk_en(regmap, 0x34024); /* GCC_VIDEO_XO_CLK */ qcom_branch_set_clk_en(regmap, 0x34024); /* GCC_VIDEO_XO_CLK */
/* FORCE_MEM_CORE_ON for ufs phy ice core clocks */
qcom_branch_set_force_mem_core(regmap, gcc_ufs_phy_ice_core_clk, true);
return qcom_cc_really_probe(&pdev->dev, &gcc_sa8775p_desc, regmap); return qcom_cc_really_probe(&pdev->dev, &gcc_sa8775p_desc, regmap);
} }