ppc64 iSeries: Define /cpus in iSeries device tree
Add the /cpus node and nodes for each cpu, as well as cache size properties, reg propery, "linux,boot-cpu", and timebase/clock frequency. With those properties in place we can remove: - setup_iSeries_cache_sizes() - code in iSeries_setup_arch() to calculate timebase etc. - iSeries_calibrate_decr() - smp_iSeries_numProcs() and simplify smp_iSeries_probe() Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
This commit is contained in:
parent
47db360328
commit
95b2938008
@ -74,7 +74,6 @@ extern void hvlog(char *fmt, ...);
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extern void ppcdbg_initialize(void);
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extern void ppcdbg_initialize(void);
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static void build_iSeries_Memory_Map(void);
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static void build_iSeries_Memory_Map(void);
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static void setup_iSeries_cache_sizes(void);
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static int iseries_shared_idle(void);
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static int iseries_shared_idle(void);
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static int iseries_dedicated_idle(void);
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static int iseries_dedicated_idle(void);
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#ifdef CONFIG_PCI
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#ifdef CONFIG_PCI
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@ -84,14 +83,6 @@ static void iSeries_pci_final_fixup(void) { }
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#endif
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#endif
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/* Global Variables */
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/* Global Variables */
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static unsigned long procFreqHz;
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static unsigned long procFreqMhz;
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static unsigned long procFreqMhzHundreths;
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static unsigned long tbFreqHz;
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static unsigned long tbFreqMhz;
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static unsigned long tbFreqMhzHundreths;
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int piranha_simulator;
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int piranha_simulator;
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extern int rd_size; /* Defined in drivers/block/rd.c */
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extern int rd_size; /* Defined in drivers/block/rd.c */
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@ -343,12 +334,6 @@ static void __init iSeries_init_early(void)
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iSeries_recal_tb = get_tb();
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iSeries_recal_tb = get_tb();
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iSeries_recal_titan = HvCallXm_loadTod();
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iSeries_recal_titan = HvCallXm_loadTod();
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/*
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* Cache sizes must be initialized before hpte_init_iSeries is called
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* as the later need them for flush_icache_range()
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*/
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setup_iSeries_cache_sizes();
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/*
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/*
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* Initialize the hash table management pointers
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* Initialize the hash table management pointers
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*/
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*/
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@ -580,47 +565,6 @@ static void __init build_iSeries_Memory_Map(void)
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systemcfg->physicalMemorySize = chunk_to_addr(nextPhysChunk);
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systemcfg->physicalMemorySize = chunk_to_addr(nextPhysChunk);
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}
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}
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/*
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* Set up the variables that describe the cache line sizes
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* for this machine.
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*/
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static void __init setup_iSeries_cache_sizes(void)
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{
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unsigned int i, n;
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unsigned int procIx = get_paca()->lppaca.dyn_hv_phys_proc_index;
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systemcfg->icache_size =
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ppc64_caches.isize = xIoHriProcessorVpd[procIx].xInstCacheSize * 1024;
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systemcfg->icache_line_size =
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ppc64_caches.iline_size =
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xIoHriProcessorVpd[procIx].xInstCacheOperandSize;
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systemcfg->dcache_size =
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ppc64_caches.dsize =
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xIoHriProcessorVpd[procIx].xDataL1CacheSizeKB * 1024;
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systemcfg->dcache_line_size =
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ppc64_caches.dline_size =
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xIoHriProcessorVpd[procIx].xDataCacheOperandSize;
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ppc64_caches.ilines_per_page = PAGE_SIZE / ppc64_caches.iline_size;
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ppc64_caches.dlines_per_page = PAGE_SIZE / ppc64_caches.dline_size;
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i = ppc64_caches.iline_size;
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n = 0;
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while ((i = (i / 2)))
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++n;
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ppc64_caches.log_iline_size = n;
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i = ppc64_caches.dline_size;
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n = 0;
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while ((i = (i / 2)))
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++n;
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ppc64_caches.log_dline_size = n;
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printk("D-cache line size = %d\n",
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(unsigned int)ppc64_caches.dline_size);
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printk("I-cache line size = %d\n",
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(unsigned int)ppc64_caches.iline_size);
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}
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/*
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/*
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* Document me.
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* Document me.
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*/
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*/
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@ -636,36 +580,14 @@ static void __init iSeries_setup_arch(void)
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printk(KERN_INFO "Using dedicated idle loop\n");
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printk(KERN_INFO "Using dedicated idle loop\n");
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}
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}
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/* Add an eye catcher and the systemcfg layout version number */
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strcpy(systemcfg->eye_catcher, "SYSTEMCFG:PPC64");
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systemcfg->version.major = SYSTEMCFG_MAJOR;
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systemcfg->version.minor = SYSTEMCFG_MINOR;
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/* Setup the Lp Event Queue */
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/* Setup the Lp Event Queue */
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setup_hvlpevent_queue();
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setup_hvlpevent_queue();
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/* Compute processor frequency */
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procFreqHz = ((1UL << 34) * 1000000) /
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xIoHriProcessorVpd[procIx].xProcFreq;
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procFreqMhz = procFreqHz / 1000000;
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procFreqMhzHundreths = (procFreqHz / 10000) - (procFreqMhz * 100);
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ppc_proc_freq = procFreqHz;
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/* Compute time base frequency */
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tbFreqHz = ((1UL << 32) * 1000000) /
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xIoHriProcessorVpd[procIx].xTimeBaseFreq;
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tbFreqMhz = tbFreqHz / 1000000;
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tbFreqMhzHundreths = (tbFreqHz / 10000) - (tbFreqMhz * 100);
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ppc_tb_freq = tbFreqHz;
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printk("Max logical processors = %d\n",
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printk("Max logical processors = %d\n",
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itVpdAreas.xSlicMaxLogicalProcs);
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itVpdAreas.xSlicMaxLogicalProcs);
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printk("Max physical processors = %d\n",
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printk("Max physical processors = %d\n",
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itVpdAreas.xSlicMaxPhysicalProcs);
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itVpdAreas.xSlicMaxPhysicalProcs);
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printk("Processor frequency = %lu.%02lu\n", procFreqMhz,
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procFreqMhzHundreths);
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printk("Time base frequency = %lu.%02lu\n", tbFreqMhz,
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tbFreqMhzHundreths);
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systemcfg->processor = xIoHriProcessorVpd[procIx].xPVR;
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systemcfg->processor = xIoHriProcessorVpd[procIx].xPVR;
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printk("Processor version = %x\n", systemcfg->processor);
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printk("Processor version = %x\n", systemcfg->processor);
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}
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}
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@ -709,49 +631,6 @@ static void iSeries_halt(void)
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mf_power_off();
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mf_power_off();
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}
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}
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/*
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* void __init iSeries_calibrate_decr()
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*
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* Description:
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* This routine retrieves the internal processor frequency from the VPD,
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* and sets up the kernel timer decrementer based on that value.
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*
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*/
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static void __init iSeries_calibrate_decr(void)
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{
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unsigned long cyclesPerUsec;
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struct div_result divres;
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/* Compute decrementer (and TB) frequency in cycles/sec */
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cyclesPerUsec = ppc_tb_freq / 1000000;
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/*
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* Set the amount to refresh the decrementer by. This
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* is the number of decrementer ticks it takes for
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* 1/HZ seconds.
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*/
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tb_ticks_per_jiffy = ppc_tb_freq / HZ;
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#if 0
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/* TEST CODE FOR ADJTIME */
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tb_ticks_per_jiffy += tb_ticks_per_jiffy / 5000;
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/* END OF TEST CODE */
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#endif
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/*
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* tb_ticks_per_sec = freq; would give better accuracy
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* but tb_ticks_per_sec = tb_ticks_per_jiffy*HZ; assures
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* that jiffies (and xtime) will match the time returned
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* by do_gettimeofday.
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*/
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tb_ticks_per_sec = tb_ticks_per_jiffy * HZ;
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tb_ticks_per_usec = cyclesPerUsec;
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tb_to_us = mulhwu_scale_factor(ppc_tb_freq, 1000000);
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div128_by_32(1024 * 1024, 0, tb_ticks_per_sec, &divres);
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tb_to_xs = divres.result_low;
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setup_default_decr();
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}
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static void __init iSeries_progress(char * st, unsigned short code)
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static void __init iSeries_progress(char * st, unsigned short code)
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{
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{
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printk("Progress: [%04x] - %s\n", (unsigned)code, st);
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printk("Progress: [%04x] - %s\n", (unsigned)code, st);
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@ -901,7 +780,7 @@ struct machdep_calls __initdata iseries_md = {
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.get_boot_time = iSeries_get_boot_time,
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.get_boot_time = iSeries_get_boot_time,
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.set_rtc_time = iSeries_set_rtc_time,
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.set_rtc_time = iSeries_set_rtc_time,
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.get_rtc_time = iSeries_get_rtc_time,
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.get_rtc_time = iSeries_get_rtc_time,
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.calibrate_decr = iSeries_calibrate_decr,
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.calibrate_decr = generic_calibrate_decr,
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.progress = iSeries_progress,
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.progress = iSeries_progress,
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.probe = iseries_probe,
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.probe = iseries_probe,
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/* XXX Implement enable_pmcs for iSeries */
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/* XXX Implement enable_pmcs for iSeries */
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@ -1032,6 +911,57 @@ void dt_prop_empty(struct iseries_flat_dt *dt, char *name)
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dt_prop(dt, name, NULL, 0);
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dt_prop(dt, name, NULL, 0);
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}
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}
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void dt_cpus(struct iseries_flat_dt *dt)
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{
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unsigned char buf[32];
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unsigned char *p;
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unsigned int i, index;
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struct IoHriProcessorVpd *d;
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/* yuck */
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snprintf(buf, 32, "PowerPC,%s", cur_cpu_spec->cpu_name);
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p = strchr(buf, ' ');
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if (!p) p = buf + strlen(buf);
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dt_start_node(dt, "cpus");
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dt_prop_u32(dt, "#address-cells", 1);
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dt_prop_u32(dt, "#size-cells", 0);
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for (i = 0; i < NR_CPUS; i++) {
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if (paca[i].lppaca.dyn_proc_status >= 2)
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continue;
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snprintf(p, 32 - (p - buf), "@%d", i);
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dt_start_node(dt, buf);
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dt_prop_str(dt, "device_type", "cpu");
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index = paca[i].lppaca.dyn_hv_phys_proc_index;
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d = &xIoHriProcessorVpd[index];
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dt_prop_u32(dt, "i-cache-size", d->xInstCacheSize * 1024);
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dt_prop_u32(dt, "i-cache-line-size", d->xInstCacheOperandSize);
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dt_prop_u32(dt, "d-cache-size", d->xDataL1CacheSizeKB * 1024);
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dt_prop_u32(dt, "d-cache-line-size", d->xDataCacheOperandSize);
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/* magic conversions to Hz copied from old code */
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dt_prop_u32(dt, "clock-frequency",
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((1UL << 34) * 1000000) / d->xProcFreq);
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dt_prop_u32(dt, "timebase-frequency",
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((1UL << 32) * 1000000) / d->xTimeBaseFreq);
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dt_prop_u32(dt, "reg", i);
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if (dt->header.boot_cpuid_phys == i)
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dt_prop_empty(dt, "linux,boot-cpu");
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dt_end_node(dt);
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}
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dt_end_node(dt);
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}
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void build_flat_dt(struct iseries_flat_dt *dt)
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void build_flat_dt(struct iseries_flat_dt *dt)
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{
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{
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u64 tmp[2];
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u64 tmp[2];
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@ -1057,6 +987,8 @@ void build_flat_dt(struct iseries_flat_dt *dt)
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dt_prop_u32(dt, "linux,platform", PLATFORM_ISERIES_LPAR);
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dt_prop_u32(dt, "linux,platform", PLATFORM_ISERIES_LPAR);
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dt_end_node(dt);
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dt_end_node(dt);
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dt_cpus(dt);
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dt_end_node(dt);
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dt_end_node(dt);
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dt_push_u32(dt, OF_DT_END);
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dt_push_u32(dt, OF_DT_END);
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@ -82,35 +82,9 @@ static void smp_iSeries_message_pass(int target, int msg)
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}
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}
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}
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}
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static int smp_iSeries_numProcs(void)
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{
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unsigned np, i;
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np = 0;
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for (i=0; i < NR_CPUS; ++i) {
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if (paca[i].lppaca.dyn_proc_status < 2) {
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cpu_set(i, cpu_possible_map);
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cpu_set(i, cpu_present_map);
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cpu_set(i, cpu_sibling_map[i]);
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++np;
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}
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}
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return np;
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}
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static int smp_iSeries_probe(void)
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static int smp_iSeries_probe(void)
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{
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{
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unsigned i;
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return cpus_weight(cpu_possible_map);
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unsigned np = 0;
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for (i=0; i < NR_CPUS; ++i) {
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if (paca[i].lppaca.dyn_proc_status < 2) {
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/*paca[i].active = 1;*/
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++np;
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}
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}
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return np;
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}
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}
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static void smp_iSeries_kick_cpu(int nr)
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static void smp_iSeries_kick_cpu(int nr)
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@ -144,6 +118,4 @@ static struct smp_ops_t iSeries_smp_ops = {
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void __init smp_init_iSeries(void)
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void __init smp_init_iSeries(void)
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{
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{
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smp_ops = &iSeries_smp_ops;
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smp_ops = &iSeries_smp_ops;
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systemcfg->processorCount = smp_iSeries_numProcs();
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}
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}
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@ -465,7 +465,7 @@ int do_settimeofday(struct timespec *tv)
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EXPORT_SYMBOL(do_settimeofday);
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EXPORT_SYMBOL(do_settimeofday);
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#if defined(CONFIG_PPC_PSERIES) || defined(CONFIG_PPC_MAPLE) || defined(CONFIG_PPC_BPA)
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#if defined(CONFIG_PPC_PSERIES) || defined(CONFIG_PPC_MAPLE) || defined(CONFIG_PPC_BPA) || defined(CONFIG_PPC_ISERIES)
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void __init generic_calibrate_decr(void)
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void __init generic_calibrate_decr(void)
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{
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{
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struct device_node *cpu;
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struct device_node *cpu;
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