From 95ff48c2e7a6f4968b1f795462e7e3af334c2749 Mon Sep 17 00:00:00 2001 From: Lucas De Marchi Date: Mon, 13 Mar 2023 17:30:10 -0700 Subject: [PATCH] drm/xe: Add missing ADL-P engine workaround Add the one missing workaround for ADL-P when comparing to i915 up to commit 7cdae9e9ee5e ("drm/i915: Move DG2 tuning to the right function"). Signed-off-by: Lucas De Marchi Reviewed-by: Matt Roper Link: https://lore.kernel.org/r/20230314003012.2600353-13-lucas.demarchi@intel.com Signed-off-by: Rodrigo Vivi --- drivers/gpu/drm/xe/xe_wa.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/drivers/gpu/drm/xe/xe_wa.c b/drivers/gpu/drm/xe/xe_wa.c index 0621706f46e6..e21c7ec53b2f 100644 --- a/drivers/gpu/drm/xe/xe_wa.c +++ b/drivers/gpu/drm/xe/xe_wa.c @@ -299,6 +299,16 @@ static const struct xe_rtp_entry engine_was[] = { XE_RTP_ACTION_FLAG(MASKED_REG))) }, + /* ADL-P */ + + { XE_RTP_NAME("1607297627, 1607030317, 1607186500"), + XE_RTP_RULES(PLATFORM(ALDERLAKE_P), ENGINE_CLASS(RENDER)), + XE_RTP_ACTIONS(SET(RING_PSMI_CTL(RENDER_RING_BASE), + GEN12_WAIT_FOR_EVENT_POWER_DOWN_DISABLE | + GEN8_RC_SEMA_IDLE_MSG_DISABLE, + XE_RTP_ACTION_FLAG(MASKED_REG))) + }, + /* DG2 */ { XE_RTP_NAME("22013037850"),