iv/linux
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

net/mlx5e: Allow coexistence of CQE compression and HW TS PTP

Browse Source 
Update setting HW time-stamp to allow coexistence with CQE compression.
Turn on RX PTP indication and try to reopen the channels. On success,
coexistence with CQE compression is enabled. Otherwise, fall-back to
turning off CQE compression.

Signed-off-by: Aya Levin <ayal@nvidia.com>
Reviewed-by: Tariq Toukan <tariqt@nvidia.com>
Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
This commit is contained in:
Aya Levin 2021-01-20 16:59:27 +02:00 committed by Saeed Mahameed
parent e5fe49465d
commit 960fbfe222
3 changed files with 35 additions and 12 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
drivers/net/ethernet/mellanox/mlx5/core/en.h
View File

@ -269,6 +269,7 @@ struct mlx5e_params {
struct mlx5e_xsk *xsk; struct mlx5e_xsk *xsk;
unsigned int sw_mtu; unsigned int sw_mtu;
int hard_mtu; int hard_mtu;
bool ptp_rx;
}; };
enum { enum {

3
drivers/net/ethernet/mellanox/mlx5/core/en/ptp.c
View File

@ -579,6 +579,9 @@ static int mlx5e_ptp_set_state(struct mlx5e_ptp *c, struct mlx5e_params *params)
if (MLX5E_GET_PFLAG(params, MLX5E_PFLAG_TX_PORT_TS)) if (MLX5E_GET_PFLAG(params, MLX5E_PFLAG_TX_PORT_TS))
__set_bit(MLX5E_PTP_STATE_TX, c->state); __set_bit(MLX5E_PTP_STATE_TX, c->state);
if (params->ptp_rx)
__set_bit(MLX5E_PTP_STATE_RX, c->state);
return bitmap_empty(c->state, MLX5E_PTP_STATE_NUM_STATES) ? -EINVAL : 0; return bitmap_empty(c->state, MLX5E_PTP_STATE_NUM_STATES) ? -EINVAL : 0;
} }

43
drivers/net/ethernet/mellanox/mlx5/core/en_main.c
View File

@ -2087,7 +2087,7 @@ int mlx5e_open_channels(struct mlx5e_priv *priv,
goto err_close_channels; goto err_close_channels;
} }
if (MLX5E_GET_PFLAG(&chs->params, MLX5E_PFLAG_TX_PORT_TS)) { if (MLX5E_GET_PFLAG(&chs->params, MLX5E_PFLAG_TX_PORT_TS) || chs->params.ptp_rx) {
err = mlx5e_ptp_open(priv, &chs->params, chs->c[0]->lag_port, &chs->ptp); err = mlx5e_ptp_open(priv, &chs->params, chs->c[0]->lag_port, &chs->ptp);
if (err) if (err)
goto err_close_channels; goto err_close_channels;
@ -2688,6 +2688,8 @@ static int mlx5e_update_netdev_queues(struct mlx5e_priv *priv)
nch = priv->channels.params.num_channels; nch = priv->channels.params.num_channels;
ntc = priv->channels.params.num_tc; ntc = priv->channels.params.num_tc;
num_rxqs = nch * priv->profile->rq_groups; num_rxqs = nch * priv->profile->rq_groups;
if (priv->channels.params.ptp_rx)
num_rxqs++;
mlx5e_netdev_set_tcs(netdev, nch, ntc); mlx5e_netdev_set_tcs(netdev, nch, ntc);
@ -3968,9 +3970,18 @@ static int mlx5e_change_nic_mtu(struct net_device *netdev, int new_mtu)
return mlx5e_change_mtu(netdev, new_mtu, mlx5e_set_dev_port_mtu_ctx); return mlx5e_change_mtu(netdev, new_mtu, mlx5e_set_dev_port_mtu_ctx);
} }
static int mlx5e_ptp_rx_manage_fs_ctx(struct mlx5e_priv *priv, void *ctx)
{
bool set = *(bool *)ctx;
return mlx5e_ptp_rx_manage_fs(priv, set);
}
int mlx5e_hwstamp_set(struct mlx5e_priv *priv, struct ifreq *ifr) int mlx5e_hwstamp_set(struct mlx5e_priv *priv, struct ifreq *ifr)
{ {
struct mlx5e_channels new_channels = {};
struct hwtstamp_config config; struct hwtstamp_config config;
bool rx_cqe_compress_def;
int err; int err;
if (!MLX5_CAP_GEN(priv->mdev, device_frequency_khz) || if (!MLX5_CAP_GEN(priv->mdev, device_frequency_khz) ||
@ -3990,11 +4001,13 @@ int mlx5e_hwstamp_set(struct mlx5e_priv *priv, struct ifreq *ifr)
} }
mutex_lock(&priv->state_lock); mutex_lock(&priv->state_lock);
new_channels.params = priv->channels.params;
rx_cqe_compress_def = priv->channels.params.rx_cqe_compress_def;
/* RX HW timestamp */ /* RX HW timestamp */
switch (config.rx_filter) { switch (config.rx_filter) {
case HWTSTAMP_FILTER_NONE: case HWTSTAMP_FILTER_NONE:
/* Reset CQE compression to Admin default */ new_channels.params.ptp_rx = false;
mlx5e_modify_rx_cqe_compression_locked(priv, priv->channels.params.rx_cqe_compress_def);
break; break;
case HWTSTAMP_FILTER_ALL: case HWTSTAMP_FILTER_ALL:
case HWTSTAMP_FILTER_SOME: case HWTSTAMP_FILTER_SOME:
@ -4011,15 +4024,7 @@ int mlx5e_hwstamp_set(struct mlx5e_priv *priv, struct ifreq *ifr)
case HWTSTAMP_FILTER_PTP_V2_SYNC: case HWTSTAMP_FILTER_PTP_V2_SYNC:
case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ: case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
case HWTSTAMP_FILTER_NTP_ALL: case HWTSTAMP_FILTER_NTP_ALL:
/* Disable CQE compression */ new_channels.params.ptp_rx = rx_cqe_compress_def;
if (MLX5E_GET_PFLAG(&priv->channels.params, MLX5E_PFLAG_RX_CQE_COMPRESS))
netdev_warn(priv->netdev, "Disabling RX cqe compression\n");
err = mlx5e_modify_rx_cqe_compression_locked(priv, false);
if (err) {
netdev_err(priv->netdev, "Failed disabling cqe compression err=%d\n", err);
mutex_unlock(&priv->state_lock);
return err;
}
config.rx_filter = HWTSTAMP_FILTER_ALL; config.rx_filter = HWTSTAMP_FILTER_ALL;
break; break;
default: default:
@ -4027,6 +4032,20 @@ int mlx5e_hwstamp_set(struct mlx5e_priv *priv, struct ifreq *ifr)
return -ERANGE; return -ERANGE;
} }
if (new_channels.params.ptp_rx == priv->channels.params.ptp_rx)
goto out;
if (!test_bit(MLX5E_STATE_OPENED, &priv->state)) {
priv->channels.params = new_channels.params;
goto out;
}
err = mlx5e_safe_switch_channels(priv, &new_channels, mlx5e_ptp_rx_manage_fs_ctx,
&new_channels.params.ptp_rx);
if (err) {
mutex_unlock(&priv->state_lock);
return err;
}
out:
memcpy(&priv->tstamp, &config, sizeof(config)); memcpy(&priv->tstamp, &config, sizeof(config));
mutex_unlock(&priv->state_lock); mutex_unlock(&priv->state_lock);