arm64: Factor out TTBR0_EL1 post-update workaround into a specific asm macro
From: Catalin Marinas <catalin.marinas@arm.com> commit f33bcf03e6079668da6bf4eec4a7dcf9289131d0 upstream. This patch takes the errata workaround code out of cpu_do_switch_mm into a dedicated post_ttbr0_update_workaround macro which will be reused in a subsequent patch. Cc: Will Deacon <will.deacon@arm.com> Cc: James Morse <james.morse@arm.com> Cc: Kees Cook <keescook@chromium.org> Reviewed-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Mark Rutland <mark.rutland@arm.com> [v4.9 backport] Tested-by: Greg Hackmann <ghackmann@google.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -434,4 +434,18 @@ alternative_endif
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.macro pte_to_phys, phys, pte
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and \phys, \pte, #(((1 << (48 - PAGE_SHIFT)) - 1) << PAGE_SHIFT)
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.endm
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/*
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* Errata workaround post TTBR0_EL1 update.
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*/
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.macro post_ttbr0_update_workaround
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#ifdef CONFIG_CAVIUM_ERRATUM_27456
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alternative_if ARM64_WORKAROUND_CAVIUM_27456
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ic iallu
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dsb nsh
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isb
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alternative_else_nop_endif
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#endif
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.endm
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#endif /* __ASM_ASSEMBLER_H */
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@ -139,11 +139,7 @@ ENTRY(cpu_do_switch_mm)
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isb
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msr ttbr0_el1, x0 // now update TTBR0
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isb
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alternative_if ARM64_WORKAROUND_CAVIUM_27456
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ic iallu
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dsb nsh
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isb
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alternative_else_nop_endif
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post_ttbr0_update_workaround
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ret
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ENDPROC(cpu_do_switch_mm)
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