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powerpc/powernv/pci: Move tce size parsing to pci-ioda-tce.c

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Move it in with the rest of the TCE wrangling rather than carting around
a static prototype in pci-ioda.c

Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
Reviewed-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20200406030745.24595-7-oohall@gmail.com
This commit is contained in:
Oliver O'Halloran 2020-04-06 13:07:44 +10:00 committed by Michael Ellerman
parent f39b8b10fc
commit 96e2006a9d
3 changed files with 30 additions and 30 deletions
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28
arch/powerpc/platforms/powernv/pci-ioda-tce.c
View File

@ -17,6 +17,34 @@
#include <asm/tce.h>
#include "pci.h"
unsigned long pnv_ioda_parse_tce_sizes(struct pnv_phb *phb)
{
struct pci_controller *hose = phb->hose;
struct device_node *dn = hose->dn;
unsigned long mask = 0;
int i, rc, count;
u32 val;
count = of_property_count_u32_elems(dn, "ibm,supported-tce-sizes");
if (count <= 0) {
mask = SZ_4K | SZ_64K;
/* Add 16M for POWER8 by default */
if (cpu_has_feature(CPU_FTR_ARCH_207S) &&
!cpu_has_feature(CPU_FTR_ARCH_300))
mask |= SZ_16M | SZ_256M;
return mask;
}
for (i = 0; i < count; i++) {
rc = of_property_read_u32_index(dn, "ibm,supported-tce-sizes",
i, &val);
if (rc == 0)
mask |= 1ULL << val;
}
return mask;
}
void pnv_pci_setup_iommu_table(struct iommu_table *tbl,
void *tce_mem, u64 tce_size,
u64 dma_offset, unsigned int page_shift)

30
arch/powerpc/platforms/powernv/pci-ioda.c
View File

@ -2585,8 +2585,6 @@ static struct iommu_table_group_ops pnv_pci_ioda2_ops = {
.release_ownership = pnv_ioda2_release_ownership,
};
static unsigned long pnv_ioda_parse_tce_sizes(struct pnv_phb *phb);
static void pnv_pci_ioda_setup_iommu_api(void)
{
struct pci_controller *hose;
@ -2638,34 +2636,6 @@ static void pnv_pci_ioda_setup_iommu_api(void)
static void pnv_pci_ioda_setup_iommu_api(void) { };
#endif
static unsigned long pnv_ioda_parse_tce_sizes(struct pnv_phb *phb)
{
struct pci_controller *hose = phb->hose;
struct device_node *dn = hose->dn;
unsigned long mask = 0;
int i, rc, count;
u32 val;
count = of_property_count_u32_elems(dn, "ibm,supported-tce-sizes");
if (count <= 0) {
mask = SZ_4K | SZ_64K;
/* Add 16M for POWER8 by default */
if (cpu_has_feature(CPU_FTR_ARCH_207S) &&
!cpu_has_feature(CPU_FTR_ARCH_300))
mask |= SZ_16M | SZ_256M;
return mask;
}
for (i = 0; i < count; i++) {
rc = of_property_read_u32_index(dn, "ibm,supported-tce-sizes",
i, &val);
if (rc == 0)
mask |= 1ULL << val;
}
return mask;
}
static void pnv_pci_ioda2_setup_dma_pe(struct pnv_phb *phb,
struct pnv_ioda_pe *pe)
{

2
arch/powerpc/platforms/powernv/pci.h
View File

@ -244,4 +244,6 @@ extern void pnv_pci_setup_iommu_table(struct iommu_table *tbl,
void *tce_mem, u64 tce_size,
u64 dma_offset, unsigned int page_shift);
extern unsigned long pnv_ioda_parse_tce_sizes(struct pnv_phb *phb);
#endif /* __POWERNV_PCI_H */