mtd: nand: add support for Micron on-die ECC
Now that the core NAND subsystem has support for on-die ECC, this commit brings the necessary code to support on-die ECC on Micron NANDs. In micron_nand_init(), we detect if the Micron NAND chip supports on-die ECC mode, by checking a number of conditions: - It must be an ONFI NAND - It must be a SLC NAND - Enabling *and* disabling on-die ECC must work - The on-die ECC must be correcting 4 bits per 512 bytes of data. Some Micron NAND chips have an on-die ECC able to correct 8 bits per 512 bytes of data, but they work slightly differently and therefore we don't support them in this patch. Then, if the on-die ECC cannot be disabled (some Micron NAND have on-die ECC forcefully enabled), we bail out, as we don't support such NANDs. Indeed, the implementation of raw_read()/raw_write() make the assumption that on-die ECC can be disabled. Support for Micron NANDs with on-die ECC forcefully enabled can easily be added, but in the absence of such HW for testing, we preferred to simply bail out. If the on-die ECC is supported, and requested in the Device Tree, then it is indeed enabled, by using custom implementations of the ->read_page(), ->read_page_raw(), ->write_page() and ->write_page_raw() operation to properly handle the on-die ECC. In the non-raw functions, we need to enable the internal ECC engine before issuing the NAND_CMD_READ0 or NAND_CMD_SEQIN commands, which is why we set the NAND_ECC_CUSTOM_PAGE_ACCESS option at initialization time (it asks the NAND core to let the NAND driver issue those commands). Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
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@ -17,6 +17,12 @@
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#include <linux/mtd/nand.h>
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/*
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* Special Micron status bit that indicates when the block has been
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* corrected by on-die ECC and should be rewritten
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*/
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#define NAND_STATUS_WRITE_RECOMMENDED BIT(3)
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struct nand_onfi_vendor_micron {
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u8 two_plane_read;
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u8 read_cache;
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@ -66,9 +72,191 @@ static int micron_nand_onfi_init(struct nand_chip *chip)
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return 0;
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}
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static int micron_nand_on_die_ooblayout_ecc(struct mtd_info *mtd, int section,
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struct mtd_oob_region *oobregion)
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{
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if (section >= 4)
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return -ERANGE;
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oobregion->offset = (section * 16) + 8;
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oobregion->length = 8;
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return 0;
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}
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static int micron_nand_on_die_ooblayout_free(struct mtd_info *mtd, int section,
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struct mtd_oob_region *oobregion)
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{
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if (section >= 4)
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return -ERANGE;
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oobregion->offset = (section * 16) + 2;
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oobregion->length = 6;
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return 0;
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}
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static const struct mtd_ooblayout_ops micron_nand_on_die_ooblayout_ops = {
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.ecc = micron_nand_on_die_ooblayout_ecc,
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.free = micron_nand_on_die_ooblayout_free,
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};
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static int micron_nand_on_die_ecc_setup(struct nand_chip *chip, bool enable)
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{
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u8 feature[ONFI_SUBFEATURE_PARAM_LEN] = { 0, };
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if (enable)
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feature[0] |= ONFI_FEATURE_ON_DIE_ECC_EN;
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return chip->onfi_set_features(nand_to_mtd(chip), chip,
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ONFI_FEATURE_ON_DIE_ECC, feature);
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}
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static int
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micron_nand_read_page_on_die_ecc(struct mtd_info *mtd, struct nand_chip *chip,
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uint8_t *buf, int oob_required,
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int page)
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{
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int status;
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int max_bitflips = 0;
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micron_nand_on_die_ecc_setup(chip, true);
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chip->cmdfunc(mtd, NAND_CMD_READ0, 0x00, page);
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chip->cmdfunc(mtd, NAND_CMD_STATUS, -1, -1);
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status = chip->read_byte(mtd);
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if (status & NAND_STATUS_FAIL)
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mtd->ecc_stats.failed++;
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/*
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* The internal ECC doesn't tell us the number of bitflips
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* that have been corrected, but tells us if it recommends to
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* rewrite the block. If it's the case, then we pretend we had
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* a number of bitflips equal to the ECC strength, which will
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* hint the NAND core to rewrite the block.
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*/
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else if (status & NAND_STATUS_WRITE_RECOMMENDED)
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max_bitflips = chip->ecc.strength;
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chip->cmdfunc(mtd, NAND_CMD_READ0, -1, -1);
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nand_read_page_raw(mtd, chip, buf, oob_required, page);
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micron_nand_on_die_ecc_setup(chip, false);
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return max_bitflips;
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}
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static int
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micron_nand_write_page_on_die_ecc(struct mtd_info *mtd, struct nand_chip *chip,
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const uint8_t *buf, int oob_required,
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int page)
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{
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micron_nand_on_die_ecc_setup(chip, true);
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chip->cmdfunc(mtd, NAND_CMD_SEQIN, 0x00, page);
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nand_write_page_raw(mtd, chip, buf, oob_required, page);
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chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1);
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micron_nand_on_die_ecc_setup(chip, false);
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return 0;
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}
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static int
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micron_nand_read_page_raw_on_die_ecc(struct mtd_info *mtd,
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struct nand_chip *chip,
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uint8_t *buf, int oob_required,
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int page)
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{
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chip->cmdfunc(mtd, NAND_CMD_READ0, 0x00, page);
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nand_read_page_raw(mtd, chip, buf, oob_required, page);
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return 0;
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}
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static int
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micron_nand_write_page_raw_on_die_ecc(struct mtd_info *mtd,
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struct nand_chip *chip,
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const uint8_t *buf, int oob_required,
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int page)
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{
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chip->cmdfunc(mtd, NAND_CMD_SEQIN, 0x00, page);
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nand_write_page_raw(mtd, chip, buf, oob_required, page);
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chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1);
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return 0;
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}
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enum {
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/* The NAND flash doesn't support on-die ECC */
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MICRON_ON_DIE_UNSUPPORTED,
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/*
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* The NAND flash supports on-die ECC and it can be
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* enabled/disabled by a set features command.
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*/
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MICRON_ON_DIE_SUPPORTED,
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/*
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* The NAND flash supports on-die ECC, and it cannot be
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* disabled.
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*/
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MICRON_ON_DIE_MANDATORY,
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};
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/*
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* Try to detect if the NAND support on-die ECC. To do this, we enable
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* the feature, and read back if it has been enabled as expected. We
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* also check if it can be disabled, because some Micron NANDs do not
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* allow disabling the on-die ECC and we don't support such NANDs for
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* now.
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*
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* This function also has the side effect of disabling on-die ECC if
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* it had been left enabled by the firmware/bootloader.
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*/
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static int micron_supports_on_die_ecc(struct nand_chip *chip)
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{
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u8 feature[ONFI_SUBFEATURE_PARAM_LEN] = { 0, };
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int ret;
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if (chip->onfi_version == 0)
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return MICRON_ON_DIE_UNSUPPORTED;
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if (chip->bits_per_cell != 1)
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return MICRON_ON_DIE_UNSUPPORTED;
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ret = micron_nand_on_die_ecc_setup(chip, true);
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if (ret)
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return MICRON_ON_DIE_UNSUPPORTED;
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chip->onfi_get_features(nand_to_mtd(chip), chip,
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ONFI_FEATURE_ON_DIE_ECC, feature);
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if ((feature[0] & ONFI_FEATURE_ON_DIE_ECC_EN) == 0)
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return MICRON_ON_DIE_UNSUPPORTED;
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ret = micron_nand_on_die_ecc_setup(chip, false);
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if (ret)
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return MICRON_ON_DIE_UNSUPPORTED;
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chip->onfi_get_features(nand_to_mtd(chip), chip,
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ONFI_FEATURE_ON_DIE_ECC, feature);
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if (feature[0] & ONFI_FEATURE_ON_DIE_ECC_EN)
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return MICRON_ON_DIE_MANDATORY;
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/*
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* Some Micron NANDs have an on-die ECC of 4/512, some other
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* 8/512. We only support the former.
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*/
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if (chip->onfi_params.ecc_bits != 4)
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return MICRON_ON_DIE_UNSUPPORTED;
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return MICRON_ON_DIE_SUPPORTED;
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}
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static int micron_nand_init(struct nand_chip *chip)
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{
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struct mtd_info *mtd = nand_to_mtd(chip);
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int ondie;
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int ret;
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ret = micron_nand_onfi_init(chip);
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@ -78,6 +266,34 @@ static int micron_nand_init(struct nand_chip *chip)
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if (mtd->writesize == 2048)
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chip->bbt_options |= NAND_BBT_SCAN2NDPAGE;
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ondie = micron_supports_on_die_ecc(chip);
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if (ondie == MICRON_ON_DIE_MANDATORY) {
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pr_err("On-die ECC forcefully enabled, not supported\n");
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return -EINVAL;
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}
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if (chip->ecc.mode == NAND_ECC_ON_DIE) {
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if (ondie == MICRON_ON_DIE_UNSUPPORTED) {
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pr_err("On-die ECC selected but not supported\n");
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return -EINVAL;
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}
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chip->ecc.options = NAND_ECC_CUSTOM_PAGE_ACCESS;
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chip->ecc.bytes = 8;
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chip->ecc.size = 512;
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chip->ecc.strength = 4;
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chip->ecc.algo = NAND_ECC_BCH;
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chip->ecc.read_page = micron_nand_read_page_on_die_ecc;
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chip->ecc.write_page = micron_nand_write_page_on_die_ecc;
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chip->ecc.read_page_raw =
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micron_nand_read_page_raw_on_die_ecc;
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chip->ecc.write_page_raw =
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micron_nand_write_page_raw_on_die_ecc;
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mtd_set_ooblayout(mtd, µn_nand_on_die_ooblayout_ops);
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}
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return 0;
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}
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@ -258,6 +258,8 @@ struct nand_chip;
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/* Vendor-specific feature address (Micron) */
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#define ONFI_FEATURE_ADDR_READ_RETRY 0x89
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#define ONFI_FEATURE_ON_DIE_ECC 0x90
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#define ONFI_FEATURE_ON_DIE_ECC_EN BIT(3)
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/* ONFI subfeature parameters length */
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#define ONFI_SUBFEATURE_PARAM_LEN 4
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