MIPS: tlbex: Remove some RIXI redundancy
The cpu_has_rixi cases in build_update_entries are now identical to the non-RIXI cases with the one exception of the r45k_bvahwbug case which is hardcoded as never happening anyway & presumably was either missed from the RIXI path or would never happen on a CPU with RIXI support. Remove the redundant checks & duplication. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Cc: Steven J. Hill <Steven.Hill@imgtec.com> Cc: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com> Cc: Paul Gortmaker <paul.gortmaker@windriver.com> Cc: linux-kernel@vger.kernel.org Cc: James Hogan <james.hogan@imgtec.com> Cc: Markos Chandras <markos.chandras@imgtec.com> Patchwork: https://patchwork.linux-mips.org/patch/11215/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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@ -1009,15 +1009,9 @@ static void build_update_entries(u32 **p, unsigned int tmp, unsigned int ptep)
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if (cpu_has_64bits) {
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uasm_i_ld(p, tmp, 0, ptep); /* get even pte */
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uasm_i_ld(p, ptep, sizeof(pte_t), ptep); /* get odd pte */
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if (cpu_has_rixi) {
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build_convert_pte_to_entrylo(p, tmp);
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UASM_i_MTC0(p, tmp, C0_ENTRYLO0); /* load it */
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build_convert_pte_to_entrylo(p, ptep);
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} else {
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build_convert_pte_to_entrylo(p, tmp);
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UASM_i_MTC0(p, tmp, C0_ENTRYLO0); /* load it */
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build_convert_pte_to_entrylo(p, ptep);
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}
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build_convert_pte_to_entrylo(p, tmp);
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UASM_i_MTC0(p, tmp, C0_ENTRYLO0); /* load it */
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build_convert_pte_to_entrylo(p, ptep);
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UASM_i_MTC0(p, ptep, C0_ENTRYLO1); /* load it */
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} else {
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int pte_off_even = sizeof(pte_t) / 2;
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@ -1049,21 +1043,13 @@ static void build_update_entries(u32 **p, unsigned int tmp, unsigned int ptep)
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UASM_i_LW(p, ptep, sizeof(pte_t), ptep); /* get odd pte */
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if (r45k_bvahwbug())
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build_tlb_probe_entry(p);
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if (cpu_has_rixi) {
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build_convert_pte_to_entrylo(p, tmp);
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if (r4k_250MHZhwbug())
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UASM_i_MTC0(p, 0, C0_ENTRYLO0);
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UASM_i_MTC0(p, tmp, C0_ENTRYLO0); /* load it */
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build_convert_pte_to_entrylo(p, ptep);
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} else {
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build_convert_pte_to_entrylo(p, tmp);
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if (r4k_250MHZhwbug())
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UASM_i_MTC0(p, 0, C0_ENTRYLO0);
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UASM_i_MTC0(p, tmp, C0_ENTRYLO0); /* load it */
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build_convert_pte_to_entrylo(p, ptep);
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if (r45k_bvahwbug())
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uasm_i_mfc0(p, tmp, C0_INDEX);
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}
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build_convert_pte_to_entrylo(p, tmp);
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if (r4k_250MHZhwbug())
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UASM_i_MTC0(p, 0, C0_ENTRYLO0);
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UASM_i_MTC0(p, tmp, C0_ENTRYLO0); /* load it */
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build_convert_pte_to_entrylo(p, ptep);
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if (r45k_bvahwbug())
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uasm_i_mfc0(p, tmp, C0_INDEX);
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if (r4k_250MHZhwbug())
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UASM_i_MTC0(p, 0, C0_ENTRYLO1);
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UASM_i_MTC0(p, ptep, C0_ENTRYLO1); /* load it */
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