media: v4l: Add support for CSI-1 and CCP2 busses
CCP2 and CSI-1, are older single data lane serial busses. [mchehab@s-opensource.com: don't use spaces for identation] Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com> Signed-off-by: Pavel Machek <pavel@ucw.cz> Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk> Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
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@ -638,6 +638,9 @@ static unsigned int pxa_mbus_config_compatible(const struct v4l2_mbus_config *cf
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mipi_clock = common_flags & (V4L2_MBUS_CSI2_NONCONTINUOUS_CLOCK |
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mipi_clock = common_flags & (V4L2_MBUS_CSI2_NONCONTINUOUS_CLOCK |
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V4L2_MBUS_CSI2_CONTINUOUS_CLOCK);
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V4L2_MBUS_CSI2_CONTINUOUS_CLOCK);
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return (!mipi_lanes || !mipi_clock) ? 0 : common_flags;
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return (!mipi_lanes || !mipi_clock) ? 0 : common_flags;
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default:
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__WARN();
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return -EINVAL;
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}
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}
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return 0;
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return 0;
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}
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}
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@ -508,6 +508,9 @@ unsigned int soc_mbus_config_compatible(const struct v4l2_mbus_config *cfg,
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mipi_clock = common_flags & (V4L2_MBUS_CSI2_NONCONTINUOUS_CLOCK |
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mipi_clock = common_flags & (V4L2_MBUS_CSI2_NONCONTINUOUS_CLOCK |
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V4L2_MBUS_CSI2_CONTINUOUS_CLOCK);
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V4L2_MBUS_CSI2_CONTINUOUS_CLOCK);
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return (!mipi_lanes || !mipi_clock) ? 0 : common_flags;
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return (!mipi_lanes || !mipi_clock) ? 0 : common_flags;
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default:
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__WARN();
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return -EINVAL;
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}
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}
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return 0;
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return 0;
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}
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}
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@ -154,6 +154,31 @@ static void v4l2_fwnode_endpoint_parse_parallel_bus(
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}
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}
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void v4l2_fwnode_endpoint_parse_csi1_bus(struct fwnode_handle *fwnode,
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struct v4l2_fwnode_endpoint *vep,
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u32 bus_type)
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{
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struct v4l2_fwnode_bus_mipi_csi1 *bus = &vep->bus.mipi_csi1;
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u32 v;
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if (!fwnode_property_read_u32(fwnode, "clock-inv", &v))
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bus->clock_inv = v;
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if (!fwnode_property_read_u32(fwnode, "strobe", &v))
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bus->strobe = v;
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if (!fwnode_property_read_u32(fwnode, "data-lanes", &v))
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bus->data_lane = v;
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if (!fwnode_property_read_u32(fwnode, "clock-lanes", &v))
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bus->clock_lane = v;
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if (bus_type == V4L2_FWNODE_BUS_TYPE_CCP2)
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vep->bus_type = V4L2_MBUS_CCP2;
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else
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vep->bus_type = V4L2_MBUS_CSI1;
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}
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/**
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/**
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* v4l2_fwnode_endpoint_parse() - parse all fwnode node properties
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* v4l2_fwnode_endpoint_parse() - parse all fwnode node properties
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* @fwnode: pointer to the endpoint's fwnode handle
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* @fwnode: pointer to the endpoint's fwnode handle
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@ -187,17 +212,28 @@ int v4l2_fwnode_endpoint_parse(struct fwnode_handle *fwnode,
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fwnode_property_read_u32(fwnode, "bus-type", &bus_type);
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fwnode_property_read_u32(fwnode, "bus-type", &bus_type);
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rval = v4l2_fwnode_endpoint_parse_csi2_bus(fwnode, vep);
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switch (bus_type) {
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if (rval)
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case V4L2_FWNODE_BUS_TYPE_GUESS:
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return rval;
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rval = v4l2_fwnode_endpoint_parse_csi2_bus(fwnode, vep);
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/*
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if (rval)
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* Parse the parallel video bus properties only if none
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return rval;
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* of the MIPI CSI-2 specific properties were found.
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/*
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*/
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* Parse the parallel video bus properties only if none
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if (vep->bus.mipi_csi2.flags == 0)
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* of the MIPI CSI-2 specific properties were found.
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v4l2_fwnode_endpoint_parse_parallel_bus(fwnode, vep);
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*/
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if (vep->bus.mipi_csi2.flags == 0)
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v4l2_fwnode_endpoint_parse_parallel_bus(fwnode, vep);
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return 0;
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return 0;
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case V4L2_FWNODE_BUS_TYPE_CCP2:
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case V4L2_FWNODE_BUS_TYPE_CSI1:
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v4l2_fwnode_endpoint_parse_csi1_bus(fwnode, vep, bus_type);
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return 0;
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default:
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pr_warn("unsupported bus type %u\n", bus_type);
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return -EINVAL;
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}
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}
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}
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EXPORT_SYMBOL_GPL(v4l2_fwnode_endpoint_parse);
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EXPORT_SYMBOL_GPL(v4l2_fwnode_endpoint_parse);
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@ -55,6 +55,24 @@ struct v4l2_fwnode_bus_parallel {
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unsigned char data_shift;
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unsigned char data_shift;
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};
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};
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/**
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* struct v4l2_fwnode_bus_mipi_csi1 - CSI-1/CCP2 data bus structure
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* @clock_inv: polarity of clock/strobe signal
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* false - not inverted, true - inverted
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* @strobe: false - data/clock, true - data/strobe
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* @lane_polarity: the polarities of the clock (index 0) and data lanes
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index (1)
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* @data_lane: the number of the data lane
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* @clock_lane: the number of the clock lane
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*/
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struct v4l2_fwnode_bus_mipi_csi1 {
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bool clock_inv;
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bool strobe;
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bool lane_polarity[2];
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unsigned char data_lane;
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unsigned char clock_lane;
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};
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/**
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/**
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* struct v4l2_fwnode_endpoint - the endpoint data structure
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* struct v4l2_fwnode_endpoint - the endpoint data structure
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* @base: fwnode endpoint of the v4l2_fwnode
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* @base: fwnode endpoint of the v4l2_fwnode
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@ -72,6 +90,7 @@ struct v4l2_fwnode_endpoint {
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enum v4l2_mbus_type bus_type;
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enum v4l2_mbus_type bus_type;
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union {
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union {
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struct v4l2_fwnode_bus_parallel parallel;
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struct v4l2_fwnode_bus_parallel parallel;
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struct v4l2_fwnode_bus_mipi_csi1 mipi_csi1;
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struct v4l2_fwnode_bus_mipi_csi2 mipi_csi2;
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struct v4l2_fwnode_bus_mipi_csi2 mipi_csi2;
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} bus;
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} bus;
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u64 *link_frequencies;
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u64 *link_frequencies;
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@ -69,11 +69,15 @@
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* @V4L2_MBUS_PARALLEL: parallel interface with hsync and vsync
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* @V4L2_MBUS_PARALLEL: parallel interface with hsync and vsync
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* @V4L2_MBUS_BT656: parallel interface with embedded synchronisation, can
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* @V4L2_MBUS_BT656: parallel interface with embedded synchronisation, can
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* also be used for BT.1120
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* also be used for BT.1120
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* @V4L2_MBUS_CSI1: MIPI CSI-1 serial interface
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* @V4L2_MBUS_CCP2: CCP2 (Compact Camera Port 2)
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* @V4L2_MBUS_CSI2: MIPI CSI-2 serial interface
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* @V4L2_MBUS_CSI2: MIPI CSI-2 serial interface
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*/
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*/
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enum v4l2_mbus_type {
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enum v4l2_mbus_type {
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V4L2_MBUS_PARALLEL,
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V4L2_MBUS_PARALLEL,
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V4L2_MBUS_BT656,
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V4L2_MBUS_BT656,
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V4L2_MBUS_CSI1,
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V4L2_MBUS_CCP2,
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V4L2_MBUS_CSI2,
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V4L2_MBUS_CSI2,
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};
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};
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