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drm/amdgpu: remove messages from IB tests

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We already print an error message that an IB test failed in the common
code.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Christian König 2018-10-29 16:12:42 +01:00 committed by Alex Deucher
parent 315fed0367
commit 98079389a8
14 changed files with 80 additions and 212 deletions
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18
drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
View File

@ -1243,30 +1243,20 @@ int amdgpu_uvd_ring_test_ib(struct amdgpu_ring *ring, long timeout)
{ {
struct dma_fence *fence; struct dma_fence *fence;
long r; long r;
uint32_t ip_instance = ring->me;
r = amdgpu_uvd_get_create_msg(ring, 1, NULL); r = amdgpu_uvd_get_create_msg(ring, 1, NULL);
if (r) { if (r)
DRM_ERROR("amdgpu: (%d)failed to get create msg (%ld).\n", ip_instance, r);
goto error; goto error;
}
r = amdgpu_uvd_get_destroy_msg(ring, 1, true, &fence); r = amdgpu_uvd_get_destroy_msg(ring, 1, true, &fence);
if (r) { if (r)
DRM_ERROR("amdgpu: (%d)failed to get destroy ib (%ld).\n", ip_instance, r);
goto error; goto error;
}
r = dma_fence_wait_timeout(fence, false, timeout); r = dma_fence_wait_timeout(fence, false, timeout);
if (r == 0) { if (r == 0)
DRM_ERROR("amdgpu: (%d)IB test timed out.\n", ip_instance);
r = -ETIMEDOUT; r = -ETIMEDOUT;
} else if (r < 0) { else if (r > 0)
DRM_ERROR("amdgpu: (%d)fence wait failed (%ld).\n", ip_instance, r);
} else {
DRM_DEBUG("ib test on (%d)ring %d succeeded\n", ip_instance, ring->idx);
r = 0; r = 0;
}
dma_fence_put(fence); dma_fence_put(fence);

18
drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c
View File

@ -1113,27 +1113,19 @@ int amdgpu_vce_ring_test_ib(struct amdgpu_ring *ring, long timeout)
return 0; return 0;
r = amdgpu_vce_get_create_msg(ring, 1, NULL); r = amdgpu_vce_get_create_msg(ring, 1, NULL);
if (r) { if (r)
DRM_ERROR("amdgpu: failed to get create msg (%ld).\n", r);
goto error; goto error;
}
r = amdgpu_vce_get_destroy_msg(ring, 1, true, &fence); r = amdgpu_vce_get_destroy_msg(ring, 1, true, &fence);
if (r) { if (r)
DRM_ERROR("amdgpu: failed to get destroy ib (%ld).\n", r);
goto error; goto error;
}
r = dma_fence_wait_timeout(fence, false, timeout); r = dma_fence_wait_timeout(fence, false, timeout);
if (r == 0) { if (r == 0)
DRM_ERROR("amdgpu: IB test timed out.\n");
r = -ETIMEDOUT; r = -ETIMEDOUT;
} else if (r < 0) { else if (r > 0)
DRM_ERROR("amdgpu: fence wait failed (%ld).\n", r);
} else {
DRM_DEBUG("ib test on ring %d succeeded\n", ring->idx);
r = 0; r = 0;
}
error: error:
dma_fence_put(fence); dma_fence_put(fence);
return r; return r;

54
drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
View File

@ -563,30 +563,20 @@ int amdgpu_vcn_dec_ring_test_ib(struct amdgpu_ring *ring, long timeout)
long r; long r;
r = amdgpu_vcn_dec_get_create_msg(ring, 1, NULL); r = amdgpu_vcn_dec_get_create_msg(ring, 1, NULL);
if (r) { if (r)
DRM_ERROR("amdgpu: failed to get create msg (%ld).\n", r);
goto error; goto error;
}
r = amdgpu_vcn_dec_get_destroy_msg(ring, 1, &fence); r = amdgpu_vcn_dec_get_destroy_msg(ring, 1, &fence);
if (r) { if (r)
DRM_ERROR("amdgpu: failed to get destroy ib (%ld).\n", r);
goto error; goto error;
}
r = dma_fence_wait_timeout(fence, false, timeout); r = dma_fence_wait_timeout(fence, false, timeout);
if (r == 0) { if (r == 0)
DRM_ERROR("amdgpu: IB test timed out.\n");
r = -ETIMEDOUT; r = -ETIMEDOUT;
} else if (r < 0) { else if (r > 0)
DRM_ERROR("amdgpu: fence wait failed (%ld).\n", r);
} else {
DRM_DEBUG("ib test on ring %d succeeded\n", ring->idx);
r = 0; r = 0;
}
dma_fence_put(fence); dma_fence_put(fence);
error: error:
return r; return r;
} }
@ -727,27 +717,19 @@ int amdgpu_vcn_enc_ring_test_ib(struct amdgpu_ring *ring, long timeout)
long r; long r;
r = amdgpu_vcn_enc_get_create_msg(ring, 1, NULL); r = amdgpu_vcn_enc_get_create_msg(ring, 1, NULL);
if (r) { if (r)
DRM_ERROR("amdgpu: failed to get create msg (%ld).\n", r);
goto error; goto error;
}
r = amdgpu_vcn_enc_get_destroy_msg(ring, 1, &fence); r = amdgpu_vcn_enc_get_destroy_msg(ring, 1, &fence);
if (r) { if (r)
DRM_ERROR("amdgpu: failed to get destroy ib (%ld).\n", r);
goto error; goto error;
}
r = dma_fence_wait_timeout(fence, false, timeout); r = dma_fence_wait_timeout(fence, false, timeout);
if (r == 0) { if (r == 0)
DRM_ERROR("amdgpu: IB test timed out.\n");
r = -ETIMEDOUT; r = -ETIMEDOUT;
} else if (r < 0) { else if (r > 0)
DRM_ERROR("amdgpu: fence wait failed (%ld).\n", r);
} else {
DRM_DEBUG("ib test on ring %d succeeded\n", ring->idx);
r = 0; r = 0;
}
error: error:
dma_fence_put(fence); dma_fence_put(fence);
return r; return r;
@ -832,21 +814,18 @@ int amdgpu_vcn_jpeg_ring_test_ib(struct amdgpu_ring *ring, long timeout)
long r = 0; long r = 0;
r = amdgpu_vcn_jpeg_set_reg(ring, 1, &fence); r = amdgpu_vcn_jpeg_set_reg(ring, 1, &fence);
if (r) { if (r)
DRM_ERROR("amdgpu: failed to set jpeg register (%ld).\n", r);
goto error; goto error;
}
r = dma_fence_wait_timeout(fence, false, timeout); r = dma_fence_wait_timeout(fence, false, timeout);
if (r == 0) { if (r == 0) {
DRM_ERROR("amdgpu: IB test timed out.\n");
r = -ETIMEDOUT; r = -ETIMEDOUT;
goto error; goto error;
} else if (r < 0) { } else if (r < 0) {
DRM_ERROR("amdgpu: fence wait failed (%ld).\n", r);
goto error; goto error;
} else } else {
r = 0; r = 0;
}
for (i = 0; i < adev->usec_timeout; i++) { for (i = 0; i < adev->usec_timeout; i++) {
tmp = RREG32(SOC15_REG_OFFSET(UVD, 0, mmUVD_SCRATCH9)); tmp = RREG32(SOC15_REG_OFFSET(UVD, 0, mmUVD_SCRATCH9));
@ -855,15 +834,10 @@ int amdgpu_vcn_jpeg_ring_test_ib(struct amdgpu_ring *ring, long timeout)
DRM_UDELAY(1); DRM_UDELAY(1);
} }
if (i < adev->usec_timeout) if (i >= adev->usec_timeout)
DRM_DEBUG("ib test on ring %d succeeded\n", ring->idx); r = -ETIMEDOUT;
else {
DRM_ERROR("ib test failed (0x%08X)\n", tmp);
r = -EINVAL;
}
dma_fence_put(fence); dma_fence_put(fence);
error: error:
return r; return r;
} }

17
drivers/gpu/drm/amd/amdgpu/cik_sdma.c
View File

@ -668,20 +668,16 @@ static int cik_sdma_ring_test_ib(struct amdgpu_ring *ring, long timeout)
long r; long r;
r = amdgpu_device_wb_get(adev, &index); r = amdgpu_device_wb_get(adev, &index);
if (r) { if (r)
dev_err(adev->dev, "(%ld) failed to allocate wb slot\n", r);
return r; return r;
}
gpu_addr = adev->wb.gpu_addr + (index * 4); gpu_addr = adev->wb.gpu_addr + (index * 4);
tmp = 0xCAFEDEAD; tmp = 0xCAFEDEAD;
adev->wb.wb[index] = cpu_to_le32(tmp); adev->wb.wb[index] = cpu_to_le32(tmp);
memset(&ib, 0, sizeof(ib)); memset(&ib, 0, sizeof(ib));
r = amdgpu_ib_get(adev, NULL, 256, &ib); r = amdgpu_ib_get(adev, NULL, 256, &ib);
if (r) { if (r)
DRM_ERROR("amdgpu: failed to get ib (%ld).\n", r);
goto err0; goto err0;
}
ib.ptr[0] = SDMA_PACKET(SDMA_OPCODE_WRITE, ib.ptr[0] = SDMA_PACKET(SDMA_OPCODE_WRITE,
SDMA_WRITE_SUB_OPCODE_LINEAR, 0); SDMA_WRITE_SUB_OPCODE_LINEAR, 0);
@ -696,21 +692,16 @@ static int cik_sdma_ring_test_ib(struct amdgpu_ring *ring, long timeout)
r = dma_fence_wait_timeout(f, false, timeout); r = dma_fence_wait_timeout(f, false, timeout);
if (r == 0) { if (r == 0) {
DRM_ERROR("amdgpu: IB test timed out\n");
r = -ETIMEDOUT; r = -ETIMEDOUT;
goto err1; goto err1;
} else if (r < 0) { } else if (r < 0) {
DRM_ERROR("amdgpu: fence wait failed (%ld).\n", r);
goto err1; goto err1;
} }
tmp = le32_to_cpu(adev->wb.wb[index]); tmp = le32_to_cpu(adev->wb.wb[index]);
if (tmp == 0xDEADBEEF) { if (tmp == 0xDEADBEEF)
DRM_DEBUG("ib test on ring %d succeeded\n", ring->idx);
r = 0; r = 0;
} else { else
DRM_ERROR("amdgpu: ib test failed (0x%08X)\n", tmp);
r = -EINVAL; r = -EINVAL;
}
err1: err1:
amdgpu_ib_free(adev, &ib, NULL); amdgpu_ib_free(adev, &ib, NULL);

20
drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c
View File

@ -1887,17 +1887,15 @@ static int gfx_v6_0_ring_test_ib(struct amdgpu_ring *ring, long timeout)
long r; long r;
r = amdgpu_gfx_scratch_get(adev, &scratch); r = amdgpu_gfx_scratch_get(adev, &scratch);
if (r) { if (r)
DRM_ERROR("amdgpu: failed to get scratch reg (%ld).\n", r);
return r; return r;
}
WREG32(scratch, 0xCAFEDEAD); WREG32(scratch, 0xCAFEDEAD);
memset(&ib, 0, sizeof(ib)); memset(&ib, 0, sizeof(ib));
r = amdgpu_ib_get(adev, NULL, 256, &ib); r = amdgpu_ib_get(adev, NULL, 256, &ib);
if (r) { if (r)
DRM_ERROR("amdgpu: failed to get ib (%ld).\n", r);
goto err1; goto err1;
}
ib.ptr[0] = PACKET3(PACKET3_SET_CONFIG_REG, 1); ib.ptr[0] = PACKET3(PACKET3_SET_CONFIG_REG, 1);
ib.ptr[1] = ((scratch - PACKET3_SET_CONFIG_REG_START)); ib.ptr[1] = ((scratch - PACKET3_SET_CONFIG_REG_START));
ib.ptr[2] = 0xDEADBEEF; ib.ptr[2] = 0xDEADBEEF;
@ -1909,22 +1907,16 @@ static int gfx_v6_0_ring_test_ib(struct amdgpu_ring *ring, long timeout)
r = dma_fence_wait_timeout(f, false, timeout); r = dma_fence_wait_timeout(f, false, timeout);
if (r == 0) { if (r == 0) {
DRM_ERROR("amdgpu: IB test timed out\n");
r = -ETIMEDOUT; r = -ETIMEDOUT;
goto err2; goto err2;
} else if (r < 0) { } else if (r < 0) {
DRM_ERROR("amdgpu: fence wait failed (%ld).\n", r);
goto err2; goto err2;
} }
tmp = RREG32(scratch); tmp = RREG32(scratch);
if (tmp == 0xDEADBEEF) { if (tmp == 0xDEADBEEF)
DRM_DEBUG("ib test on ring %d succeeded\n", ring->idx);
r = 0; r = 0;
} else { else
DRM_ERROR("amdgpu: ib test failed (scratch(0x%04X)=0x%08X)\n",
scratch, tmp);
r = -EINVAL; r = -EINVAL;
}
err2: err2:
amdgpu_ib_free(adev, &ib, NULL); amdgpu_ib_free(adev, &ib, NULL);

20
drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
View File

@ -2310,17 +2310,15 @@ static int gfx_v7_0_ring_test_ib(struct amdgpu_ring *ring, long timeout)
long r; long r;
r = amdgpu_gfx_scratch_get(adev, &scratch); r = amdgpu_gfx_scratch_get(adev, &scratch);
if (r) { if (r)
DRM_ERROR("amdgpu: failed to get scratch reg (%ld).\n", r);
return r; return r;
}
WREG32(scratch, 0xCAFEDEAD); WREG32(scratch, 0xCAFEDEAD);
memset(&ib, 0, sizeof(ib)); memset(&ib, 0, sizeof(ib));
r = amdgpu_ib_get(adev, NULL, 256, &ib); r = amdgpu_ib_get(adev, NULL, 256, &ib);
if (r) { if (r)
DRM_ERROR("amdgpu: failed to get ib (%ld).\n", r);
goto err1; goto err1;
}
ib.ptr[0] = PACKET3(PACKET3_SET_UCONFIG_REG, 1); ib.ptr[0] = PACKET3(PACKET3_SET_UCONFIG_REG, 1);
ib.ptr[1] = ((scratch - PACKET3_SET_UCONFIG_REG_START)); ib.ptr[1] = ((scratch - PACKET3_SET_UCONFIG_REG_START));
ib.ptr[2] = 0xDEADBEEF; ib.ptr[2] = 0xDEADBEEF;
@ -2332,22 +2330,16 @@ static int gfx_v7_0_ring_test_ib(struct amdgpu_ring *ring, long timeout)
r = dma_fence_wait_timeout(f, false, timeout); r = dma_fence_wait_timeout(f, false, timeout);
if (r == 0) { if (r == 0) {
DRM_ERROR("amdgpu: IB test timed out\n");
r = -ETIMEDOUT; r = -ETIMEDOUT;
goto err2; goto err2;
} else if (r < 0) { } else if (r < 0) {
DRM_ERROR("amdgpu: fence wait failed (%ld).\n", r);
goto err2; goto err2;
} }
tmp = RREG32(scratch); tmp = RREG32(scratch);
if (tmp == 0xDEADBEEF) { if (tmp == 0xDEADBEEF)
DRM_DEBUG("ib test on ring %d succeeded\n", ring->idx);
r = 0; r = 0;
} else { else
DRM_ERROR("amdgpu: ib test failed (scratch(0x%04X)=0x%08X)\n",
scratch, tmp);
r = -EINVAL; r = -EINVAL;
}
err2: err2:
amdgpu_ib_free(adev, &ib, NULL); amdgpu_ib_free(adev, &ib, NULL);

18
drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
View File

@ -879,19 +879,16 @@ static int gfx_v8_0_ring_test_ib(struct amdgpu_ring *ring, long timeout)
long r; long r;
r = amdgpu_device_wb_get(adev, &index); r = amdgpu_device_wb_get(adev, &index);
if (r) { if (r)
dev_err(adev->dev, "(%ld) failed to allocate wb slot\n", r);
return r; return r;
}
gpu_addr = adev->wb.gpu_addr + (index * 4); gpu_addr = adev->wb.gpu_addr + (index * 4);
adev->wb.wb[index] = cpu_to_le32(0xCAFEDEAD); adev->wb.wb[index] = cpu_to_le32(0xCAFEDEAD);
memset(&ib, 0, sizeof(ib)); memset(&ib, 0, sizeof(ib));
r = amdgpu_ib_get(adev, NULL, 16, &ib); r = amdgpu_ib_get(adev, NULL, 16, &ib);
if (r) { if (r)
DRM_ERROR("amdgpu: failed to get ib (%ld).\n", r);
goto err1; goto err1;
}
ib.ptr[0] = PACKET3(PACKET3_WRITE_DATA, 3); ib.ptr[0] = PACKET3(PACKET3_WRITE_DATA, 3);
ib.ptr[1] = WRITE_DATA_DST_SEL(5) | WR_CONFIRM; ib.ptr[1] = WRITE_DATA_DST_SEL(5) | WR_CONFIRM;
ib.ptr[2] = lower_32_bits(gpu_addr); ib.ptr[2] = lower_32_bits(gpu_addr);
@ -905,22 +902,17 @@ static int gfx_v8_0_ring_test_ib(struct amdgpu_ring *ring, long timeout)
r = dma_fence_wait_timeout(f, false, timeout); r = dma_fence_wait_timeout(f, false, timeout);
if (r == 0) { if (r == 0) {
DRM_ERROR("amdgpu: IB test timed out.\n");
r = -ETIMEDOUT; r = -ETIMEDOUT;
goto err2; goto err2;
} else if (r < 0) { } else if (r < 0) {
DRM_ERROR("amdgpu: fence wait failed (%ld).\n", r);
goto err2; goto err2;
} }
tmp = adev->wb.wb[index]; tmp = adev->wb.wb[index];
if (tmp == 0xDEADBEEF) { if (tmp == 0xDEADBEEF)
DRM_DEBUG("ib test on ring %d succeeded\n", ring->idx);
r = 0; r = 0;
} else { else
DRM_ERROR("ib test on ring %d failed\n", ring->idx);
r = -EINVAL; r = -EINVAL;
}
err2: err2:
amdgpu_ib_free(adev, &ib, NULL); amdgpu_ib_free(adev, &ib, NULL);

28
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
View File

@ -436,19 +436,16 @@ static int gfx_v9_0_ring_test_ib(struct amdgpu_ring *ring, long timeout)
long r; long r;
r = amdgpu_device_wb_get(adev, &index); r = amdgpu_device_wb_get(adev, &index);
if (r) { if (r)
dev_err(adev->dev, "(%ld) failed to allocate wb slot\n", r);
return r; return r;
}
gpu_addr = adev->wb.gpu_addr + (index * 4); gpu_addr = adev->wb.gpu_addr + (index * 4);
adev->wb.wb[index] = cpu_to_le32(0xCAFEDEAD); adev->wb.wb[index] = cpu_to_le32(0xCAFEDEAD);
memset(&ib, 0, sizeof(ib)); memset(&ib, 0, sizeof(ib));
r = amdgpu_ib_get(adev, NULL, 16, &ib); r = amdgpu_ib_get(adev, NULL, 16, &ib);
if (r) { if (r)
DRM_ERROR("amdgpu: failed to get ib (%ld).\n", r);
goto err1; goto err1;
}
ib.ptr[0] = PACKET3(PACKET3_WRITE_DATA, 3); ib.ptr[0] = PACKET3(PACKET3_WRITE_DATA, 3);
ib.ptr[1] = WRITE_DATA_DST_SEL(5) | WR_CONFIRM; ib.ptr[1] = WRITE_DATA_DST_SEL(5) | WR_CONFIRM;
ib.ptr[2] = lower_32_bits(gpu_addr); ib.ptr[2] = lower_32_bits(gpu_addr);
@ -462,22 +459,17 @@ static int gfx_v9_0_ring_test_ib(struct amdgpu_ring *ring, long timeout)
r = dma_fence_wait_timeout(f, false, timeout); r = dma_fence_wait_timeout(f, false, timeout);
if (r == 0) { if (r == 0) {
DRM_ERROR("amdgpu: IB test timed out.\n"); r = -ETIMEDOUT;
r = -ETIMEDOUT; goto err2;
goto err2;
} else if (r < 0) { } else if (r < 0) {
DRM_ERROR("amdgpu: fence wait failed (%ld).\n", r); goto err2;
goto err2;
} }
tmp = adev->wb.wb[index]; tmp = adev->wb.wb[index];
if (tmp == 0xDEADBEEF) { if (tmp == 0xDEADBEEF)
DRM_DEBUG("ib test on ring %d succeeded\n", ring->idx); r = 0;
r = 0; else
} else { r = -EINVAL;
DRM_ERROR("ib test on ring %d failed\n", ring->idx);
r = -EINVAL;
}
err2: err2:
amdgpu_ib_free(adev, &ib, NULL); amdgpu_ib_free(adev, &ib, NULL);

17
drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c
View File

@ -601,20 +601,16 @@ static int sdma_v2_4_ring_test_ib(struct amdgpu_ring *ring, long timeout)
long r; long r;
r = amdgpu_device_wb_get(adev, &index); r = amdgpu_device_wb_get(adev, &index);
if (r) { if (r)
dev_err(adev->dev, "(%ld) failed to allocate wb slot\n", r);
return r; return r;
}
gpu_addr = adev->wb.gpu_addr + (index * 4); gpu_addr = adev->wb.gpu_addr + (index * 4);
tmp = 0xCAFEDEAD; tmp = 0xCAFEDEAD;
adev->wb.wb[index] = cpu_to_le32(tmp); adev->wb.wb[index] = cpu_to_le32(tmp);
memset(&ib, 0, sizeof(ib)); memset(&ib, 0, sizeof(ib));
r = amdgpu_ib_get(adev, NULL, 256, &ib); r = amdgpu_ib_get(adev, NULL, 256, &ib);
if (r) { if (r)
DRM_ERROR("amdgpu: failed to get ib (%ld).\n", r);
goto err0; goto err0;
}
ib.ptr[0] = SDMA_PKT_HEADER_OP(SDMA_OP_WRITE) | ib.ptr[0] = SDMA_PKT_HEADER_OP(SDMA_OP_WRITE) |
SDMA_PKT_HEADER_SUB_OP(SDMA_SUBOP_WRITE_LINEAR); SDMA_PKT_HEADER_SUB_OP(SDMA_SUBOP_WRITE_LINEAR);
@ -633,21 +629,16 @@ static int sdma_v2_4_ring_test_ib(struct amdgpu_ring *ring, long timeout)
r = dma_fence_wait_timeout(f, false, timeout); r = dma_fence_wait_timeout(f, false, timeout);
if (r == 0) { if (r == 0) {
DRM_ERROR("amdgpu: IB test timed out\n");
r = -ETIMEDOUT; r = -ETIMEDOUT;
goto err1; goto err1;
} else if (r < 0) { } else if (r < 0) {
DRM_ERROR("amdgpu: fence wait failed (%ld).\n", r);
goto err1; goto err1;
} }
tmp = le32_to_cpu(adev->wb.wb[index]); tmp = le32_to_cpu(adev->wb.wb[index]);
if (tmp == 0xDEADBEEF) { if (tmp == 0xDEADBEEF)
DRM_DEBUG("ib test on ring %d succeeded\n", ring->idx);
r = 0; r = 0;
} else { else
DRM_ERROR("amdgpu: ib test failed (0x%08X)\n", tmp);
r = -EINVAL; r = -EINVAL;
}
err1: err1:
amdgpu_ib_free(adev, &ib, NULL); amdgpu_ib_free(adev, &ib, NULL);

17
drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c
View File

@ -873,20 +873,16 @@ static int sdma_v3_0_ring_test_ib(struct amdgpu_ring *ring, long timeout)
long r; long r;
r = amdgpu_device_wb_get(adev, &index); r = amdgpu_device_wb_get(adev, &index);
if (r) { if (r)
dev_err(adev->dev, "(%ld) failed to allocate wb slot\n", r);
return r; return r;
}
gpu_addr = adev->wb.gpu_addr + (index * 4); gpu_addr = adev->wb.gpu_addr + (index * 4);
tmp = 0xCAFEDEAD; tmp = 0xCAFEDEAD;
adev->wb.wb[index] = cpu_to_le32(tmp); adev->wb.wb[index] = cpu_to_le32(tmp);
memset(&ib, 0, sizeof(ib)); memset(&ib, 0, sizeof(ib));
r = amdgpu_ib_get(adev, NULL, 256, &ib); r = amdgpu_ib_get(adev, NULL, 256, &ib);
if (r) { if (r)
DRM_ERROR("amdgpu: failed to get ib (%ld).\n", r);
goto err0; goto err0;
}
ib.ptr[0] = SDMA_PKT_HEADER_OP(SDMA_OP_WRITE) | ib.ptr[0] = SDMA_PKT_HEADER_OP(SDMA_OP_WRITE) |
SDMA_PKT_HEADER_SUB_OP(SDMA_SUBOP_WRITE_LINEAR); SDMA_PKT_HEADER_SUB_OP(SDMA_SUBOP_WRITE_LINEAR);
@ -905,21 +901,16 @@ static int sdma_v3_0_ring_test_ib(struct amdgpu_ring *ring, long timeout)
r = dma_fence_wait_timeout(f, false, timeout); r = dma_fence_wait_timeout(f, false, timeout);
if (r == 0) { if (r == 0) {
DRM_ERROR("amdgpu: IB test timed out\n");
r = -ETIMEDOUT; r = -ETIMEDOUT;
goto err1; goto err1;
} else if (r < 0) { } else if (r < 0) {
DRM_ERROR("amdgpu: fence wait failed (%ld).\n", r);
goto err1; goto err1;
} }
tmp = le32_to_cpu(adev->wb.wb[index]); tmp = le32_to_cpu(adev->wb.wb[index]);
if (tmp == 0xDEADBEEF) { if (tmp == 0xDEADBEEF)
DRM_DEBUG("ib test on ring %d succeeded\n", ring->idx);
r = 0; r = 0;
} else { else
DRM_ERROR("amdgpu: ib test failed (0x%08X)\n", tmp);
r = -EINVAL; r = -EINVAL;
}
err1: err1:
amdgpu_ib_free(adev, &ib, NULL); amdgpu_ib_free(adev, &ib, NULL);
dma_fence_put(f); dma_fence_put(f);

18
drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
View File

@ -1235,20 +1235,16 @@ static int sdma_v4_0_ring_test_ib(struct amdgpu_ring *ring, long timeout)
u64 gpu_addr; u64 gpu_addr;
r = amdgpu_device_wb_get(adev, &index); r = amdgpu_device_wb_get(adev, &index);
if (r) { if (r)
dev_err(adev->dev, "(%ld) failed to allocate wb slot\n", r);
return r; return r;
}
gpu_addr = adev->wb.gpu_addr + (index * 4); gpu_addr = adev->wb.gpu_addr + (index * 4);
tmp = 0xCAFEDEAD; tmp = 0xCAFEDEAD;
adev->wb.wb[index] = cpu_to_le32(tmp); adev->wb.wb[index] = cpu_to_le32(tmp);
memset(&ib, 0, sizeof(ib)); memset(&ib, 0, sizeof(ib));
r = amdgpu_ib_get(adev, NULL, 256, &ib); r = amdgpu_ib_get(adev, NULL, 256, &ib);
if (r) { if (r)
DRM_ERROR("amdgpu: failed to get ib (%ld).\n", r);
goto err0; goto err0;
}
ib.ptr[0] = SDMA_PKT_HEADER_OP(SDMA_OP_WRITE) | ib.ptr[0] = SDMA_PKT_HEADER_OP(SDMA_OP_WRITE) |
SDMA_PKT_HEADER_SUB_OP(SDMA_SUBOP_WRITE_LINEAR); SDMA_PKT_HEADER_SUB_OP(SDMA_SUBOP_WRITE_LINEAR);
@ -1267,21 +1263,17 @@ static int sdma_v4_0_ring_test_ib(struct amdgpu_ring *ring, long timeout)
r = dma_fence_wait_timeout(f, false, timeout); r = dma_fence_wait_timeout(f, false, timeout);
if (r == 0) { if (r == 0) {
DRM_ERROR("amdgpu: IB test timed out\n");
r = -ETIMEDOUT; r = -ETIMEDOUT;
goto err1; goto err1;
} else if (r < 0) { } else if (r < 0) {
DRM_ERROR("amdgpu: fence wait failed (%ld).\n", r);
goto err1; goto err1;
} }
tmp = le32_to_cpu(adev->wb.wb[index]); tmp = le32_to_cpu(adev->wb.wb[index]);
if (tmp == 0xDEADBEEF) { if (tmp == 0xDEADBEEF)
DRM_DEBUG("ib test on ring %d succeeded\n", ring->idx);
r = 0; r = 0;
} else { else
DRM_ERROR("amdgpu: ib test failed (0x%08X)\n", tmp);
r = -EINVAL; r = -EINVAL;
}
err1: err1:
amdgpu_ib_free(adev, &ib, NULL); amdgpu_ib_free(adev, &ib, NULL);
dma_fence_put(f); dma_fence_put(f);

10
drivers/gpu/drm/amd/amdgpu/si_dma.c
View File

@ -258,20 +258,16 @@ static int si_dma_ring_test_ib(struct amdgpu_ring *ring, long timeout)
long r; long r;
r = amdgpu_device_wb_get(adev, &index); r = amdgpu_device_wb_get(adev, &index);
if (r) { if (r)
dev_err(adev->dev, "(%ld) failed to allocate wb slot\n", r);
return r; return r;
}
gpu_addr = adev->wb.gpu_addr + (index * 4); gpu_addr = adev->wb.gpu_addr + (index * 4);
tmp = 0xCAFEDEAD; tmp = 0xCAFEDEAD;
adev->wb.wb[index] = cpu_to_le32(tmp); adev->wb.wb[index] = cpu_to_le32(tmp);
memset(&ib, 0, sizeof(ib)); memset(&ib, 0, sizeof(ib));
r = amdgpu_ib_get(adev, NULL, 256, &ib); r = amdgpu_ib_get(adev, NULL, 256, &ib);
if (r) { if (r)
DRM_ERROR("amdgpu: failed to get ib (%ld).\n", r);
goto err0; goto err0;
}
ib.ptr[0] = DMA_PACKET(DMA_PACKET_WRITE, 0, 0, 0, 1); ib.ptr[0] = DMA_PACKET(DMA_PACKET_WRITE, 0, 0, 0, 1);
ib.ptr[1] = lower_32_bits(gpu_addr); ib.ptr[1] = lower_32_bits(gpu_addr);
@ -284,11 +280,9 @@ static int si_dma_ring_test_ib(struct amdgpu_ring *ring, long timeout)
r = dma_fence_wait_timeout(f, false, timeout); r = dma_fence_wait_timeout(f, false, timeout);
if (r == 0) { if (r == 0) {
DRM_ERROR("amdgpu: IB test timed out\n");
r = -ETIMEDOUT; r = -ETIMEDOUT;
goto err1; goto err1;
} else if (r < 0) { } else if (r < 0) {
DRM_ERROR("amdgpu: fence wait failed (%ld).\n", r);
goto err1; goto err1;
} }
tmp = le32_to_cpu(adev->wb.wb[index]); tmp = le32_to_cpu(adev->wb.wb[index]);

19
drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c
View File

@ -327,31 +327,24 @@ static int uvd_v6_0_enc_ring_test_ib(struct amdgpu_ring *ring, long timeout)
long r; long r;
r = uvd_v6_0_enc_get_create_msg(ring, 1, NULL); r = uvd_v6_0_enc_get_create_msg(ring, 1, NULL);
if (r) { if (r)
DRM_ERROR("amdgpu: failed to get create msg (%ld).\n", r);
goto error; goto error;
}
r = uvd_v6_0_enc_get_destroy_msg(ring, 1, &fence); r = uvd_v6_0_enc_get_destroy_msg(ring, 1, &fence);
if (r) { if (r)
DRM_ERROR("amdgpu: failed to get destroy ib (%ld).\n", r);
goto error; goto error;
}
r = dma_fence_wait_timeout(fence, false, timeout); r = dma_fence_wait_timeout(fence, false, timeout);
if (r == 0) { if (r == 0)
DRM_ERROR("amdgpu: IB test timed out.\n");
r = -ETIMEDOUT; r = -ETIMEDOUT;
} else if (r < 0) { else if (r > 0)
DRM_ERROR("amdgpu: fence wait failed (%ld).\n", r);
} else {
DRM_DEBUG("ib test on ring %d succeeded\n", ring->idx);
r = 0; r = 0;
}
error: error:
dma_fence_put(fence); dma_fence_put(fence);
return r; return r;
} }
static int uvd_v6_0_early_init(void *handle) static int uvd_v6_0_early_init(void *handle)
{ {
struct amdgpu_device *adev = (struct amdgpu_device *)handle; struct amdgpu_device *adev = (struct amdgpu_device *)handle;

18
drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c
View File

@ -334,27 +334,19 @@ static int uvd_v7_0_enc_ring_test_ib(struct amdgpu_ring *ring, long timeout)
long r; long r;
r = uvd_v7_0_enc_get_create_msg(ring, 1, NULL); r = uvd_v7_0_enc_get_create_msg(ring, 1, NULL);
if (r) { if (r)
DRM_ERROR("amdgpu: (%d)failed to get create msg (%ld).\n", ring->me, r);
goto error; goto error;
}
r = uvd_v7_0_enc_get_destroy_msg(ring, 1, &fence); r = uvd_v7_0_enc_get_destroy_msg(ring, 1, &fence);
if (r) { if (r)
DRM_ERROR("amdgpu: (%d)failed to get destroy ib (%ld).\n", ring->me, r);
goto error; goto error;
}
r = dma_fence_wait_timeout(fence, false, timeout); r = dma_fence_wait_timeout(fence, false, timeout);
if (r == 0) { if (r == 0)
DRM_ERROR("amdgpu: (%d)IB test timed out.\n", ring->me);
r = -ETIMEDOUT; r = -ETIMEDOUT;
} else if (r < 0) { else if (r > 0)
DRM_ERROR("amdgpu: (%d)fence wait failed (%ld).\n", ring->me, r);
} else {
DRM_DEBUG("ib test on (%d)ring %d succeeded\n", ring->me, ring->idx);
r = 0; r = 0;
}
error: error:
dma_fence_put(fence); dma_fence_put(fence);
return r; return r;