Merge tag 'amd-drm-fixes-6.1-2022-11-02' of https://gitlab.freedesktop.org/agd5f/linux into drm-fixes
amd-drm-fixes-6.1-2022-11-02: amdgpu: - DCN 3.1.4 fixes - DCN 3.2.x fixes - GC 11.x fixes - Virtual display fix - Fail suspend if resources can't be evicted - SR-IOV fix - Display PSR fix amdkfd: - Fix possible NULL pointer deref - GC 11.x trap handler fix Signed-off-by: Dave Airlie <airlied@redhat.com> From: Alex Deucher <alexander.deucher@amd.com> Link: https://patchwork.freedesktop.org/patch/msgid/20221103023257.10446-1-alexander.deucher@amd.com
This commit is contained in:
commit
980a2ff2cb
@ -706,6 +706,13 @@ err:
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void amdgpu_amdkfd_set_compute_idle(struct amdgpu_device *adev, bool idle)
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{
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/* Temporary workaround to fix issues observed in some
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* compute applications when GFXOFF is enabled on GFX11.
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*/
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if (IP_VERSION_MAJ(adev->ip_versions[GC_HWIP][0]) == 11) {
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pr_debug("GFXOFF is %s\n", idle ? "enabled" : "disabled");
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amdgpu_gfx_off_ctrl(adev, idle);
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}
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amdgpu_dpm_switch_power_profile(adev,
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PP_SMC_POWER_PROFILE_COMPUTE,
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!idle);
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@ -4060,15 +4060,18 @@ void amdgpu_device_fini_sw(struct amdgpu_device *adev)
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* at suspend time.
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*
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*/
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static void amdgpu_device_evict_resources(struct amdgpu_device *adev)
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static int amdgpu_device_evict_resources(struct amdgpu_device *adev)
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{
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int ret;
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/* No need to evict vram on APUs for suspend to ram or s2idle */
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if ((adev->in_s3 || adev->in_s0ix) && (adev->flags & AMD_IS_APU))
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return;
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return 0;
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if (amdgpu_ttm_evict_resources(adev, TTM_PL_VRAM))
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ret = amdgpu_ttm_evict_resources(adev, TTM_PL_VRAM);
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if (ret)
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DRM_WARN("evicting device resources failed\n");
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return ret;
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}
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/*
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@ -4118,7 +4121,9 @@ int amdgpu_device_suspend(struct drm_device *dev, bool fbcon)
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if (!adev->in_s0ix)
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amdgpu_amdkfd_suspend(adev, adev->in_runpm);
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amdgpu_device_evict_resources(adev);
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r = amdgpu_device_evict_resources(adev);
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if (r)
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return r;
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amdgpu_fence_driver_hw_fini(adev);
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@ -2201,7 +2201,8 @@ amdgpu_pci_remove(struct pci_dev *pdev)
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pm_runtime_forbid(dev->dev);
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}
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if (adev->ip_versions[MP1_HWIP][0] == IP_VERSION(13, 0, 2)) {
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if (adev->ip_versions[MP1_HWIP][0] == IP_VERSION(13, 0, 2) &&
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!amdgpu_sriov_vf(adev)) {
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bool need_to_reset_gpu = false;
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if (adev->gmc.xgmi.num_physical_nodes > 1) {
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@ -337,12 +337,14 @@ static int amdgpu_firmware_info(struct drm_amdgpu_info_firmware *fw_info,
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fw_info->feature = adev->psp.cap_feature_version;
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break;
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case AMDGPU_INFO_FW_MES_KIQ:
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fw_info->ver = adev->mes.ucode_fw_version[0];
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fw_info->feature = 0;
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fw_info->ver = adev->mes.kiq_version & AMDGPU_MES_VERSION_MASK;
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fw_info->feature = (adev->mes.kiq_version & AMDGPU_MES_FEAT_VERSION_MASK)
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>> AMDGPU_MES_FEAT_VERSION_SHIFT;
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break;
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case AMDGPU_INFO_FW_MES:
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fw_info->ver = adev->mes.ucode_fw_version[1];
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fw_info->feature = 0;
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fw_info->ver = adev->mes.sched_version & AMDGPU_MES_VERSION_MASK;
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fw_info->feature = (adev->mes.sched_version & AMDGPU_MES_FEAT_VERSION_MASK)
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>> AMDGPU_MES_FEAT_VERSION_SHIFT;
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break;
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case AMDGPU_INFO_FW_IMU:
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fw_info->ver = adev->gfx.imu_fw_version;
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@ -500,6 +500,8 @@ static int amdgpu_vkms_sw_init(void *handle)
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adev_to_drm(adev)->mode_config.fb_base = adev->gmc.aper_base;
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adev_to_drm(adev)->mode_config.fb_modifiers_not_supported = true;
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r = amdgpu_display_modeset_create_props(adev);
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if (r)
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return r;
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@ -2495,442 +2495,444 @@ static const uint32_t cwsr_trap_gfx10_hex[] = {
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0xbf9f0000, 0x00000000,
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};
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static const uint32_t cwsr_trap_gfx11_hex[] = {
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0xbfa00001, 0xbfa0021e,
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0xbfa00001, 0xbfa00221,
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0xb0804006, 0xb8f8f802,
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0x9178ff78, 0x00020006,
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0xb8fbf803, 0xbf0d9f6d,
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0xbfa20006, 0x8b6eff78,
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0x00002000, 0xbfa10009,
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0x8b6eff6d, 0x00ff0000,
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0xbfa2001e, 0x8b6eff7b,
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0x00000400, 0xbfa20041,
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0xbf830010, 0xb8fbf803,
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0xbfa0fffa, 0x8b6eff7b,
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0x00000900, 0xbfa20015,
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0x8b6eff7b, 0x000071ff,
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0xbfa10008, 0x8b6fff7b,
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0x00007080, 0xbfa10001,
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0xbeee1287, 0xb8eff801,
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0x846e8c6e, 0x8b6e6f6e,
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0xbfa2000a, 0x8b6eff6d,
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0x00ff0000, 0xbfa20007,
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0xb8eef801, 0x8b6eff6e,
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0x00000800, 0xbfa20003,
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0xb8fbf803, 0xbf0d9e6d,
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0xbfa10001, 0xbfbd0000,
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0xbf0d9f6d, 0xbfa20006,
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0x8b6eff78, 0x00002000,
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0xbfa10009, 0x8b6eff6d,
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0x00ff0000, 0xbfa2001e,
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0x8b6eff7b, 0x00000400,
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0xbfa20026, 0xbefa4d82,
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0xbf89fc07, 0x84fa887a,
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0xf4005bbd, 0xf8000010,
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0xbf89fc07, 0x846e976e,
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0x9177ff77, 0x00800000,
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0x8c776e77, 0xf4045bbd,
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0xf8000000, 0xbf89fc07,
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0xf4045ebd, 0xf8000008,
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0xbf89fc07, 0x8bee6e6e,
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0xbfa10001, 0xbe80486e,
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0x8b6eff6d, 0x01ff0000,
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0xbfa20005, 0x8c78ff78,
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0x00002000, 0x80ec886c,
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0x82ed806d, 0xbfa00005,
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0x8b6eff6d, 0x01000000,
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0xbfa20002, 0x806c846c,
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0x826d806d, 0x8b6dff6d,
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0x0000ffff, 0x8bfe7e7e,
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0x8bea6a6a, 0xb978f802,
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0xbe804a6c, 0x8b6dff6d,
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0x0000ffff, 0xbefa0080,
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0xb97a0283, 0xbeee007e,
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0xbeef007f, 0xbefe0180,
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0xbefe4d84, 0xbf89fc07,
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0x8b7aff7f, 0x04000000,
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0x847a857a, 0x8c6d7a6d,
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0xbefa007e, 0x8b7bff7f,
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0x0000ffff, 0xbefe00c1,
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0xbeff00c1, 0xdca6c000,
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0x007a0000, 0x7e000280,
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0xbefe007a, 0xbeff007b,
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0xb8fb02dc, 0x847b997b,
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0xb8fa3b05, 0x807a817a,
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0xbf0d997b, 0xbfa20002,
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0x847a897a, 0xbfa00001,
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0x847a8a7a, 0xb8fb1e06,
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0x847b8a7b, 0x807a7b7a,
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0xbfa20041, 0xbf830010,
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0xb8fbf803, 0xbfa0fffa,
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0x8b6eff7b, 0x00000900,
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0xbfa20015, 0x8b6eff7b,
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0x000071ff, 0xbfa10008,
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0x8b6fff7b, 0x00007080,
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0xbfa10001, 0xbeee1287,
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0xb8eff801, 0x846e8c6e,
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0x8b6e6f6e, 0xbfa2000a,
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0x8b6eff6d, 0x00ff0000,
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0xbfa20007, 0xb8eef801,
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0x8b6eff6e, 0x00000800,
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0xbfa20003, 0x8b6eff7b,
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0x00000400, 0xbfa20026,
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0xbefa4d82, 0xbf89fc07,
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0x84fa887a, 0xf4005bbd,
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0xf8000010, 0xbf89fc07,
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0x846e976e, 0x9177ff77,
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0x00800000, 0x8c776e77,
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0xf4045bbd, 0xf8000000,
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0xbf89fc07, 0xf4045ebd,
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0xf8000008, 0xbf89fc07,
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0x8bee6e6e, 0xbfa10001,
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0xbe80486e, 0x8b6eff6d,
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0x01ff0000, 0xbfa20005,
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0x8c78ff78, 0x00002000,
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0x80ec886c, 0x82ed806d,
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0xbfa00005, 0x8b6eff6d,
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0x01000000, 0xbfa20002,
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0x806c846c, 0x826d806d,
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0x8b6dff6d, 0x0000ffff,
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0x8bfe7e7e, 0x8bea6a6a,
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0xb978f802, 0xbe804a6c,
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0x8b6dff6d, 0x0000ffff,
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0xbefa0080, 0xb97a0283,
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0xbeee007e, 0xbeef007f,
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0xbefe0180, 0xbefe4d84,
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0xbf89fc07, 0x8b7aff7f,
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0x04000000, 0x847a857a,
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0x8c6d7a6d, 0xbefa007e,
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0x8b7bff7f, 0x0000ffff,
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0x807aff7a, 0x00000200,
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0x807a7e7a, 0x827b807b,
|
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0xd7610000, 0x00010870,
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0xd7610000, 0x00010a71,
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||||
0xd7610000, 0x00010c72,
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0xd7610000, 0x00010e73,
|
||||
0xd7610000, 0x00011074,
|
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0xd7610000, 0x00011275,
|
||||
0xd7610000, 0x00011476,
|
||||
0xd7610000, 0x00011677,
|
||||
0xd7610000, 0x00011a79,
|
||||
0xd7610000, 0x00011c7e,
|
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0xd7610000, 0x00011e7f,
|
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0xbefe00ff, 0x00003fff,
|
||||
0xbeff0080, 0xdca6c040,
|
||||
0x007a0000, 0xd760007a,
|
||||
0x00011d00, 0xd760007b,
|
||||
0x00011f00, 0xbefe007a,
|
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0xbeff007b, 0xbef4007e,
|
||||
0x8b75ff7f, 0x0000ffff,
|
||||
0x8c75ff75, 0x00040000,
|
||||
0xbef60080, 0xbef700ff,
|
||||
0x10807fac, 0xbef1007d,
|
||||
0xbef00080, 0xb8f302dc,
|
||||
0x84739973, 0xbefe00c1,
|
||||
0x857d9973, 0x8b7d817d,
|
||||
0xbf06817d, 0xbfa20002,
|
||||
0xbeff0080, 0xbfa00002,
|
||||
0xbeff00c1, 0xbfa00009,
|
||||
0xbefe00c1, 0xbeff00c1,
|
||||
0xdca6c000, 0x007a0000,
|
||||
0x7e000280, 0xbefe007a,
|
||||
0xbeff007b, 0xb8fb02dc,
|
||||
0x847b997b, 0xb8fa3b05,
|
||||
0x807a817a, 0xbf0d997b,
|
||||
0xbfa20002, 0x847a897a,
|
||||
0xbfa00001, 0x847a8a7a,
|
||||
0xb8fb1e06, 0x847b8a7b,
|
||||
0x807a7b7a, 0x8b7bff7f,
|
||||
0x0000ffff, 0x807aff7a,
|
||||
0x00000200, 0x807a7e7a,
|
||||
0x827b807b, 0xd7610000,
|
||||
0x00010870, 0xd7610000,
|
||||
0x00010a71, 0xd7610000,
|
||||
0x00010c72, 0xd7610000,
|
||||
0x00010e73, 0xd7610000,
|
||||
0x00011074, 0xd7610000,
|
||||
0x00011275, 0xd7610000,
|
||||
0x00011476, 0xd7610000,
|
||||
0x00011677, 0xd7610000,
|
||||
0x00011a79, 0xd7610000,
|
||||
0x00011c7e, 0xd7610000,
|
||||
0x00011e7f, 0xbefe00ff,
|
||||
0x00003fff, 0xbeff0080,
|
||||
0xdca6c040, 0x007a0000,
|
||||
0xd760007a, 0x00011d00,
|
||||
0xd760007b, 0x00011f00,
|
||||
0xbefe007a, 0xbeff007b,
|
||||
0xbef4007e, 0x8b75ff7f,
|
||||
0x0000ffff, 0x8c75ff75,
|
||||
0x00040000, 0xbef60080,
|
||||
0xbef700ff, 0x10807fac,
|
||||
0xbef1007d, 0xbef00080,
|
||||
0xb8f302dc, 0x84739973,
|
||||
0xbefe00c1, 0x857d9973,
|
||||
0x8b7d817d, 0xbf06817d,
|
||||
0xbfa20002, 0xbeff0080,
|
||||
0xbfa00002, 0xbeff00c1,
|
||||
0xbfa00009, 0xbef600ff,
|
||||
0x01000000, 0xe0685080,
|
||||
0x701d0100, 0xe0685100,
|
||||
0x701d0200, 0xe0685180,
|
||||
0x701d0300, 0xbfa00008,
|
||||
0xbef600ff, 0x01000000,
|
||||
0xe0685080, 0x701d0100,
|
||||
0xe0685100, 0x701d0200,
|
||||
0xe0685180, 0x701d0300,
|
||||
0xbfa00008, 0xbef600ff,
|
||||
0x01000000, 0xe0685100,
|
||||
0x701d0100, 0xe0685200,
|
||||
0x701d0200, 0xe0685300,
|
||||
0x701d0300, 0xb8f03b05,
|
||||
0x80708170, 0xbf0d9973,
|
||||
0xbfa20002, 0x84708970,
|
||||
0xbfa00001, 0x84708a70,
|
||||
0xb8fa1e06, 0x847a8a7a,
|
||||
0x80707a70, 0x8070ff70,
|
||||
0x00000200, 0xbef600ff,
|
||||
0x01000000, 0x7e000280,
|
||||
0x7e020280, 0x7e040280,
|
||||
0xbefd0080, 0xd7610002,
|
||||
0x0000fa71, 0x807d817d,
|
||||
0xd7610002, 0x0000fa6c,
|
||||
0x807d817d, 0x917aff6d,
|
||||
0x80000000, 0xd7610002,
|
||||
0x0000fa7a, 0x807d817d,
|
||||
0xd7610002, 0x0000fa6e,
|
||||
0x807d817d, 0xd7610002,
|
||||
0x0000fa6f, 0x807d817d,
|
||||
0xd7610002, 0x0000fa78,
|
||||
0x807d817d, 0xb8faf803,
|
||||
0xd7610002, 0x0000fa7a,
|
||||
0x807d817d, 0xd7610002,
|
||||
0x0000fa7b, 0x807d817d,
|
||||
0xb8f1f801, 0xd7610002,
|
||||
0x0000fa71, 0x807d817d,
|
||||
0xb8f1f814, 0xd7610002,
|
||||
0x0000fa71, 0x807d817d,
|
||||
0xb8f1f815, 0xd7610002,
|
||||
0x0000fa71, 0x807d817d,
|
||||
0xbefe00ff, 0x0000ffff,
|
||||
0xbeff0080, 0xe0685000,
|
||||
0x701d0200, 0xbefe00c1,
|
||||
0xe0685100, 0x701d0100,
|
||||
0xe0685200, 0x701d0200,
|
||||
0xe0685300, 0x701d0300,
|
||||
0xb8f03b05, 0x80708170,
|
||||
0xbf0d9973, 0xbfa20002,
|
||||
0x84708970, 0xbfa00001,
|
||||
0x84708a70, 0xb8fa1e06,
|
||||
0x847a8a7a, 0x80707a70,
|
||||
0x8070ff70, 0x00000200,
|
||||
0xbef600ff, 0x01000000,
|
||||
0xbef90080, 0xbefd0080,
|
||||
0xbf800000, 0xbe804100,
|
||||
0xbe824102, 0xbe844104,
|
||||
0xbe864106, 0xbe884108,
|
||||
0xbe8a410a, 0xbe8c410c,
|
||||
0xbe8e410e, 0xd7610002,
|
||||
0x0000f200, 0x80798179,
|
||||
0xd7610002, 0x0000f201,
|
||||
0x80798179, 0xd7610002,
|
||||
0x0000f202, 0x80798179,
|
||||
0xd7610002, 0x0000f203,
|
||||
0x80798179, 0xd7610002,
|
||||
0x0000f204, 0x80798179,
|
||||
0xd7610002, 0x0000f205,
|
||||
0x80798179, 0xd7610002,
|
||||
0x0000f206, 0x80798179,
|
||||
0xd7610002, 0x0000f207,
|
||||
0x80798179, 0xd7610002,
|
||||
0x0000f208, 0x80798179,
|
||||
0xd7610002, 0x0000f209,
|
||||
0x80798179, 0xd7610002,
|
||||
0x0000f20a, 0x80798179,
|
||||
0xd7610002, 0x0000f20b,
|
||||
0x80798179, 0xd7610002,
|
||||
0x0000f20c, 0x80798179,
|
||||
0xd7610002, 0x0000f20d,
|
||||
0x80798179, 0xd7610002,
|
||||
0x0000f20e, 0x80798179,
|
||||
0xd7610002, 0x0000f20f,
|
||||
0x80798179, 0xbf06a079,
|
||||
0xbfa10006, 0xe0685000,
|
||||
0x701d0200, 0x8070ff70,
|
||||
0x00000080, 0xbef90080,
|
||||
0x7e040280, 0x807d907d,
|
||||
0xbf0aff7d, 0x00000060,
|
||||
0xbfa2ffbc, 0xbe804100,
|
||||
0xbe824102, 0xbe844104,
|
||||
0xbe864106, 0xbe884108,
|
||||
0xbe8a410a, 0xd7610002,
|
||||
0x0000f200, 0x80798179,
|
||||
0xd7610002, 0x0000f201,
|
||||
0x80798179, 0xd7610002,
|
||||
0x0000f202, 0x80798179,
|
||||
0xd7610002, 0x0000f203,
|
||||
0x80798179, 0xd7610002,
|
||||
0x0000f204, 0x80798179,
|
||||
0xd7610002, 0x0000f205,
|
||||
0x80798179, 0xd7610002,
|
||||
0x0000f206, 0x80798179,
|
||||
0xd7610002, 0x0000f207,
|
||||
0x80798179, 0xd7610002,
|
||||
0x0000f208, 0x80798179,
|
||||
0xd7610002, 0x0000f209,
|
||||
0x80798179, 0xd7610002,
|
||||
0x0000f20a, 0x80798179,
|
||||
0xd7610002, 0x0000f20b,
|
||||
0x80798179, 0xe0685000,
|
||||
0x701d0200, 0xbefe00c1,
|
||||
0x857d9973, 0x8b7d817d,
|
||||
0xbf06817d, 0xbfa20002,
|
||||
0xbeff0080, 0xbfa00001,
|
||||
0xbeff00c1, 0xb8fb4306,
|
||||
0x8b7bc17b, 0xbfa10044,
|
||||
0xbfbd0000, 0x8b7aff6d,
|
||||
0x80000000, 0xbfa10040,
|
||||
0x847b867b, 0x847b827b,
|
||||
0xbef6007b, 0xb8f03b05,
|
||||
0x7e000280, 0x7e020280,
|
||||
0x7e040280, 0xbefd0080,
|
||||
0xd7610002, 0x0000fa71,
|
||||
0x807d817d, 0xd7610002,
|
||||
0x0000fa6c, 0x807d817d,
|
||||
0x917aff6d, 0x80000000,
|
||||
0xd7610002, 0x0000fa7a,
|
||||
0x807d817d, 0xd7610002,
|
||||
0x0000fa6e, 0x807d817d,
|
||||
0xd7610002, 0x0000fa6f,
|
||||
0x807d817d, 0xd7610002,
|
||||
0x0000fa78, 0x807d817d,
|
||||
0xb8faf803, 0xd7610002,
|
||||
0x0000fa7a, 0x807d817d,
|
||||
0xd7610002, 0x0000fa7b,
|
||||
0x807d817d, 0xb8f1f801,
|
||||
0xd7610002, 0x0000fa71,
|
||||
0x807d817d, 0xb8f1f814,
|
||||
0xd7610002, 0x0000fa71,
|
||||
0x807d817d, 0xb8f1f815,
|
||||
0xd7610002, 0x0000fa71,
|
||||
0x807d817d, 0xbefe00ff,
|
||||
0x0000ffff, 0xbeff0080,
|
||||
0xe0685000, 0x701d0200,
|
||||
0xbefe00c1, 0xb8f03b05,
|
||||
0x80708170, 0xbf0d9973,
|
||||
0xbfa20002, 0x84708970,
|
||||
0xbfa00001, 0x84708a70,
|
||||
0xb8fa1e06, 0x847a8a7a,
|
||||
0x80707a70, 0x8070ff70,
|
||||
0x00000200, 0x8070ff70,
|
||||
0x00000080, 0xbef600ff,
|
||||
0x01000000, 0xd71f0000,
|
||||
0x000100c1, 0xd7200000,
|
||||
0x000200c1, 0x16000084,
|
||||
0x857d9973, 0x8b7d817d,
|
||||
0xbf06817d, 0xbefd0080,
|
||||
0xbfa20012, 0xbe8300ff,
|
||||
0x00000080, 0xbf800000,
|
||||
0xbf800000, 0xbf800000,
|
||||
0xd8d80000, 0x01000000,
|
||||
0xbf890000, 0xe0685000,
|
||||
0x701d0100, 0x807d037d,
|
||||
0x80700370, 0xd5250000,
|
||||
0x0001ff00, 0x00000080,
|
||||
0xbf0a7b7d, 0xbfa2fff4,
|
||||
0xbfa00011, 0xbe8300ff,
|
||||
0x00000100, 0xbf800000,
|
||||
0xbf800000, 0xbf800000,
|
||||
0xd8d80000, 0x01000000,
|
||||
0xbf890000, 0xe0685000,
|
||||
0x701d0100, 0x807d037d,
|
||||
0x80700370, 0xd5250000,
|
||||
0x0001ff00, 0x00000100,
|
||||
0xbf0a7b7d, 0xbfa2fff4,
|
||||
0x80707a70, 0xbef600ff,
|
||||
0x01000000, 0xbef90080,
|
||||
0xbefd0080, 0xbf800000,
|
||||
0xbe804100, 0xbe824102,
|
||||
0xbe844104, 0xbe864106,
|
||||
0xbe884108, 0xbe8a410a,
|
||||
0xbe8c410c, 0xbe8e410e,
|
||||
0xd7610002, 0x0000f200,
|
||||
0x80798179, 0xd7610002,
|
||||
0x0000f201, 0x80798179,
|
||||
0xd7610002, 0x0000f202,
|
||||
0x80798179, 0xd7610002,
|
||||
0x0000f203, 0x80798179,
|
||||
0xd7610002, 0x0000f204,
|
||||
0x80798179, 0xd7610002,
|
||||
0x0000f205, 0x80798179,
|
||||
0xd7610002, 0x0000f206,
|
||||
0x80798179, 0xd7610002,
|
||||
0x0000f207, 0x80798179,
|
||||
0xd7610002, 0x0000f208,
|
||||
0x80798179, 0xd7610002,
|
||||
0x0000f209, 0x80798179,
|
||||
0xd7610002, 0x0000f20a,
|
||||
0x80798179, 0xd7610002,
|
||||
0x0000f20b, 0x80798179,
|
||||
0xd7610002, 0x0000f20c,
|
||||
0x80798179, 0xd7610002,
|
||||
0x0000f20d, 0x80798179,
|
||||
0xd7610002, 0x0000f20e,
|
||||
0x80798179, 0xd7610002,
|
||||
0x0000f20f, 0x80798179,
|
||||
0xbf06a079, 0xbfa10006,
|
||||
0xe0685000, 0x701d0200,
|
||||
0x8070ff70, 0x00000080,
|
||||
0xbef90080, 0x7e040280,
|
||||
0x807d907d, 0xbf0aff7d,
|
||||
0x00000060, 0xbfa2ffbc,
|
||||
0xbe804100, 0xbe824102,
|
||||
0xbe844104, 0xbe864106,
|
||||
0xbe884108, 0xbe8a410a,
|
||||
0xd7610002, 0x0000f200,
|
||||
0x80798179, 0xd7610002,
|
||||
0x0000f201, 0x80798179,
|
||||
0xd7610002, 0x0000f202,
|
||||
0x80798179, 0xd7610002,
|
||||
0x0000f203, 0x80798179,
|
||||
0xd7610002, 0x0000f204,
|
||||
0x80798179, 0xd7610002,
|
||||
0x0000f205, 0x80798179,
|
||||
0xd7610002, 0x0000f206,
|
||||
0x80798179, 0xd7610002,
|
||||
0x0000f207, 0x80798179,
|
||||
0xd7610002, 0x0000f208,
|
||||
0x80798179, 0xd7610002,
|
||||
0x0000f209, 0x80798179,
|
||||
0xd7610002, 0x0000f20a,
|
||||
0x80798179, 0xd7610002,
|
||||
0x0000f20b, 0x80798179,
|
||||
0xe0685000, 0x701d0200,
|
||||
0xbefe00c1, 0x857d9973,
|
||||
0x8b7d817d, 0xbf06817d,
|
||||
0xbfa20004, 0xbef000ff,
|
||||
0x00000200, 0xbeff0080,
|
||||
0xbfa00003, 0xbef000ff,
|
||||
0x00000400, 0xbeff00c1,
|
||||
0xb8fb3b05, 0x807b817b,
|
||||
0x847b827b, 0x857d9973,
|
||||
0xbfa20002, 0xbeff0080,
|
||||
0xbfa00001, 0xbeff00c1,
|
||||
0xb8fb4306, 0x8b7bc17b,
|
||||
0xbfa10044, 0xbfbd0000,
|
||||
0x8b7aff6d, 0x80000000,
|
||||
0xbfa10040, 0x847b867b,
|
||||
0x847b827b, 0xbef6007b,
|
||||
0xb8f03b05, 0x80708170,
|
||||
0xbf0d9973, 0xbfa20002,
|
||||
0x84708970, 0xbfa00001,
|
||||
0x84708a70, 0xb8fa1e06,
|
||||
0x847a8a7a, 0x80707a70,
|
||||
0x8070ff70, 0x00000200,
|
||||
0x8070ff70, 0x00000080,
|
||||
0xbef600ff, 0x01000000,
|
||||
0xd71f0000, 0x000100c1,
|
||||
0xd7200000, 0x000200c1,
|
||||
0x16000084, 0x857d9973,
|
||||
0x8b7d817d, 0xbf06817d,
|
||||
0xbfa20017, 0xbef600ff,
|
||||
0xbefd0080, 0xbfa20012,
|
||||
0xbe8300ff, 0x00000080,
|
||||
0xbf800000, 0xbf800000,
|
||||
0xbf800000, 0xd8d80000,
|
||||
0x01000000, 0xbf890000,
|
||||
0xe0685000, 0x701d0100,
|
||||
0x807d037d, 0x80700370,
|
||||
0xd5250000, 0x0001ff00,
|
||||
0x00000080, 0xbf0a7b7d,
|
||||
0xbfa2fff4, 0xbfa00011,
|
||||
0xbe8300ff, 0x00000100,
|
||||
0xbf800000, 0xbf800000,
|
||||
0xbf800000, 0xd8d80000,
|
||||
0x01000000, 0xbf890000,
|
||||
0xe0685000, 0x701d0100,
|
||||
0x807d037d, 0x80700370,
|
||||
0xd5250000, 0x0001ff00,
|
||||
0x00000100, 0xbf0a7b7d,
|
||||
0xbfa2fff4, 0xbefe00c1,
|
||||
0x857d9973, 0x8b7d817d,
|
||||
0xbf06817d, 0xbfa20004,
|
||||
0xbef000ff, 0x00000200,
|
||||
0xbeff0080, 0xbfa00003,
|
||||
0xbef000ff, 0x00000400,
|
||||
0xbeff00c1, 0xb8fb3b05,
|
||||
0x807b817b, 0x847b827b,
|
||||
0x857d9973, 0x8b7d817d,
|
||||
0xbf06817d, 0xbfa20017,
|
||||
0xbef600ff, 0x01000000,
|
||||
0xbefd0084, 0xbf0a7b7d,
|
||||
0xbfa10037, 0x7e008700,
|
||||
0x7e028701, 0x7e048702,
|
||||
0x7e068703, 0xe0685000,
|
||||
0x701d0000, 0xe0685080,
|
||||
0x701d0100, 0xe0685100,
|
||||
0x701d0200, 0xe0685180,
|
||||
0x701d0300, 0x807d847d,
|
||||
0x8070ff70, 0x00000200,
|
||||
0xbf0a7b7d, 0xbfa2ffef,
|
||||
0xbfa00025, 0xbef600ff,
|
||||
0x01000000, 0xbefd0084,
|
||||
0xbf0a7b7d, 0xbfa10037,
|
||||
0xbf0a7b7d, 0xbfa10011,
|
||||
0x7e008700, 0x7e028701,
|
||||
0x7e048702, 0x7e068703,
|
||||
0xe0685000, 0x701d0000,
|
||||
0xe0685080, 0x701d0100,
|
||||
0xe0685100, 0x701d0200,
|
||||
0xe0685180, 0x701d0300,
|
||||
0xe0685100, 0x701d0100,
|
||||
0xe0685200, 0x701d0200,
|
||||
0xe0685300, 0x701d0300,
|
||||
0x807d847d, 0x8070ff70,
|
||||
0x00000200, 0xbf0a7b7d,
|
||||
0xbfa2ffef, 0xbfa00025,
|
||||
0xbef600ff, 0x01000000,
|
||||
0xbefd0084, 0xbf0a7b7d,
|
||||
0xbfa10011, 0x7e008700,
|
||||
0x7e028701, 0x7e048702,
|
||||
0x7e068703, 0xe0685000,
|
||||
0x701d0000, 0xe0685100,
|
||||
0x701d0100, 0xe0685200,
|
||||
0x701d0200, 0xe0685300,
|
||||
0x701d0300, 0x807d847d,
|
||||
0x8070ff70, 0x00000400,
|
||||
0xbf0a7b7d, 0xbfa2ffef,
|
||||
0xb8fb1e06, 0x8b7bc17b,
|
||||
0xbfa1000c, 0x847b837b,
|
||||
0x807b7d7b, 0xbefe00c1,
|
||||
0xbeff0080, 0x7e008700,
|
||||
0xe0685000, 0x701d0000,
|
||||
0x807d817d, 0x8070ff70,
|
||||
0x00000080, 0xbf0a7b7d,
|
||||
0xbfa2fff8, 0xbfa00146,
|
||||
0xbef4007e, 0x8b75ff7f,
|
||||
0x0000ffff, 0x8c75ff75,
|
||||
0x00040000, 0xbef60080,
|
||||
0xbef700ff, 0x10807fac,
|
||||
0xb8f202dc, 0x84729972,
|
||||
0x8b6eff7f, 0x04000000,
|
||||
0xbfa1003a, 0xbefe00c1,
|
||||
0x857d9972, 0x8b7d817d,
|
||||
0xbf06817d, 0xbfa20002,
|
||||
0xbeff0080, 0xbfa00001,
|
||||
0xbeff00c1, 0xb8ef4306,
|
||||
0x8b6fc16f, 0xbfa1002f,
|
||||
0x846f866f, 0x846f826f,
|
||||
0xbef6006f, 0xb8f83b05,
|
||||
0x80788178, 0xbf0d9972,
|
||||
0xbfa20002, 0x84788978,
|
||||
0xbfa00001, 0x84788a78,
|
||||
0xb8ee1e06, 0x846e8a6e,
|
||||
0x80786e78, 0x8078ff78,
|
||||
0x00000200, 0x8078ff78,
|
||||
0x00000080, 0xbef600ff,
|
||||
0x01000000, 0x857d9972,
|
||||
0x8b7d817d, 0xbf06817d,
|
||||
0xbefd0080, 0xbfa2000c,
|
||||
0xe0500000, 0x781d0000,
|
||||
0xbf8903f7, 0xdac00000,
|
||||
0x00000000, 0x807dff7d,
|
||||
0x00000080, 0x8078ff78,
|
||||
0x00000080, 0xbf0a6f7d,
|
||||
0xbfa2fff5, 0xbfa0000b,
|
||||
0xe0500000, 0x781d0000,
|
||||
0xbf8903f7, 0xdac00000,
|
||||
0x00000000, 0x807dff7d,
|
||||
0x00000100, 0x8078ff78,
|
||||
0x00000100, 0xbf0a6f7d,
|
||||
0xbfa2fff5, 0xbef80080,
|
||||
0x00000400, 0xbf0a7b7d,
|
||||
0xbfa2ffef, 0xb8fb1e06,
|
||||
0x8b7bc17b, 0xbfa1000c,
|
||||
0x847b837b, 0x807b7d7b,
|
||||
0xbefe00c1, 0xbeff0080,
|
||||
0x7e008700, 0xe0685000,
|
||||
0x701d0000, 0x807d817d,
|
||||
0x8070ff70, 0x00000080,
|
||||
0xbf0a7b7d, 0xbfa2fff8,
|
||||
0xbfa00146, 0xbef4007e,
|
||||
0x8b75ff7f, 0x0000ffff,
|
||||
0x8c75ff75, 0x00040000,
|
||||
0xbef60080, 0xbef700ff,
|
||||
0x10807fac, 0xb8f202dc,
|
||||
0x84729972, 0x8b6eff7f,
|
||||
0x04000000, 0xbfa1003a,
|
||||
0xbefe00c1, 0x857d9972,
|
||||
0x8b7d817d, 0xbf06817d,
|
||||
0xbfa20002, 0xbeff0080,
|
||||
0xbfa00001, 0xbeff00c1,
|
||||
0xb8ef3b05, 0x806f816f,
|
||||
0x846f826f, 0x857d9972,
|
||||
0x8b7d817d, 0xbf06817d,
|
||||
0xbfa20024, 0xbef600ff,
|
||||
0x01000000, 0xbeee0078,
|
||||
0x8078ff78, 0x00000200,
|
||||
0xbefd0084, 0xbf0a6f7d,
|
||||
0xbfa10050, 0xe0505000,
|
||||
0x781d0000, 0xe0505080,
|
||||
0x781d0100, 0xe0505100,
|
||||
0x781d0200, 0xe0505180,
|
||||
0x781d0300, 0xbf8903f7,
|
||||
0x7e008500, 0x7e028501,
|
||||
0x7e048502, 0x7e068503,
|
||||
0x807d847d, 0x8078ff78,
|
||||
0x00000200, 0xbf0a6f7d,
|
||||
0xbfa2ffee, 0xe0505000,
|
||||
0x6e1d0000, 0xe0505080,
|
||||
0x6e1d0100, 0xe0505100,
|
||||
0x6e1d0200, 0xe0505180,
|
||||
0x6e1d0300, 0xbf8903f7,
|
||||
0xbfa00034, 0xbef600ff,
|
||||
0x01000000, 0xbeee0078,
|
||||
0x8078ff78, 0x00000400,
|
||||
0xbefd0084, 0xbf0a6f7d,
|
||||
0xbfa10012, 0xe0505000,
|
||||
0x781d0000, 0xe0505100,
|
||||
0x781d0100, 0xe0505200,
|
||||
0x781d0200, 0xe0505300,
|
||||
0x781d0300, 0xbf8903f7,
|
||||
0x7e008500, 0x7e028501,
|
||||
0x7e048502, 0x7e068503,
|
||||
0x807d847d, 0x8078ff78,
|
||||
0x00000400, 0xbf0a6f7d,
|
||||
0xbfa2ffee, 0xb8ef1e06,
|
||||
0x8b6fc16f, 0xbfa1000e,
|
||||
0x846f836f, 0x806f7d6f,
|
||||
0xbefe00c1, 0xbeff0080,
|
||||
0xe0505000, 0x781d0000,
|
||||
0xbf8903f7, 0x7e008500,
|
||||
0x807d817d, 0x8078ff78,
|
||||
0x00000080, 0xbf0a6f7d,
|
||||
0xbfa2fff7, 0xbeff00c1,
|
||||
0xe0505000, 0x6e1d0000,
|
||||
0xe0505100, 0x6e1d0100,
|
||||
0xe0505200, 0x6e1d0200,
|
||||
0xe0505300, 0x6e1d0300,
|
||||
0xbf8903f7, 0xb8f83b05,
|
||||
0x80788178, 0xbf0d9972,
|
||||
0xbfa20002, 0x84788978,
|
||||
0xbfa00001, 0x84788a78,
|
||||
0xb8ee1e06, 0x846e8a6e,
|
||||
0x80786e78, 0x8078ff78,
|
||||
0x00000200, 0x80f8ff78,
|
||||
0x00000050, 0xbef600ff,
|
||||
0x01000000, 0xbefd00ff,
|
||||
0x0000006c, 0x80f89078,
|
||||
0xf428403a, 0xf0000000,
|
||||
0xbf89fc07, 0x80fd847d,
|
||||
0xbf800000, 0xbe804300,
|
||||
0xbe824302, 0x80f8a078,
|
||||
0xf42c403a, 0xf0000000,
|
||||
0xbf89fc07, 0x80fd887d,
|
||||
0xbf800000, 0xbe804300,
|
||||
0xbe824302, 0xbe844304,
|
||||
0xbe864306, 0x80f8c078,
|
||||
0xf430403a, 0xf0000000,
|
||||
0xbf89fc07, 0x80fd907d,
|
||||
0xbf800000, 0xbe804300,
|
||||
0xbe824302, 0xbe844304,
|
||||
0xbe864306, 0xbe884308,
|
||||
0xbe8a430a, 0xbe8c430c,
|
||||
0xbe8e430e, 0xbf06807d,
|
||||
0xbfa1fff0, 0xb980f801,
|
||||
0x00000000, 0xbfbd0000,
|
||||
0xb8ef4306, 0x8b6fc16f,
|
||||
0xbfa1002f, 0x846f866f,
|
||||
0x846f826f, 0xbef6006f,
|
||||
0xb8f83b05, 0x80788178,
|
||||
0xbf0d9972, 0xbfa20002,
|
||||
0x84788978, 0xbfa00001,
|
||||
0x84788a78, 0xb8ee1e06,
|
||||
0x846e8a6e, 0x80786e78,
|
||||
0x8078ff78, 0x00000200,
|
||||
0x8078ff78, 0x00000080,
|
||||
0xbef600ff, 0x01000000,
|
||||
0xf4205bfa, 0xf0000000,
|
||||
0x80788478, 0xf4205b3a,
|
||||
0x857d9972, 0x8b7d817d,
|
||||
0xbf06817d, 0xbefd0080,
|
||||
0xbfa2000c, 0xe0500000,
|
||||
0x781d0000, 0xbf8903f7,
|
||||
0xdac00000, 0x00000000,
|
||||
0x807dff7d, 0x00000080,
|
||||
0x8078ff78, 0x00000080,
|
||||
0xbf0a6f7d, 0xbfa2fff5,
|
||||
0xbfa0000b, 0xe0500000,
|
||||
0x781d0000, 0xbf8903f7,
|
||||
0xdac00000, 0x00000000,
|
||||
0x807dff7d, 0x00000100,
|
||||
0x8078ff78, 0x00000100,
|
||||
0xbf0a6f7d, 0xbfa2fff5,
|
||||
0xbef80080, 0xbefe00c1,
|
||||
0x857d9972, 0x8b7d817d,
|
||||
0xbf06817d, 0xbfa20002,
|
||||
0xbeff0080, 0xbfa00001,
|
||||
0xbeff00c1, 0xb8ef3b05,
|
||||
0x806f816f, 0x846f826f,
|
||||
0x857d9972, 0x8b7d817d,
|
||||
0xbf06817d, 0xbfa20024,
|
||||
0xbef600ff, 0x01000000,
|
||||
0xbeee0078, 0x8078ff78,
|
||||
0x00000200, 0xbefd0084,
|
||||
0xbf0a6f7d, 0xbfa10050,
|
||||
0xe0505000, 0x781d0000,
|
||||
0xe0505080, 0x781d0100,
|
||||
0xe0505100, 0x781d0200,
|
||||
0xe0505180, 0x781d0300,
|
||||
0xbf8903f7, 0x7e008500,
|
||||
0x7e028501, 0x7e048502,
|
||||
0x7e068503, 0x807d847d,
|
||||
0x8078ff78, 0x00000200,
|
||||
0xbf0a6f7d, 0xbfa2ffee,
|
||||
0xe0505000, 0x6e1d0000,
|
||||
0xe0505080, 0x6e1d0100,
|
||||
0xe0505100, 0x6e1d0200,
|
||||
0xe0505180, 0x6e1d0300,
|
||||
0xbf8903f7, 0xbfa00034,
|
||||
0xbef600ff, 0x01000000,
|
||||
0xbeee0078, 0x8078ff78,
|
||||
0x00000400, 0xbefd0084,
|
||||
0xbf0a6f7d, 0xbfa10012,
|
||||
0xe0505000, 0x781d0000,
|
||||
0xe0505100, 0x781d0100,
|
||||
0xe0505200, 0x781d0200,
|
||||
0xe0505300, 0x781d0300,
|
||||
0xbf8903f7, 0x7e008500,
|
||||
0x7e028501, 0x7e048502,
|
||||
0x7e068503, 0x807d847d,
|
||||
0x8078ff78, 0x00000400,
|
||||
0xbf0a6f7d, 0xbfa2ffee,
|
||||
0xb8ef1e06, 0x8b6fc16f,
|
||||
0xbfa1000e, 0x846f836f,
|
||||
0x806f7d6f, 0xbefe00c1,
|
||||
0xbeff0080, 0xe0505000,
|
||||
0x781d0000, 0xbf8903f7,
|
||||
0x7e008500, 0x807d817d,
|
||||
0x8078ff78, 0x00000080,
|
||||
0xbf0a6f7d, 0xbfa2fff7,
|
||||
0xbeff00c1, 0xe0505000,
|
||||
0x6e1d0000, 0xe0505100,
|
||||
0x6e1d0100, 0xe0505200,
|
||||
0x6e1d0200, 0xe0505300,
|
||||
0x6e1d0300, 0xbf8903f7,
|
||||
0xb8f83b05, 0x80788178,
|
||||
0xbf0d9972, 0xbfa20002,
|
||||
0x84788978, 0xbfa00001,
|
||||
0x84788a78, 0xb8ee1e06,
|
||||
0x846e8a6e, 0x80786e78,
|
||||
0x8078ff78, 0x00000200,
|
||||
0x80f8ff78, 0x00000050,
|
||||
0xbef600ff, 0x01000000,
|
||||
0xbefd00ff, 0x0000006c,
|
||||
0x80f89078, 0xf428403a,
|
||||
0xf0000000, 0xbf89fc07,
|
||||
0x80fd847d, 0xbf800000,
|
||||
0xbe804300, 0xbe824302,
|
||||
0x80f8a078, 0xf42c403a,
|
||||
0xf0000000, 0xbf89fc07,
|
||||
0x80fd887d, 0xbf800000,
|
||||
0xbe804300, 0xbe824302,
|
||||
0xbe844304, 0xbe864306,
|
||||
0x80f8c078, 0xf430403a,
|
||||
0xf0000000, 0xbf89fc07,
|
||||
0x80fd907d, 0xbf800000,
|
||||
0xbe804300, 0xbe824302,
|
||||
0xbe844304, 0xbe864306,
|
||||
0xbe884308, 0xbe8a430a,
|
||||
0xbe8c430c, 0xbe8e430e,
|
||||
0xbf06807d, 0xbfa1fff0,
|
||||
0xb980f801, 0x00000000,
|
||||
0xbfbd0000, 0xb8f83b05,
|
||||
0x80788178, 0xbf0d9972,
|
||||
0xbfa20002, 0x84788978,
|
||||
0xbfa00001, 0x84788a78,
|
||||
0xb8ee1e06, 0x846e8a6e,
|
||||
0x80786e78, 0x8078ff78,
|
||||
0x00000200, 0xbef600ff,
|
||||
0x01000000, 0xf4205bfa,
|
||||
0xf0000000, 0x80788478,
|
||||
0xf4205b7a, 0xf0000000,
|
||||
0x80788478, 0xf4205c3a,
|
||||
0xf4205b3a, 0xf0000000,
|
||||
0x80788478, 0xf4205b7a,
|
||||
0xf0000000, 0x80788478,
|
||||
0xf4205c7a, 0xf0000000,
|
||||
0x80788478, 0xf4205eba,
|
||||
0xf4205c3a, 0xf0000000,
|
||||
0x80788478, 0xf4205c7a,
|
||||
0xf0000000, 0x80788478,
|
||||
0xf4205efa, 0xf0000000,
|
||||
0x80788478, 0xf4205e7a,
|
||||
0xf4205eba, 0xf0000000,
|
||||
0x80788478, 0xf4205efa,
|
||||
0xf0000000, 0x80788478,
|
||||
0xf4205cfa, 0xf0000000,
|
||||
0x80788478, 0xf4205bba,
|
||||
0xf4205e7a, 0xf0000000,
|
||||
0x80788478, 0xf4205cfa,
|
||||
0xf0000000, 0x80788478,
|
||||
0xbf89fc07, 0xb96ef814,
|
||||
0xf4205bba, 0xf0000000,
|
||||
0x80788478, 0xbf89fc07,
|
||||
0xb96ef815, 0xbefd006f,
|
||||
0xbefe0070, 0xbeff0071,
|
||||
0x8b6f7bff, 0x000003ff,
|
||||
0xb96f4803, 0x8b6f7bff,
|
||||
0xfffff800, 0x856f8b6f,
|
||||
0xb96fa2c3, 0xb973f801,
|
||||
0xb8ee3b05, 0x806e816e,
|
||||
0xbf0d9972, 0xbfa20002,
|
||||
0x846e896e, 0xbfa00001,
|
||||
0x846e8a6e, 0xb8ef1e06,
|
||||
0x846f8a6f, 0x806e6f6e,
|
||||
0x806eff6e, 0x00000200,
|
||||
0x806e746e, 0x826f8075,
|
||||
0x8b6fff6f, 0x0000ffff,
|
||||
0xf4085c37, 0xf8000050,
|
||||
0xf4085d37, 0xf8000060,
|
||||
0xf4005e77, 0xf8000074,
|
||||
0xbf89fc07, 0x8b6dff6d,
|
||||
0x0000ffff, 0x8bfe7e7e,
|
||||
0x8bea6a6a, 0xb8eef802,
|
||||
0xbf0d866e, 0xbfa20002,
|
||||
0xb97af802, 0xbe80486c,
|
||||
0xb97af802, 0xbe804a6c,
|
||||
0xbfb00000, 0xbf9f0000,
|
||||
0xb96ef814, 0xf4205bba,
|
||||
0xf0000000, 0x80788478,
|
||||
0xbf89fc07, 0xb96ef815,
|
||||
0xbefd006f, 0xbefe0070,
|
||||
0xbeff0071, 0x8b6f7bff,
|
||||
0x000003ff, 0xb96f4803,
|
||||
0x8b6f7bff, 0xfffff800,
|
||||
0x856f8b6f, 0xb96fa2c3,
|
||||
0xb973f801, 0xb8ee3b05,
|
||||
0x806e816e, 0xbf0d9972,
|
||||
0xbfa20002, 0x846e896e,
|
||||
0xbfa00001, 0x846e8a6e,
|
||||
0xb8ef1e06, 0x846f8a6f,
|
||||
0x806e6f6e, 0x806eff6e,
|
||||
0x00000200, 0x806e746e,
|
||||
0x826f8075, 0x8b6fff6f,
|
||||
0x0000ffff, 0xf4085c37,
|
||||
0xf8000050, 0xf4085d37,
|
||||
0xf8000060, 0xf4005e77,
|
||||
0xf8000074, 0xbf89fc07,
|
||||
0x8b6dff6d, 0x0000ffff,
|
||||
0x8bfe7e7e, 0x8bea6a6a,
|
||||
0xb8eef802, 0xbf0d866e,
|
||||
0xbfa20002, 0xb97af802,
|
||||
0xbe80486c, 0xb97af802,
|
||||
0xbe804a6c, 0xbfb00000,
|
||||
0xbf9f0000, 0xbf9f0000,
|
||||
0xbf9f0000, 0xbf9f0000,
|
||||
0xbf9f0000, 0x00000000,
|
||||
};
|
||||
|
@ -186,6 +186,12 @@ L_SKIP_RESTORE:
|
||||
s_getreg_b32 s_save_trapsts, hwreg(HW_REG_TRAPSTS)
|
||||
|
||||
#if SW_SA_TRAP
|
||||
// If ttmp1[30] is set then issue s_barrier to unblock dependent waves.
|
||||
s_bitcmp1_b32 s_save_pc_hi, 30
|
||||
s_cbranch_scc0 L_TRAP_NO_BARRIER
|
||||
s_barrier
|
||||
|
||||
L_TRAP_NO_BARRIER:
|
||||
// If ttmp1[31] is set then trap may occur early.
|
||||
// Spin wait until SAVECTX exception is raised.
|
||||
s_bitcmp1_b32 s_save_pc_hi, 31
|
||||
|
@ -973,12 +973,10 @@ out_unlock_prange:
|
||||
out_unlock_svms:
|
||||
mutex_unlock(&p->svms.lock);
|
||||
out_unref_process:
|
||||
pr_debug("CPU fault svms 0x%p address 0x%lx done\n", &p->svms, addr);
|
||||
kfd_unref_process(p);
|
||||
out_mmput:
|
||||
mmput(mm);
|
||||
|
||||
pr_debug("CPU fault svms 0x%p address 0x%lx done\n", &p->svms, addr);
|
||||
|
||||
return r ? VM_FAULT_SIGBUS : 0;
|
||||
}
|
||||
|
||||
|
@ -1549,6 +1549,9 @@ static int amdgpu_dm_init(struct amdgpu_device *adev)
|
||||
|
||||
adev->dm.dc->debug.visual_confirm = amdgpu_dc_visual_confirm;
|
||||
|
||||
/* TODO: Remove after DP2 receiver gets proper support of Cable ID feature */
|
||||
adev->dm.dc->debug.ignore_cable_id = true;
|
||||
|
||||
r = dm_dmub_hw_init(adev);
|
||||
if (r) {
|
||||
DRM_ERROR("DMUB interface failed to initialize: status=%d\n", r);
|
||||
|
@ -157,6 +157,7 @@ void dcn32_init_clocks(struct clk_mgr *clk_mgr_base)
|
||||
struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base);
|
||||
unsigned int num_levels;
|
||||
struct clk_limit_num_entries *num_entries_per_clk = &clk_mgr_base->bw_params->clk_table.num_entries_per_clk;
|
||||
unsigned int i;
|
||||
|
||||
memset(&(clk_mgr_base->clks), 0, sizeof(struct dc_clocks));
|
||||
clk_mgr_base->clks.p_state_change_support = true;
|
||||
@ -205,18 +206,17 @@ void dcn32_init_clocks(struct clk_mgr *clk_mgr_base)
|
||||
clk_mgr->dpm_present = true;
|
||||
|
||||
if (clk_mgr_base->ctx->dc->debug.min_disp_clk_khz) {
|
||||
unsigned int i;
|
||||
|
||||
for (i = 0; i < num_levels; i++)
|
||||
if (clk_mgr_base->bw_params->clk_table.entries[i].dispclk_mhz
|
||||
< khz_to_mhz_ceil(clk_mgr_base->ctx->dc->debug.min_disp_clk_khz))
|
||||
clk_mgr_base->bw_params->clk_table.entries[i].dispclk_mhz
|
||||
= khz_to_mhz_ceil(clk_mgr_base->ctx->dc->debug.min_disp_clk_khz);
|
||||
}
|
||||
for (i = 0; i < num_levels; i++)
|
||||
if (clk_mgr_base->bw_params->clk_table.entries[i].dispclk_mhz > 1950)
|
||||
clk_mgr_base->bw_params->clk_table.entries[i].dispclk_mhz = 1950;
|
||||
|
||||
if (clk_mgr_base->ctx->dc->debug.min_dpp_clk_khz) {
|
||||
unsigned int i;
|
||||
|
||||
for (i = 0; i < num_levels; i++)
|
||||
if (clk_mgr_base->bw_params->clk_table.entries[i].dppclk_mhz
|
||||
< khz_to_mhz_ceil(clk_mgr_base->ctx->dc->debug.min_dpp_clk_khz))
|
||||
@ -669,6 +669,9 @@ static void dcn32_get_memclk_states_from_smu(struct clk_mgr *clk_mgr_base)
|
||||
&clk_mgr_base->bw_params->clk_table.entries[0].memclk_mhz,
|
||||
&num_entries_per_clk->num_memclk_levels);
|
||||
|
||||
/* memclk must have at least one level */
|
||||
num_entries_per_clk->num_memclk_levels = num_entries_per_clk->num_memclk_levels ? num_entries_per_clk->num_memclk_levels : 1;
|
||||
|
||||
dcn32_init_single_clock(clk_mgr, PPCLK_FCLK,
|
||||
&clk_mgr_base->bw_params->clk_table.entries[0].fclk_mhz,
|
||||
&num_entries_per_clk->num_fclk_levels);
|
||||
|
@ -852,6 +852,7 @@ struct dc_debug_options {
|
||||
bool enable_double_buffered_dsc_pg_support;
|
||||
bool enable_dp_dig_pixel_rate_div_policy;
|
||||
enum lttpr_mode lttpr_mode_override;
|
||||
unsigned int dsc_delay_factor_wa_x1000;
|
||||
};
|
||||
|
||||
struct gpu_info_soc_bounding_box_v1_0;
|
||||
|
@ -623,6 +623,10 @@ void hubp2_cursor_set_attributes(
|
||||
hubp->att.size.bits.width = attr->width;
|
||||
hubp->att.size.bits.height = attr->height;
|
||||
hubp->att.cur_ctl.bits.mode = attr->color_format;
|
||||
|
||||
hubp->cur_rect.w = attr->width;
|
||||
hubp->cur_rect.h = attr->height;
|
||||
|
||||
hubp->att.cur_ctl.bits.pitch = hw_pitch;
|
||||
hubp->att.cur_ctl.bits.line_per_chunk = lpc;
|
||||
hubp->att.cur_ctl.bits.cur_2x_magnify = attr->attribute_flags.bits.ENABLE_MAGNIFICATION;
|
||||
|
@ -847,7 +847,7 @@ static const struct resource_caps res_cap_dcn314 = {
|
||||
.num_ddc = 5,
|
||||
.num_vmid = 16,
|
||||
.num_mpc_3dlut = 2,
|
||||
.num_dsc = 3,
|
||||
.num_dsc = 4,
|
||||
};
|
||||
|
||||
static const struct dc_plane_cap plane_cap = {
|
||||
|
@ -1228,6 +1228,7 @@ int dcn20_populate_dml_pipes_from_context(
|
||||
pipes[pipe_cnt].pipe.src.dcc = false;
|
||||
pipes[pipe_cnt].pipe.src.dcc_rate = 1;
|
||||
pipes[pipe_cnt].pipe.dest.synchronized_vblank_all_planes = synchronized_vblank;
|
||||
pipes[pipe_cnt].pipe.dest.synchronize_timings = synchronized_vblank;
|
||||
pipes[pipe_cnt].pipe.dest.hblank_start = timing->h_total - timing->h_front_porch;
|
||||
pipes[pipe_cnt].pipe.dest.hblank_end = pipes[pipe_cnt].pipe.dest.hblank_start
|
||||
- timing->h_addressable
|
||||
|
@ -2359,9 +2359,11 @@ void dcn32_update_bw_bounding_box_fpu(struct dc *dc, struct clk_bw_params *bw_pa
|
||||
|
||||
if (dc->ctx->dc_bios->vram_info.dram_channel_width_bytes)
|
||||
dcn3_2_soc.dram_channel_width_bytes = dc->ctx->dc_bios->vram_info.dram_channel_width_bytes;
|
||||
|
||||
}
|
||||
|
||||
/* DML DSC delay factor workaround */
|
||||
dcn3_2_ip.dsc_delay_factor_wa = dc->debug.dsc_delay_factor_wa_x1000 / 1000.0;
|
||||
|
||||
/* Override dispclk_dppclk_vco_speed_mhz from Clk Mgr */
|
||||
dcn3_2_soc.dispclk_dppclk_vco_speed_mhz = dc->clk_mgr->dentist_vco_freq_khz / 1000.0;
|
||||
dc->dml.soc.dispclk_dppclk_vco_speed_mhz = dc->clk_mgr->dentist_vco_freq_khz / 1000.0;
|
||||
|
@ -364,10 +364,11 @@ static void DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerforman
|
||||
for (k = 0; k < mode_lib->vba.NumberOfActiveSurfaces; ++k) {
|
||||
v->DSCDelay[k] = dml32_DSCDelayRequirement(mode_lib->vba.DSCEnabled[k],
|
||||
mode_lib->vba.ODMCombineEnabled[k], mode_lib->vba.DSCInputBitPerComponent[k],
|
||||
mode_lib->vba.OutputBpp[k], mode_lib->vba.HActive[k], mode_lib->vba.HTotal[k],
|
||||
mode_lib->vba.OutputBppPerState[mode_lib->vba.VoltageLevel][k],
|
||||
mode_lib->vba.HActive[k], mode_lib->vba.HTotal[k],
|
||||
mode_lib->vba.NumberOfDSCSlices[k], mode_lib->vba.OutputFormat[k],
|
||||
mode_lib->vba.Output[k], mode_lib->vba.PixelClock[k],
|
||||
mode_lib->vba.PixelClockBackEnd[k]);
|
||||
mode_lib->vba.PixelClockBackEnd[k], mode_lib->vba.ip.dsc_delay_factor_wa);
|
||||
}
|
||||
|
||||
for (k = 0; k < mode_lib->vba.NumberOfActiveSurfaces; ++k)
|
||||
@ -1627,7 +1628,7 @@ static void mode_support_configuration(struct vba_vars_st *v,
|
||||
&& !mode_lib->vba.MSOOrODMSplitWithNonDPLink
|
||||
&& !mode_lib->vba.NotEnoughLanesForMSO
|
||||
&& mode_lib->vba.LinkCapacitySupport[i] == true && !mode_lib->vba.P2IWith420
|
||||
&& !mode_lib->vba.DSCOnlyIfNecessaryWithBPP
|
||||
//&& !mode_lib->vba.DSCOnlyIfNecessaryWithBPP
|
||||
&& !mode_lib->vba.DSC422NativeNotSupported
|
||||
&& !mode_lib->vba.MPCCombineMethodIncompatible
|
||||
&& mode_lib->vba.ODMCombine2To1SupportCheckOK[i] == true
|
||||
@ -2475,7 +2476,8 @@ void dml32_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_l
|
||||
mode_lib->vba.OutputBppPerState[i][k], mode_lib->vba.HActive[k],
|
||||
mode_lib->vba.HTotal[k], mode_lib->vba.NumberOfDSCSlices[k],
|
||||
mode_lib->vba.OutputFormat[k], mode_lib->vba.Output[k],
|
||||
mode_lib->vba.PixelClock[k], mode_lib->vba.PixelClockBackEnd[k]);
|
||||
mode_lib->vba.PixelClock[k], mode_lib->vba.PixelClockBackEnd[k],
|
||||
mode_lib->vba.ip.dsc_delay_factor_wa);
|
||||
}
|
||||
|
||||
for (k = 0; k <= mode_lib->vba.NumberOfActiveSurfaces - 1; k++) {
|
||||
|
@ -1726,7 +1726,8 @@ unsigned int dml32_DSCDelayRequirement(bool DSCEnabled,
|
||||
enum output_format_class OutputFormat,
|
||||
enum output_encoder_class Output,
|
||||
double PixelClock,
|
||||
double PixelClockBackEnd)
|
||||
double PixelClockBackEnd,
|
||||
double dsc_delay_factor_wa)
|
||||
{
|
||||
unsigned int DSCDelayRequirement_val;
|
||||
|
||||
@ -1746,7 +1747,7 @@ unsigned int dml32_DSCDelayRequirement(bool DSCEnabled,
|
||||
}
|
||||
|
||||
DSCDelayRequirement_val = DSCDelayRequirement_val + (HTotal - HActive) *
|
||||
dml_ceil(DSCDelayRequirement_val / HActive, 1);
|
||||
dml_ceil((double)DSCDelayRequirement_val / HActive, 1);
|
||||
|
||||
DSCDelayRequirement_val = DSCDelayRequirement_val * PixelClock / PixelClockBackEnd;
|
||||
|
||||
@ -1764,7 +1765,7 @@ unsigned int dml32_DSCDelayRequirement(bool DSCEnabled,
|
||||
dml_print("DML::%s: DSCDelayRequirement_val = %d\n", __func__, DSCDelayRequirement_val);
|
||||
#endif
|
||||
|
||||
return DSCDelayRequirement_val;
|
||||
return dml_ceil(DSCDelayRequirement_val * dsc_delay_factor_wa, 1);
|
||||
}
|
||||
|
||||
void dml32_CalculateSurfaceSizeInMall(
|
||||
|
@ -327,7 +327,8 @@ unsigned int dml32_DSCDelayRequirement(bool DSCEnabled,
|
||||
enum output_format_class OutputFormat,
|
||||
enum output_encoder_class Output,
|
||||
double PixelClock,
|
||||
double PixelClockBackEnd);
|
||||
double PixelClockBackEnd,
|
||||
double dsc_delay_factor_wa);
|
||||
|
||||
void dml32_CalculateSurfaceSizeInMall(
|
||||
unsigned int NumberOfActiveSurfaces,
|
||||
|
@ -291,8 +291,8 @@ void dml32_rq_dlg_get_dlg_reg(struct display_mode_lib *mode_lib,
|
||||
|
||||
dml_print("DML_DLG: %s: vready_after_vcount0 = %d\n", __func__, dlg_regs->vready_after_vcount0);
|
||||
|
||||
dst_x_after_scaler = get_dst_x_after_scaler(mode_lib, e2e_pipe_param, num_pipes, pipe_idx);
|
||||
dst_y_after_scaler = get_dst_y_after_scaler(mode_lib, e2e_pipe_param, num_pipes, pipe_idx);
|
||||
dst_x_after_scaler = dml_ceil(get_dst_x_after_scaler(mode_lib, e2e_pipe_param, num_pipes, pipe_idx), 1);
|
||||
dst_y_after_scaler = dml_ceil(get_dst_y_after_scaler(mode_lib, e2e_pipe_param, num_pipes, pipe_idx), 1);
|
||||
|
||||
// do some adjustment on the dst_after scaler to account for odm combine mode
|
||||
dml_print("DML_DLG: %s: input dst_x_after_scaler = %d\n", __func__, dst_x_after_scaler);
|
||||
|
@ -29,6 +29,7 @@
|
||||
#include "dcn321_fpu.h"
|
||||
#include "dcn32/dcn32_resource.h"
|
||||
#include "dcn321/dcn321_resource.h"
|
||||
#include "dml/dcn32/display_mode_vba_util_32.h"
|
||||
|
||||
#define DCN3_2_DEFAULT_DET_SIZE 256
|
||||
|
||||
@ -119,15 +120,15 @@ struct _vcs_dpi_soc_bounding_box_st dcn3_21_soc = {
|
||||
},
|
||||
},
|
||||
.num_states = 1,
|
||||
.sr_exit_time_us = 12.36,
|
||||
.sr_enter_plus_exit_time_us = 16.72,
|
||||
.sr_exit_time_us = 19.95,
|
||||
.sr_enter_plus_exit_time_us = 24.36,
|
||||
.sr_exit_z8_time_us = 285.0,
|
||||
.sr_enter_plus_exit_z8_time_us = 320,
|
||||
.writeback_latency_us = 12.0,
|
||||
.round_trip_ping_latency_dcfclk_cycles = 263,
|
||||
.urgent_latency_pixel_data_only_us = 4.0,
|
||||
.urgent_latency_pixel_mixed_with_vm_data_us = 4.0,
|
||||
.urgent_latency_vm_data_only_us = 4.0,
|
||||
.urgent_latency_pixel_data_only_us = 9.35,
|
||||
.urgent_latency_pixel_mixed_with_vm_data_us = 9.35,
|
||||
.urgent_latency_vm_data_only_us = 9.35,
|
||||
.fclk_change_latency_us = 20,
|
||||
.usr_retraining_latency_us = 2,
|
||||
.smn_latency_us = 2,
|
||||
@ -538,9 +539,11 @@ void dcn321_update_bw_bounding_box_fpu(struct dc *dc, struct clk_bw_params *bw_p
|
||||
|
||||
if (dc->ctx->dc_bios->vram_info.dram_channel_width_bytes)
|
||||
dcn3_21_soc.dram_channel_width_bytes = dc->ctx->dc_bios->vram_info.dram_channel_width_bytes;
|
||||
|
||||
}
|
||||
|
||||
/* DML DSC delay factor workaround */
|
||||
dcn3_21_ip.dsc_delay_factor_wa = dc->debug.dsc_delay_factor_wa_x1000 / 1000.0;
|
||||
|
||||
/* Override dispclk_dppclk_vco_speed_mhz from Clk Mgr */
|
||||
dcn3_21_soc.dispclk_dppclk_vco_speed_mhz = dc->clk_mgr->dentist_vco_freq_khz / 1000.0;
|
||||
dc->dml.soc.dispclk_dppclk_vco_speed_mhz = dc->clk_mgr->dentist_vco_freq_khz / 1000.0;
|
||||
|
@ -364,6 +364,9 @@ struct _vcs_dpi_ip_params_st {
|
||||
unsigned int max_num_dp2p0_outputs;
|
||||
unsigned int max_num_dp2p0_streams;
|
||||
unsigned int VBlankNomDefaultUS;
|
||||
|
||||
/* DM workarounds */
|
||||
double dsc_delay_factor_wa; // TODO: Remove after implementing root cause fix
|
||||
};
|
||||
|
||||
struct _vcs_dpi_display_xfc_params_st {
|
||||
|
@ -625,7 +625,7 @@ static void fetch_pipe_params(struct display_mode_lib *mode_lib)
|
||||
mode_lib->vba.skip_dio_check[mode_lib->vba.NumberOfActivePlanes] =
|
||||
dout->is_virtual;
|
||||
|
||||
if (!dout->dsc_enable)
|
||||
if (dout->dsc_enable)
|
||||
mode_lib->vba.ForcedOutputLinkBPP[mode_lib->vba.NumberOfActivePlanes] = dout->output_bpp;
|
||||
else
|
||||
mode_lib->vba.ForcedOutputLinkBPP[mode_lib->vba.NumberOfActivePlanes] = 0.0;
|
||||
|
Loading…
Reference in New Issue
Block a user