More Qualcomm driver changes for v5.20
This adds support for booting secondary cores, SPM, SMD-RPM and RPM power-domain support for the MSM8909 platform. It drops an unnecessary print in icc-bwmon, corrects SA8540P entries in socinfo and a Kconfig build dependency for QCOM_RPMPD. Lastly it continues to clean up up the Devicetree bindings for the Qualcomm drivers. -----BEGIN PGP SIGNATURE----- iQJPBAABCAA5FiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmLYinIbHGJqb3JuLmFu ZGVyc3NvbkBsaW5hcm8ub3JnAAoJEAsfOT8Nma3FryMQANQKam+7lJrykwF3bt8t e/ZR1SWPcKTu5dudsnA2GACnycQ8XQr5M06HRVghwveleXbjHyE3beLEy/NwfbTL P4ufdDtg/UCwZXJ+p2ZDtbKIWQQU1qgItekYiN3lDEnb3Y5R7vI2h2mhdDOZh8yn HtzI5EeI5gMilZ7yYtqPR3DrXpfdYBaGANshyzmP07eDTz+UyaSSKoALsy7jeWB2 9d4/inH35Tuqv/98oLaf+gK1vH89AVA13N6fVaQxgPOne3FN1bsqBFGc/RvW+phH CG+D86lrxq7iChdEcvcoPCkabYi4lNqhbKZOiAAimqrwFCIksVJSE7adDul0JcPF g0ml1jWIx+Jsj5TmuRH01CaxCuLtv9WKARi64vqA8dwSYuak8irP3WXbbtv/sNgW PokJovzDwwSs71Rh8PmlXC//XY8gbsVj/umI8lEsS5/PrvdCXYsRTjRzvZ5uNtiQ 5s1fm6xMT2AMbp+Y6ZcnmPhuGntfiJZFj9GivfZuaYF44Ov6mRScHnRADC9oXpBf 7qlaC1T05PBUHOMB19xpOOsqtBpfX9TCaCqhsVxhH4bjzzYoMuV+yYlI3CqPv3yL v9bKfMkbsOpZywCxyve2d6jqCeL8fA2iPw3MzFIlmESRA4MwdXswmxHCE3C7FOHA SZkdXKa4EeWQRBf9g5ri3EM/ =gLQ3 -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmLZTeMACgkQmmx57+YA GNmWzg//eCc5hZXF1HumCX21ueWjwnAaZWZZECe+Plc0GB6nMnPVgCw2S29SCfYQ cpR1B0YME/AgK7GiwdxW7mh9wtRzAtR7aSn2Z3nsmF7lMTJI5mJTDVIApoCvgHDu 5eyFIoiwtWYKFht5TLvC56fnOW73Jp6m5K4HElH2q6A387uurc8ClmuhnG7Dbhsp WCYB7aqfqYlMybf8EYo3BAng63v6wLDf93+HyGokRiRHeh/h7xF4liLVY9XCNxOH NSxBn8zZDRttEww+xSP+hDpTo316YG3SiNf3XW5ojVMrSUsbJM76DMTuPW70LJvK obL4SL7zPeo7yH0NiHK699k+jchozb6Uq9WNnWHc3b5ABXK1RV0BoUNPtTHjiYBs ojJnqjPmGJHaLmrvqEihyzRxXJtFMFU22t2EwdUmxQyYdgffS35W6lJtlNP/q7ph i+DFoyKsmH8T9zNibNXjoV5NAo73OyKKriWjQS/DYR2/T/kwooXo9h9RS8rppo4M kqumzGT2gdLoYI/1hBgXurQpMr231XvesLNSNJpQNz3UfYC0cuC7nAe6EQ5Jn2Da hLQrRSj+TMghSq8dw5yOx1fvWjyYT1uFKiSgOkWXvX6Pcui6UC5oJ3zivv7JOXuc Jjn+0B31KIBUyh8hq4cNrGaF8edVf8Y0vxp0mKsnnYjQxxuZHkc= =TP2T -----END PGP SIGNATURE----- Merge tag 'qcom-drivers-for-5.20-2' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/drivers More Qualcomm driver changes for v5.20 This adds support for booting secondary cores, SPM, SMD-RPM and RPM power-domain support for the MSM8909 platform. It drops an unnecessary print in icc-bwmon, corrects SA8540P entries in socinfo and a Kconfig build dependency for QCOM_RPMPD. Lastly it continues to clean up up the Devicetree bindings for the Qualcomm drivers. * tag 'qcom-drivers-for-5.20-2' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: dt-bindings: soc: qcom: qcom,smd-rpm: add power-controller dt-bindings: soc: qcom: aoss: document qcom,sm8450-aoss-qmp dt-bindings: soc: qcom,rpmh-rsc: simplify qcom,tcs-config ARM: mach-qcom: Add support for MSM8909 dt-bindings: arm: cpus: Document "qcom,msm8909-smp" enable-method soc: qcom: spm: Add CPU data for MSM8909 dt-bindings: soc: qcom: spm: Add MSM8909 CPU compatible soc: qcom: rpmpd: Add compatible for MSM8909 dt-bindings: power: qcom-rpmpd: Add MSM8909 power domains soc: qcom: smd-rpm: Add compatible for MSM8909 dt-bindings: soc: qcom: smd-rpm: Add MSM8909 soc: qcom: icc-bwmon: Remove unnecessary print function dev_err() soc: qcom: socinfo: Fix the id of SA8540P SoC soc: qcom: Make QCOM_RPMPD depend on PM Link: https://lore.kernel.org/r/20220720230648.2113609-1-bjorn.andersson@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
commit
99978d2fd9
@ -221,6 +221,7 @@ properties:
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- qcom,kpss-acc-v1
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- qcom,kpss-acc-v2
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- qcom,msm8226-smp
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- qcom,msm8909-smp
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# Only valid on ARM 32-bit, see above for ARM v8 64-bit
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- qcom,msm8916-smp
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- renesas,apmu
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@ -18,6 +18,7 @@ properties:
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enum:
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- qcom,mdm9607-rpmpd
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- qcom,msm8226-rpmpd
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- qcom,msm8909-rpmpd
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- qcom,msm8916-rpmpd
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- qcom,msm8939-rpmpd
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- qcom,msm8953-rpmpd
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@ -33,6 +33,7 @@ properties:
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- qcom,sm8150-aoss-qmp
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- qcom,sm8250-aoss-qmp
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- qcom,sm8350-aoss-qmp
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- qcom,sm8450-aoss-qmp
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- const: qcom,aoss-qmp
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reg:
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@ -65,33 +65,22 @@ properties:
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qcom,tcs-config:
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$ref: /schemas/types.yaml#/definitions/uint32-matrix
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minItems: 4
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maxItems: 4
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items:
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- items:
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- description: TCS type
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enum: [ 0, 1, 2, 3 ]
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- description: Number of TCS
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- items:
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- description: TCS type
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enum: [ 0, 1, 2, 3 ]
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- description: Number of TCS
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- items:
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- description: TCS type
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enum: [ 0, 1, 2, 3]
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- description: Numbe r of TCS
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- items:
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- description: TCS type
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enum: [ 0, 1, 2, 3 ]
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- description: Number of TCS
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items:
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- description: |
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TCS type::
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- ACTIVE_TCS
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- SLEEP_TCS
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- WAKE_TCS
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- CONTROL_TCS
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enum: [ 0, 1, 2, 3 ]
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- description: Number of TCS
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description: |
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The tuple defining the configuration of TCS. Must have two cells which
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describe each TCS type. The order of the TCS must match the hardware
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configuration.
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Cell 1 (TCS Type):: TCS types to be specified::
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- ACTIVE_TCS
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- SLEEP_TCS
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- WAKE_TCS
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- CONTROL_TCS
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Cell 2 (Number of TCS):: <u32>
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qcom,tcs-offset:
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$ref: /schemas/types.yaml#/definitions/uint32
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@ -34,6 +34,7 @@ properties:
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- qcom,rpm-apq8084
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- qcom,rpm-ipq6018
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- qcom,rpm-msm8226
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- qcom,rpm-msm8909
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- qcom,rpm-msm8916
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- qcom,rpm-msm8936
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- qcom,rpm-msm8953
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@ -51,6 +52,9 @@ properties:
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$ref: /schemas/clock/qcom,rpmcc.yaml#
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unevaluatedProperties: false
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power-controller:
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$ref: /schemas/power/qcom,rpmpd.yaml#
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qcom,smd-channels:
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$ref: /schemas/types.yaml#/definitions/string-array
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description: Channel name used for the RPM communication
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@ -22,6 +22,7 @@ properties:
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- qcom,sdm660-silver-saw2-v4.1-l2
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- qcom,msm8998-gold-saw2-v4.1-l2
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- qcom,msm8998-silver-saw2-v4.1-l2
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- qcom,msm8909-saw2-v3.0-cpu
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- qcom,msm8916-saw2-v3.0-cpu
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- qcom,msm8226-saw2-v2.1-cpu
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- qcom,msm8974-saw2-v2.1-cpu
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@ -20,6 +20,10 @@ config ARCH_MSM8X60
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bool "Enable support for MSM8X60"
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select CLKSRC_QCOM
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config ARCH_MSM8909
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bool "Enable support for MSM8909"
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select HAVE_ARM_ARCH_TIMER
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config ARCH_MSM8916
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bool "Enable support for MSM8916"
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select HAVE_ARM_ARCH_TIMER
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@ -384,6 +384,7 @@ static const struct smp_operations qcom_smp_cortex_a7_ops __initconst = {
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#endif
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};
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CPU_METHOD_OF_DECLARE(qcom_smp_msm8226, "qcom,msm8226-smp", &qcom_smp_cortex_a7_ops);
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CPU_METHOD_OF_DECLARE(qcom_smp_msm8909, "qcom,msm8909-smp", &qcom_smp_cortex_a7_ops);
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CPU_METHOD_OF_DECLARE(qcom_smp_msm8916, "qcom,msm8916-smp", &qcom_smp_cortex_a7_ops);
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static const struct smp_operations qcom_smp_kpssv1_ops __initconst = {
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@ -129,6 +129,7 @@ config QCOM_RPMHPD
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config QCOM_RPMPD
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tristate "Qualcomm RPM Power domain driver"
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depends on PM
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depends on QCOM_SMD_RPM
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select PM_GENERIC_DOMAINS
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select PM_GENERIC_DOMAINS_OF
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@ -345,10 +345,8 @@ static int bwmon_probe(struct platform_device *pdev)
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}
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bwmon->irq = platform_get_irq(pdev, 0);
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if (bwmon->irq < 0) {
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dev_err(dev, "failed to acquire bwmon IRQ\n");
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if (bwmon->irq < 0)
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return bwmon->irq;
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}
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ret = devm_pm_opp_of_add_table(dev);
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if (ret)
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@ -453,6 +453,7 @@ static const struct rpmpd_desc qcm2290_desc = {
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static const struct of_device_id rpmpd_match_table[] = {
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{ .compatible = "qcom,mdm9607-rpmpd", .data = &mdm9607_desc },
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{ .compatible = "qcom,msm8226-rpmpd", .data = &msm8226_desc },
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{ .compatible = "qcom,msm8909-rpmpd", .data = &msm8916_desc },
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{ .compatible = "qcom,msm8916-rpmpd", .data = &msm8916_desc },
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{ .compatible = "qcom,msm8939-rpmpd", .data = &msm8939_desc },
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{ .compatible = "qcom,msm8953-rpmpd", .data = &msm8953_desc },
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@ -234,6 +234,7 @@ static const struct of_device_id qcom_smd_rpm_of_match[] = {
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{ .compatible = "qcom,rpm-apq8084" },
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{ .compatible = "qcom,rpm-ipq6018" },
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{ .compatible = "qcom,rpm-msm8226" },
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{ .compatible = "qcom,rpm-msm8909" },
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{ .compatible = "qcom,rpm-msm8916" },
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{ .compatible = "qcom,rpm-msm8936" },
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{ .compatible = "qcom,rpm-msm8953" },
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@ -328,7 +328,8 @@ static const struct soc_id soc_id[] = {
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{ 455, "QRB5165" },
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{ 457, "SM8450" },
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{ 459, "SM7225" },
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{ 460, "SA8540P" },
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{ 460, "SA8295P" },
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{ 461, "SA8540P" },
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{ 480, "SM8450" },
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{ 482, "SM8450" },
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{ 487, "SC7280" },
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@ -74,6 +74,18 @@ static const u16 spm_reg_offset_v3_0[SPM_REG_NR] = {
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[SPM_REG_SEQ_ENTRY] = 0x400,
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};
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/* SPM register data for 8909 */
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static const struct spm_reg_data spm_reg_8909_cpu = {
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.reg_offset = spm_reg_offset_v3_0,
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.spm_cfg = 0x1,
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.spm_dly = 0x3C102800,
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.seq = { 0x60, 0x03, 0x60, 0x0B, 0x0F, 0x20, 0x10, 0x80, 0x30, 0x90,
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0x5B, 0x60, 0x03, 0x60, 0x76, 0x76, 0x0B, 0x94, 0x5B, 0x80,
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0x10, 0x26, 0x30, 0x0F },
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.start_index[PM_SLEEP_MODE_STBY] = 0,
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.start_index[PM_SLEEP_MODE_SPC] = 5,
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};
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/* SPM register data for 8916 */
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static const struct spm_reg_data spm_reg_8916_cpu = {
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.reg_offset = spm_reg_offset_v3_0,
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@ -195,6 +207,8 @@ static const struct of_device_id spm_match_table[] = {
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.data = &spm_reg_660_silver_l2 },
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{ .compatible = "qcom,msm8226-saw2-v2.1-cpu",
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.data = &spm_reg_8226_cpu },
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{ .compatible = "qcom,msm8909-saw2-v3.0-cpu",
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.data = &spm_reg_8909_cpu },
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{ .compatible = "qcom,msm8916-saw2-v3.0-cpu",
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.data = &spm_reg_8916_cpu },
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{ .compatible = "qcom,msm8974-saw2-v2.1-cpu",
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@ -187,6 +187,13 @@
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#define MSM8916_VDDMX 3
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#define MSM8916_VDDMX_AO 4
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/* MSM8909 Power Domain Indexes */
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#define MSM8909_VDDCX MSM8916_VDDCX
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#define MSM8909_VDDCX_AO MSM8916_VDDCX_AO
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#define MSM8909_VDDCX_VFC MSM8916_VDDCX_VFC
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#define MSM8909_VDDMX MSM8916_VDDMX
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#define MSM8909_VDDMX_AO MSM8916_VDDMX_AO
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/* MSM8953 Power Domain Indexes */
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#define MSM8953_VDDMD 0
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#define MSM8953_VDDMD_AO 1
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