ASoC: cs4270: Remove redundant big endian formats
The CODEC already provides the endianness flag on its snd_soc_component_driver structure, specifying it is ambivalent to endian. The core will expand the formats to cover both endian types, as such remove the redundant specification of both endians. Signed-off-by: Charles Keepax <ckeepax@opensource.cirrus.com> Link: https://lore.kernel.org/r/20220504170905.332415-5-ckeepax@opensource.cirrus.com Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -32,18 +32,9 @@
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#include <linux/gpio/consumer.h>
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#include <linux/of_device.h>
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/*
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* The codec isn't really big-endian or little-endian, since the I2S
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* interface requires data to be sent serially with the MSbit first.
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* However, to support BE and LE I2S devices, we specify both here. That
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* way, ALSA will always match the bit patterns.
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*/
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#define CS4270_FORMATS (SNDRV_PCM_FMTBIT_S8 | \
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SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S16_BE | \
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SNDRV_PCM_FMTBIT_S18_3LE | SNDRV_PCM_FMTBIT_S18_3BE | \
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SNDRV_PCM_FMTBIT_S20_3LE | SNDRV_PCM_FMTBIT_S20_3BE | \
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SNDRV_PCM_FMTBIT_S24_3LE | SNDRV_PCM_FMTBIT_S24_3BE | \
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SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S24_BE)
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#define CS4270_FORMATS (SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_S16_LE | \
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SNDRV_PCM_FMTBIT_S18_3LE | SNDRV_PCM_FMTBIT_S20_3LE | \
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SNDRV_PCM_FMTBIT_S24_3LE | SNDRV_PCM_FMTBIT_S24_LE)
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/* CS4270 registers addresses */
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#define CS4270_CHIPID 0x01 /* Chip ID */
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