ARM: at91: Remove reset code from the machine code
Now that the transition is over and that we probe our reset driver in every case, we can remove the legacy code from the machine directory. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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@ -33,14 +33,6 @@ config OLD_IRQ_AT91
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select MULTI_IRQ_HANDLER
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select SPARSE_IRQ
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config AT91_SAM9_ALT_RESET
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bool
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default !ARCH_AT91X40
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config AT91_SAM9G45_RESET
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bool
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default !ARCH_AT91X40
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config AT91_SAM9_TIME
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bool
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@ -9,8 +9,6 @@ obj- :=
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obj-$(CONFIG_OLD_IRQ_AT91) += irq.o
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obj-$(CONFIG_OLD_CLK_AT91) += clock.o
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obj-$(CONFIG_AT91_SAM9_ALT_RESET) += at91sam9_alt_reset.o
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obj-$(CONFIG_AT91_SAM9G45_RESET) += at91sam9g45_reset.o
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obj-$(CONFIG_AT91_SAM9_TIME) += at91sam926x_time.o
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obj-$(CONFIG_SOC_AT91SAM9) += sam9_smc.o
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@ -355,7 +355,6 @@ static void __init at91sam9260_ioremap_registers(void)
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static void __init at91sam9260_initialize(void)
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{
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arm_pm_idle = at91sam9_idle;
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arm_pm_restart = at91sam9_alt_restart;
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at91_sysirq_mask_rtt(AT91SAM9260_BASE_RTT);
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@ -314,7 +314,6 @@ static void __init at91sam9261_ioremap_registers(void)
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static void __init at91sam9261_initialize(void)
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{
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arm_pm_idle = at91sam9_idle;
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arm_pm_restart = at91sam9_alt_restart;
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at91_sysirq_mask_rtt(AT91SAM9261_BASE_RTT);
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@ -336,7 +336,6 @@ static void __init at91sam9263_ioremap_registers(void)
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static void __init at91sam9263_initialize(void)
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{
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arm_pm_idle = at91sam9_idle;
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arm_pm_restart = at91sam9_alt_restart;
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at91_sysirq_mask_rtt(AT91SAM9263_BASE_RTT0);
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at91_sysirq_mask_rtt(AT91SAM9263_BASE_RTT1);
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@ -1,40 +0,0 @@
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/*
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* reset AT91SAM9G20 as per errata
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*
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* (C) BitBox Ltd 2010
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*
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* unless the SDRAM is cleanly shutdown before we hit the
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* reset register it can be left driving the data bus and
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* killing the chance of a subsequent boot from NAND
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#include <linux/linkage.h>
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#include <mach/hardware.h>
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#include <mach/at91_ramc.h>
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#include "at91_rstc.h"
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.arm
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.globl at91sam9_alt_restart
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at91sam9_alt_restart: ldr r0, =at91_ramc_base @ preload constants
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ldr r0, [r0]
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ldr r4, =at91_rstc_base
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ldr r1, [r4]
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mov r2, #1
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mov r3, #AT91_SDRAMC_LPCB_POWER_DOWN
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ldr r4, =AT91_RSTC_KEY | AT91_RSTC_PERRST | AT91_RSTC_PROCRST
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.balign 32 @ align to cache line
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str r2, [r0, #AT91_SDRAMC_TR] @ disable SDRAM access
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str r3, [r0, #AT91_SDRAMC_LPR] @ power down SDRAM
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str r4, [r1, #AT91_RSTC_CR] @ reset processor
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b .
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@ -385,7 +385,6 @@ static void __init at91sam9g45_ioremap_registers(void)
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static void __init at91sam9g45_initialize(void)
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{
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arm_pm_idle = at91sam9_idle;
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arm_pm_restart = at91sam9g45_restart;
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at91_sysirq_mask_rtc(AT91SAM9G45_BASE_RTC);
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at91_sysirq_mask_rtt(AT91SAM9G45_BASE_RTT);
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@ -1,45 +0,0 @@
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/*
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* reset AT91SAM9G45 as per errata
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*
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* Copyright (C) 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcosoft.com>
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*
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* unless the SDRAM is cleanly shutdown before we hit the
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* reset register it can be left driving the data bus and
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* killing the chance of a subsequent boot from NAND
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*
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* GPLv2 Only
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*/
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#include <linux/linkage.h>
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#include <mach/hardware.h>
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#include <mach/at91_ramc.h>
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#include "at91_rstc.h"
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.arm
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/*
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* at91_ramc_base is an array void*
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* init at NULL if only one DDR controler is present in or DT
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*/
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.globl at91sam9g45_restart
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at91sam9g45_restart:
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ldr r5, =at91_ramc_base @ preload constants
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ldr r0, [r5]
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ldr r5, [r5, #4] @ ddr1
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cmp r5, #0
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ldr r4, =at91_rstc_base
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ldr r1, [r4]
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mov r2, #1
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mov r3, #AT91_DDRSDRC_LPCB_POWER_DOWN
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ldr r4, =AT91_RSTC_KEY | AT91_RSTC_PERRST | AT91_RSTC_PROCRST
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.balign 32 @ align to cache line
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strne r2, [r5, #AT91_DDRSDRC_RTR] @ disable DDR1 access
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strne r3, [r5, #AT91_DDRSDRC_LPR] @ power down DDR1
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str r2, [r0, #AT91_DDRSDRC_RTR] @ disable DDR0 access
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str r3, [r0, #AT91_DDRSDRC_LPR] @ power down DDR0
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str r4, [r1, #AT91_RSTC_CR] @ reset processor
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b .
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@ -324,7 +324,6 @@ static void __init at91sam9rl_ioremap_registers(void)
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static void __init at91sam9rl_initialize(void)
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{
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arm_pm_idle = at91sam9_idle;
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arm_pm_restart = at91sam9_alt_restart;
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at91_sysirq_mask_rtc(AT91SAM9RL_BASE_RTC);
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at91_sysirq_mask_rtt(AT91SAM9RL_BASE_RTT);
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@ -66,8 +66,6 @@ extern void at91sam9_idle(void);
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/* reset */
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extern void at91_ioremap_rstc(u32 base_addr);
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extern void at91sam9_alt_restart(enum reboot_mode, const char *);
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extern void at91sam9g45_restart(enum reboot_mode, const char *);
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/* shutdown */
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extern void at91_ioremap_shdwc(u32 base_addr);
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