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drm/i915: Support more QGV points

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According to BSpec 53998, there is a mask of
max 8 SAGV/QGV points we need to support.

Bumping this up to keep the CI happy(currently
preventing tests to run), until all SAGV
changes land.

v2: Fix second plane where QGV points were
    hardcoded as well.

v3: Change the naming of I915_NUM_SAGV_POINTS
    to be I915_NUM_QGV_POINTS, as more meaningful
    (Ville Syrjälä)

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=112189
Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20191125160800.14740-1-stanislav.lisovskiy@intel.com
[vsyrjala: Add missing braces around else (checkpatch), fix Bugzilla tag]
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
This commit is contained in:
Stanislav Lisovskiy 2019-11-25 18:08:00 +02:00 committed by Ville Syrjälä
parent 58b4c1a07a
commit 9b93daa93e
2 changed files with 23 additions and 7 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

24
drivers/gpu/drm/i915/display/intel_bw.c
View File

@ -15,7 +15,7 @@ struct intel_qgv_point {
};
struct intel_qgv_info {
struct intel_qgv_point points[3];
struct intel_qgv_point points[I915_NUM_QGV_POINTS];
u8 num_points;
u8 num_channels;
u8 t_bl;
@ -276,17 +276,29 @@ void intel_bw_init_hw(struct drm_i915_private *dev_priv)
static unsigned int intel_max_data_rate(struct drm_i915_private *dev_priv,
int num_planes)
{
if (INTEL_GEN(dev_priv) >= 11)
if (INTEL_GEN(dev_priv) >= 11) {
/*
* Any bw group has same amount of QGV points
*/
const struct intel_bw_info *bi =
&dev_priv->max_bw[0];
unsigned int min_bw = UINT_MAX;
int i;
/*
* FIXME with SAGV disabled maybe we can assume
* point 1 will always be used? Seems to match
* the behaviour observed in the wild.
*/
return min3(icl_max_bw(dev_priv, num_planes, 0),
icl_max_bw(dev_priv, num_planes, 1),
icl_max_bw(dev_priv, num_planes, 2));
else
for (i = 0; i < bi->num_qgv_points; i++) {
unsigned int bw = icl_max_bw(dev_priv, num_planes, i);
min_bw = min(bw, min_bw);
}
return min_bw;
} else {
return UINT_MAX;
}
}
static unsigned int intel_bw_crtc_num_active_planes(const struct intel_crtc_state *crtc_state)

6
drivers/gpu/drm/i915/i915_drv.h
View File

@ -621,6 +621,9 @@ struct i915_gem_mm {
#define I915_ENGINE_WEDGED_TIMEOUT (60 * HZ) /* Reset but no recovery? */
/* Amount of SAGV/QGV points, BSpec precisely defines this */
#define I915_NUM_QGV_POINTS 8
struct ddi_vbt_port_info {
/* Non-NULL if port present. */
const struct child_device_config *child;
@ -1232,7 +1235,8 @@ struct drm_i915_private {
} dram_info;
struct intel_bw_info {
unsigned int deratedbw[3]; /* for each QGV point */
/* for each QGV point */
unsigned int deratedbw[I915_NUM_QGV_POINTS];
u8 num_qgv_points;
u8 num_planes;
} max_bw[6];