x86: fixup numa_node information for AMD CPU northbridge functions
Currently the numa_node attribute for these PCI devices is 0 (it corresponds to the numa_node for PCI bus 0). This is not a big issue but incorrect. This inconsistency can be fixed by reading the node number from CPU NB function 0. [ Impact: fill in dev->numa_node information, to optimize DMA allocations ] Signed-off-by: Andreas Herrmann <andreas.herrmann3@amd.com> Cc: jbarnes@virtuousgeek.org LKML-Reference: <20090417100746.GG16198@alberich.amd.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
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Ingo Molnar
parent
b206525ad1
commit
9b94b3a19b
@ -493,5 +493,42 @@ void force_hpet_resume(void)
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break;
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break;
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}
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}
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}
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}
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#endif
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#if defined(CONFIG_PCI) && defined(CONFIG_NUMA)
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/* Set correct numa_node information for AMD NB functions */
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static void __init quirk_amd_nb_node(struct pci_dev *dev)
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{
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struct pci_dev *nb_ht;
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unsigned int devfn;
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u32 val;
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devfn = PCI_DEVFN(PCI_SLOT(dev->devfn), 0);
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nb_ht = pci_get_slot(dev->bus, devfn);
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if (!nb_ht)
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return;
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pci_read_config_dword(nb_ht, 0x60, &val);
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set_dev_node(&dev->dev, val & 7);
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pci_dev_put(dev);
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}
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DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_K8_NB,
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quirk_amd_nb_node);
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DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_K8_NB_ADDRMAP,
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quirk_amd_nb_node);
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DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_K8_NB_MEMCTL,
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quirk_amd_nb_node);
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DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_K8_NB_MISC,
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quirk_amd_nb_node);
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DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_10H_NB_HT,
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quirk_amd_nb_node);
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DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_10H_NB_MAP,
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quirk_amd_nb_node);
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DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_10H_NB_DRAM,
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quirk_amd_nb_node);
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DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_10H_NB_MISC,
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quirk_amd_nb_node);
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DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_10H_NB_LINK,
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quirk_amd_nb_node);
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#endif
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#endif
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