can: tcan4x5x: fix bittiming const, use common bittiming from m_can driver
commit aee2b3ccc8a63d1cd7da6a8a153d1f3712d40826 upstream. According to the TCAN4550 datasheet "SLLSF91 - DECEMBER 2018" the tcan4x5x has the same bittiming constants as a m_can revision 3.2.x/3.3.0. The tcan4x5x chip I'm using identifies itself as m_can revision 3.2.1, so remove the tcan4x5x specific bittiming values and rely on the values in the m_can driver, which are selected according to core revision. Fixes: 5443c226ba91 ("can: tcan4x5x: Add tcan4x5x driver to the kernel") Cc: Dan Murphy <dmurphy@ti.com> Reviewed-by: Sean Nyekjaer <sean@geanix.com> Link: https://lore.kernel.org/r/20201215103238.524029-3-mkl@pengutronix.de Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -129,30 +129,6 @@ struct tcan4x5x_priv {
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int reg_offset;
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};
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static struct can_bittiming_const tcan4x5x_bittiming_const = {
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.name = DEVICE_NAME,
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.tseg1_min = 2,
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.tseg1_max = 31,
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.tseg2_min = 2,
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.tseg2_max = 16,
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.sjw_max = 16,
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.brp_min = 1,
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.brp_max = 32,
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.brp_inc = 1,
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};
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static struct can_bittiming_const tcan4x5x_data_bittiming_const = {
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.name = DEVICE_NAME,
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.tseg1_min = 1,
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.tseg1_max = 32,
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.tseg2_min = 1,
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.tseg2_max = 16,
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.sjw_max = 16,
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.brp_min = 1,
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.brp_max = 32,
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.brp_inc = 1,
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};
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static void tcan4x5x_check_wake(struct tcan4x5x_priv *priv)
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{
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int wake_state = 0;
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@ -479,8 +455,6 @@ static int tcan4x5x_can_probe(struct spi_device *spi)
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mcan_class->dev = &spi->dev;
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mcan_class->ops = &tcan4x5x_ops;
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mcan_class->is_peripheral = true;
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mcan_class->bit_timing = &tcan4x5x_bittiming_const;
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mcan_class->data_timing = &tcan4x5x_data_bittiming_const;
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mcan_class->net->irq = spi->irq;
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spi_set_drvdata(spi, priv);
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