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clk: qcom: gpucc-sc8280xp: Add runtime PM

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The GPU_CC block on SC8280XP is powered by the GFX rail. We need to
ensure that it's enabled to prevent unwanted power collapse.

Enable runtime PM to keep the power flowing only when necessary.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230619-topic-sc8280xp-clk-rpm-v1-1-1e5e1064cdb2@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
This commit is contained in:
Konrad Dybcio 2023-06-19 18:13:17 +02:00 committed by Bjorn Andersson
parent 4e13c7a55c
commit 9bbcb892a7
1 changed files with 17 additions and 2 deletions
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19
drivers/clk/qcom/gpucc-sc8280xp.c
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@ -7,6 +7,7 @@
#include <linux/kernel.h> #include <linux/kernel.h>
#include <linux/module.h> #include <linux/module.h>
#include <linux/platform_device.h> #include <linux/platform_device.h>
#include <linux/pm_runtime.h>
#include <linux/regmap.h> #include <linux/regmap.h>
#include <dt-bindings/clock/qcom,gpucc-sc8280xp.h> #include <dt-bindings/clock/qcom,gpucc-sc8280xp.h>
@ -424,10 +425,21 @@ static struct qcom_cc_desc gpu_cc_sc8280xp_desc = {
static int gpu_cc_sc8280xp_probe(struct platform_device *pdev) static int gpu_cc_sc8280xp_probe(struct platform_device *pdev)
{ {
struct regmap *regmap; struct regmap *regmap;
int ret;
ret = devm_pm_runtime_enable(&pdev->dev);
if (ret)
return ret;
ret = pm_runtime_resume_and_get(&pdev->dev);
if (ret)
return ret;
regmap = qcom_cc_map(pdev, &gpu_cc_sc8280xp_desc); regmap = qcom_cc_map(pdev, &gpu_cc_sc8280xp_desc);
if (IS_ERR(regmap)) if (IS_ERR(regmap)) {
pm_runtime_put(&pdev->dev);
return PTR_ERR(regmap); return PTR_ERR(regmap);
}
clk_lucid_pll_configure(&gpu_cc_pll0, regmap, &gpu_cc_pll0_config); clk_lucid_pll_configure(&gpu_cc_pll0, regmap, &gpu_cc_pll0_config);
clk_lucid_pll_configure(&gpu_cc_pll1, regmap, &gpu_cc_pll1_config); clk_lucid_pll_configure(&gpu_cc_pll1, regmap, &gpu_cc_pll1_config);
@ -439,7 +451,10 @@ static int gpu_cc_sc8280xp_probe(struct platform_device *pdev)
regmap_update_bits(regmap, 0x1170, BIT(0), BIT(0)); regmap_update_bits(regmap, 0x1170, BIT(0), BIT(0));
regmap_update_bits(regmap, 0x109c, BIT(0), BIT(0)); regmap_update_bits(regmap, 0x109c, BIT(0), BIT(0));
return qcom_cc_really_probe(pdev, &gpu_cc_sc8280xp_desc, regmap); ret = qcom_cc_really_probe(pdev, &gpu_cc_sc8280xp_desc, regmap);
pm_runtime_put(&pdev->dev);
return ret;
} }
static const struct of_device_id gpu_cc_sc8280xp_match_table[] = { static const struct of_device_id gpu_cc_sc8280xp_match_table[] = {