drm/exynos/hdmi: clock code re-factoring
With incoming support for newer SoCs different set of clocks will be required, depending on IP version. The patch prepares the driver for it. Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> Signed-off-by: Inki Dae <inki.dae@samsung.com>
This commit is contained in:
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12867e4e6b
commit
9be7e98984
@ -90,11 +90,24 @@ static const char * const supply[] = {
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"vdd_pll",
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"vdd_pll",
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};
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};
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struct string_array_spec {
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int count;
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const char * const *data;
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};
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#define INIT_ARRAY_SPEC(a) { .count = ARRAY_SIZE(a), .data = a }
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struct hdmi_driver_data {
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struct hdmi_driver_data {
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unsigned int type;
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unsigned int type;
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const struct hdmiphy_config *phy_confs;
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const struct hdmiphy_config *phy_confs;
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unsigned int phy_conf_count;
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unsigned int phy_conf_count;
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unsigned int is_apb_phy:1;
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unsigned int is_apb_phy:1;
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struct string_array_spec clk_gates;
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/*
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* Array of triplets (p_off, p_on, clock), where p_off and p_on are
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* required parents of clock when HDMI-PHY is respectively off or on.
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*/
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struct string_array_spec clk_muxes;
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};
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};
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struct hdmi_context {
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struct hdmi_context {
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@ -116,11 +129,8 @@ struct hdmi_context {
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struct gpio_desc *hpd_gpio;
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struct gpio_desc *hpd_gpio;
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int irq;
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int irq;
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struct regmap *pmureg;
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struct regmap *pmureg;
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struct clk *hdmi;
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struct clk **clk_gates;
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struct clk *sclk_hdmi;
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struct clk **clk_muxes;
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struct clk *sclk_pixel;
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struct clk *sclk_hdmiphy;
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struct clk *mout_hdmi;
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struct regulator_bulk_data regul_bulk[ARRAY_SIZE(supply)];
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struct regulator_bulk_data regul_bulk[ARRAY_SIZE(supply)];
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struct regulator *reg_hdmi_en;
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struct regulator *reg_hdmi_en;
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};
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};
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@ -501,11 +511,21 @@ static const struct hdmiphy_config hdmiphy_5420_configs[] = {
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},
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},
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};
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};
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static const char *hdmi_clk_gates4[] = {
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"hdmi", "sclk_hdmi"
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};
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static const char *hdmi_clk_muxes4[] = {
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"sclk_pixel", "sclk_hdmiphy", "mout_hdmi"
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};
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static struct hdmi_driver_data exynos5420_hdmi_driver_data = {
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static struct hdmi_driver_data exynos5420_hdmi_driver_data = {
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.type = HDMI_TYPE14,
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.type = HDMI_TYPE14,
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.phy_confs = hdmiphy_5420_configs,
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.phy_confs = hdmiphy_5420_configs,
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.phy_conf_count = ARRAY_SIZE(hdmiphy_5420_configs),
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.phy_conf_count = ARRAY_SIZE(hdmiphy_5420_configs),
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.is_apb_phy = 1,
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.is_apb_phy = 1,
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.clk_gates = INIT_ARRAY_SPEC(hdmi_clk_gates4),
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.clk_muxes = INIT_ARRAY_SPEC(hdmi_clk_muxes4),
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};
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};
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static struct hdmi_driver_data exynos4212_hdmi_driver_data = {
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static struct hdmi_driver_data exynos4212_hdmi_driver_data = {
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@ -513,6 +533,8 @@ static struct hdmi_driver_data exynos4212_hdmi_driver_data = {
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.phy_confs = hdmiphy_v14_configs,
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.phy_confs = hdmiphy_v14_configs,
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.phy_conf_count = ARRAY_SIZE(hdmiphy_v14_configs),
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.phy_conf_count = ARRAY_SIZE(hdmiphy_v14_configs),
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.is_apb_phy = 0,
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.is_apb_phy = 0,
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.clk_gates = INIT_ARRAY_SPEC(hdmi_clk_gates4),
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.clk_muxes = INIT_ARRAY_SPEC(hdmi_clk_muxes4),
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};
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};
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static struct hdmi_driver_data exynos4210_hdmi_driver_data = {
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static struct hdmi_driver_data exynos4210_hdmi_driver_data = {
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@ -520,6 +542,8 @@ static struct hdmi_driver_data exynos4210_hdmi_driver_data = {
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.phy_confs = hdmiphy_v13_configs,
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.phy_confs = hdmiphy_v13_configs,
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.phy_conf_count = ARRAY_SIZE(hdmiphy_v13_configs),
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.phy_conf_count = ARRAY_SIZE(hdmiphy_v13_configs),
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.is_apb_phy = 0,
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.is_apb_phy = 0,
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.clk_gates = INIT_ARRAY_SPEC(hdmi_clk_gates4),
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.clk_muxes = INIT_ARRAY_SPEC(hdmi_clk_muxes4),
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};
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};
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static inline u32 hdmi_map_reg(struct hdmi_context *hdata, u32 reg_id)
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static inline u32 hdmi_map_reg(struct hdmi_context *hdata, u32 reg_id)
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@ -847,6 +871,54 @@ static void hdmi_regs_dump(struct hdmi_context *hdata, char *prefix)
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hdmi_v14_regs_dump(hdata, prefix);
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hdmi_v14_regs_dump(hdata, prefix);
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}
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}
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static int hdmi_clk_enable_gates(struct hdmi_context *hdata)
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{
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int i, ret;
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for (i = 0; i < hdata->drv_data->clk_gates.count; ++i) {
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ret = clk_prepare_enable(hdata->clk_gates[i]);
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if (!ret)
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continue;
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dev_err(hdata->dev, "Cannot enable clock '%s', %d\n",
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hdata->drv_data->clk_gates.data[i], ret);
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while (i--)
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clk_disable_unprepare(hdata->clk_gates[i]);
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return ret;
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}
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return 0;
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}
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static void hdmi_clk_disable_gates(struct hdmi_context *hdata)
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{
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int i = hdata->drv_data->clk_gates.count;
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while (i--)
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clk_disable_unprepare(hdata->clk_gates[i]);
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}
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static int hdmi_clk_set_parents(struct hdmi_context *hdata, bool to_phy)
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{
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struct device *dev = hdata->dev;
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int ret = 0;
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int i;
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for (i = 0; i < hdata->drv_data->clk_muxes.count; i += 3) {
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struct clk **c = &hdata->clk_muxes[i];
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ret = clk_set_parent(c[2], c[to_phy]);
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if (!ret)
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continue;
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dev_err(dev, "Cannot set clock parent of '%s' to '%s', %d\n",
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hdata->drv_data->clk_muxes.data[i + 2],
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hdata->drv_data->clk_muxes.data[i + to_phy], ret);
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}
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return ret;
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}
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static u8 hdmi_chksum(struct hdmi_context *hdata,
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static u8 hdmi_chksum(struct hdmi_context *hdata,
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u32 start, u8 len, u32 hdr_sum)
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u32 start, u8 len, u32 hdr_sum)
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{
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{
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@ -1507,7 +1579,7 @@ static void hdmi_mode_apply(struct hdmi_context *hdata)
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hdmiphy_wait_for_pll(hdata);
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hdmiphy_wait_for_pll(hdata);
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clk_set_parent(hdata->mout_hdmi, hdata->sclk_hdmiphy);
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hdmi_clk_set_parents(hdata, true);
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/* enable HDMI and timing generator */
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/* enable HDMI and timing generator */
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hdmi_start(hdata, true);
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hdmi_start(hdata, true);
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@ -1515,7 +1587,7 @@ static void hdmi_mode_apply(struct hdmi_context *hdata)
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static void hdmiphy_conf_reset(struct hdmi_context *hdata)
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static void hdmiphy_conf_reset(struct hdmi_context *hdata)
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{
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{
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clk_set_parent(hdata->mout_hdmi, hdata->sclk_pixel);
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hdmi_clk_set_parents(hdata, false);
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/* reset hdmiphy */
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/* reset hdmiphy */
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hdmi_reg_writemask(hdata, HDMI_PHY_RSTOUT, ~0, HDMI_PHY_SW_RSTOUT);
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hdmi_reg_writemask(hdata, HDMI_PHY_RSTOUT, ~0, HDMI_PHY_SW_RSTOUT);
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@ -1670,6 +1742,57 @@ static irqreturn_t hdmi_irq_thread(int irq, void *arg)
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return IRQ_HANDLED;
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return IRQ_HANDLED;
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}
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}
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static int hdmi_clks_get(struct hdmi_context *hdata,
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const struct string_array_spec *names,
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struct clk **clks)
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{
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struct device *dev = hdata->dev;
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int i;
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for (i = 0; i < names->count; ++i) {
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struct clk *clk = devm_clk_get(dev, names->data[i]);
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if (IS_ERR(clk)) {
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int ret = PTR_ERR(clk);
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dev_err(dev, "Cannot get clock %s, %d\n",
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names->data[i], ret);
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return ret;
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}
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clks[i] = clk;
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}
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return 0;
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}
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static int hdmi_clk_init(struct hdmi_context *hdata)
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{
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const struct hdmi_driver_data *drv_data = hdata->drv_data;
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int count = drv_data->clk_gates.count + drv_data->clk_muxes.count;
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struct device *dev = hdata->dev;
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struct clk **clks;
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int ret;
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if (!count)
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return 0;
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clks = devm_kzalloc(dev, sizeof(*clks) * count, GFP_KERNEL);
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if (!clks)
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return -ENOMEM;
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hdata->clk_gates = clks;
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hdata->clk_muxes = clks + drv_data->clk_gates.count;
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ret = hdmi_clks_get(hdata, &drv_data->clk_gates, hdata->clk_gates);
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if (ret)
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return ret;
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return hdmi_clks_get(hdata, &drv_data->clk_muxes, hdata->clk_muxes);
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}
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static int hdmi_resources_init(struct hdmi_context *hdata)
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static int hdmi_resources_init(struct hdmi_context *hdata)
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{
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{
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struct device *dev = hdata->dev;
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struct device *dev = hdata->dev;
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@ -1688,39 +1811,14 @@ static int hdmi_resources_init(struct hdmi_context *hdata)
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DRM_ERROR("failed to get GPIO irq\n");
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DRM_ERROR("failed to get GPIO irq\n");
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return hdata->irq;
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return hdata->irq;
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}
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}
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/* get clocks, power */
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hdata->hdmi = devm_clk_get(dev, "hdmi");
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if (IS_ERR(hdata->hdmi)) {
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DRM_ERROR("failed to get clock 'hdmi'\n");
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ret = PTR_ERR(hdata->hdmi);
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goto fail;
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}
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hdata->sclk_hdmi = devm_clk_get(dev, "sclk_hdmi");
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if (IS_ERR(hdata->sclk_hdmi)) {
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DRM_ERROR("failed to get clock 'sclk_hdmi'\n");
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ret = PTR_ERR(hdata->sclk_hdmi);
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goto fail;
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}
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hdata->sclk_pixel = devm_clk_get(dev, "sclk_pixel");
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if (IS_ERR(hdata->sclk_pixel)) {
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DRM_ERROR("failed to get clock 'sclk_pixel'\n");
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ret = PTR_ERR(hdata->sclk_pixel);
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goto fail;
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}
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hdata->sclk_hdmiphy = devm_clk_get(dev, "sclk_hdmiphy");
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if (IS_ERR(hdata->sclk_hdmiphy)) {
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DRM_ERROR("failed to get clock 'sclk_hdmiphy'\n");
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ret = PTR_ERR(hdata->sclk_hdmiphy);
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goto fail;
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}
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hdata->mout_hdmi = devm_clk_get(dev, "mout_hdmi");
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if (IS_ERR(hdata->mout_hdmi)) {
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DRM_ERROR("failed to get clock 'mout_hdmi'\n");
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ret = PTR_ERR(hdata->mout_hdmi);
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goto fail;
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}
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clk_set_parent(hdata->mout_hdmi, hdata->sclk_pixel);
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ret = hdmi_clk_init(hdata);
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if (ret)
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return ret;
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ret = hdmi_clk_set_parents(hdata, false);
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if (ret)
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return ret;
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for (i = 0; i < ARRAY_SIZE(supply); ++i) {
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for (i = 0; i < ARRAY_SIZE(supply); ++i) {
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hdata->regul_bulk[i].supply = supply[i];
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hdata->regul_bulk[i].supply = supply[i];
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@ -1745,9 +1843,6 @@ static int hdmi_resources_init(struct hdmi_context *hdata)
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DRM_ERROR("failed to enable hdmi-en regulator\n");
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DRM_ERROR("failed to enable hdmi-en regulator\n");
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return ret;
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return ret;
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fail:
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DRM_ERROR("HDMI resource init - failed\n");
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return ret;
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}
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}
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static struct of_device_id hdmi_match_types[] = {
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static struct of_device_id hdmi_match_types[] = {
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@ -1975,8 +2070,7 @@ static int exynos_hdmi_suspend(struct device *dev)
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{
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{
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struct hdmi_context *hdata = dev_get_drvdata(dev);
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struct hdmi_context *hdata = dev_get_drvdata(dev);
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clk_disable_unprepare(hdata->sclk_hdmi);
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hdmi_clk_disable_gates(hdata);
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clk_disable_unprepare(hdata->hdmi);
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return 0;
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return 0;
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}
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}
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@ -1986,17 +2080,9 @@ static int exynos_hdmi_resume(struct device *dev)
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struct hdmi_context *hdata = dev_get_drvdata(dev);
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struct hdmi_context *hdata = dev_get_drvdata(dev);
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int ret;
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int ret;
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ret = clk_prepare_enable(hdata->hdmi);
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ret = hdmi_clk_enable_gates(hdata);
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if (ret < 0) {
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if (ret < 0)
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DRM_ERROR("Failed to prepare_enable the hdmi clk [%d]\n", ret);
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return ret;
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return ret;
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}
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ret = clk_prepare_enable(hdata->sclk_hdmi);
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if (ret < 0) {
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DRM_ERROR("Failed to prepare_enable the sclk_mixer clk [%d]\n",
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ret);
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return ret;
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}
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return 0;
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return 0;
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}
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}
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