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drm/i915: Extract intel_crtc_compute_pipe_src()

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intel_crtc_compute_config() doesn't really tell a unified story.
Let's chunk it up into pieces. We'll start with
intel_crtc_compute_pipe_src().

Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220223131315.18016-8-ville.syrjala@linux.intel.com
This commit is contained in:
Ville Syrjälä 2022-02-23 15:13:09 +02:00
parent 0338ba6923
commit 9c1197a0f8
1 changed files with 39 additions and 23 deletions
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62
drivers/gpu/drm/i915/display/intel_display.c
View File

@ -2802,18 +2802,55 @@ static void intel_encoder_get_config(struct intel_encoder *encoder,
intel_crtc_readout_derived_state(crtc_state);
}
static int intel_crtc_compute_pipe_src(struct intel_crtc_state *crtc_state)
{
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
struct drm_i915_private *i915 = to_i915(crtc->base.dev);
if (crtc_state->bigjoiner)
crtc_state->pipe_src_w /= 2;
/*
* Pipe horizontal size must be even in:
* - DVO ganged mode
* - LVDS dual channel mode
* - Double wide pipe
*/
if (crtc_state->pipe_src_w & 1) {
if (crtc_state->double_wide) {
drm_dbg_kms(&i915->drm,
"[CRTC:%d:%s] Odd pipe source width not supported with double wide pipe\n",
crtc->base.base.id, crtc->base.name);
return -EINVAL;
}
if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_LVDS) &&
intel_is_dual_link_lvds(i915)) {
drm_dbg_kms(&i915->drm,
"[CRTC:%d:%s] Odd pipe source width not supported with dual link LVDS\n",
crtc->base.base.id, crtc->base.name);
return -EINVAL;
}
}
return 0;
}
static int intel_crtc_compute_config(struct intel_crtc *crtc,
struct intel_crtc_state *crtc_state)
{
struct drm_i915_private *i915 = to_i915(crtc->base.dev);
struct drm_display_mode *pipe_mode = &crtc_state->hw.pipe_mode;
int clock_limit = i915->max_dotclk_freq;
int ret;
ret = intel_crtc_compute_pipe_src(crtc_state);
if (ret)
return ret;
drm_mode_copy(pipe_mode, &crtc_state->hw.adjusted_mode);
intel_bigjoiner_adjust_timings(crtc_state, pipe_mode);
if (crtc_state->bigjoiner)
crtc_state->pipe_src_w /= 2;
intel_splitter_adjust_timings(crtc_state, pipe_mode);
@ -2841,27 +2878,6 @@ static int intel_crtc_compute_config(struct intel_crtc *crtc,
return -EINVAL;
}
/*
* Pipe horizontal size must be even in:
* - DVO ganged mode
* - LVDS dual channel mode
* - Double wide pipe
*/
if (crtc_state->pipe_src_w & 1) {
if (crtc_state->double_wide) {
drm_dbg_kms(&i915->drm,
"Odd pipe source width not supported with double wide pipe\n");
return -EINVAL;
}
if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_LVDS) &&
intel_is_dual_link_lvds(i915)) {
drm_dbg_kms(&i915->drm,
"Odd pipe source width not supported with dual link LVDS\n");
return -EINVAL;
}
}
intel_crtc_compute_pixel_rate(crtc_state);
if (crtc_state->has_pch_encoder)