gpio: Add GPIO support for the WinSystems WS16C48
The WinSystems WS16C48 device provides 48 lines of digital I/O. In addition, the first 24 lines may be used for interrupt-handled edge detection; rising edge detection and falling edge detection are supported. This driver provides GPIO and IRQ support for these 48 channels of digital I/O. The base port address for the device may be configured via the ws16c48_base module parameter. The interrupt line number for the device may be configured via the ws16c48_irq module parameter. Signed-off-by: William Breathitt Gray <vilhelm.gray@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This commit is contained in:
William Breathitt Gray
Linus Walleij
parent
4332e0144f
commit
9c26df9b27
@ -11871,6 +11871,12 @@ M: David Härdeman <david@hardeman.nu>
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S: Maintained
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F: drivers/media/rc/winbond-cir.c
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WINSYSTEMS WS16C48 GPIO DRIVER
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M: William Breathitt Gray <vilhelm.gray@gmail.com>
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L: linux-gpio@vger.kernel.org
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S: Maintained
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F: drivers/gpio/gpio-ws16c48.c
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WIMAX STACK
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M: Inaky Perez-Gonzalez <inaky.perez-gonzalez@intel.com>
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M: linux-wimax@intel.com
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@ -570,6 +570,15 @@ config GPIO_TS5500
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blocks of the TS-5500: DIO1, DIO2 and the LCD port, and the TS-5600
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LCD port.
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config GPIO_WS16C48
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tristate "WinSystems WS16C48 GPIO support"
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select GPIOLIB_IRQCHIP
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help
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Enables GPIO support for the WinSystems WS16C48. The base port address
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for the device may be configured via the ws16c48_base module
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parameter. The interrupt line number for the device may be configured
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via the ws16c48_irq module parameter.
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endmenu
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menu "I2C GPIO expanders"
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@ -111,6 +111,7 @@ obj-$(CONFIG_GPIO_VX855) += gpio-vx855.o
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obj-$(CONFIG_GPIO_WM831X) += gpio-wm831x.o
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obj-$(CONFIG_GPIO_WM8350) += gpio-wm8350.o
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obj-$(CONFIG_GPIO_WM8994) += gpio-wm8994.o
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obj-$(CONFIG_GPIO_WS16C48) += gpio-ws16c48.o
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obj-$(CONFIG_GPIO_XGENE) += gpio-xgene.o
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obj-$(CONFIG_GPIO_XGENE_SB) += gpio-xgene-sb.o
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obj-$(CONFIG_GPIO_XILINX) += gpio-xilinx.o
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436
drivers/gpio/gpio-ws16c48.c
Normal file
436
drivers/gpio/gpio-ws16c48.c
Normal file
@ -0,0 +1,436 @@
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/*
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* GPIO driver for the WinSystems WS16C48
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* Copyright (C) 2016 William Breathitt Gray
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License, version 2, as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*/
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#include <linux/bitops.h>
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#include <linux/device.h>
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#include <linux/errno.h>
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#include <linux/gpio/driver.h>
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#include <linux/io.h>
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#include <linux/ioport.h>
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#include <linux/interrupt.h>
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#include <linux/irqdesc.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/moduleparam.h>
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#include <linux/platform_device.h>
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#include <linux/spinlock.h>
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static unsigned ws16c48_base;
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module_param(ws16c48_base, uint, 0);
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MODULE_PARM_DESC(ws16c48_base, "WinSystems WS16C48 base address");
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static unsigned ws16c48_irq;
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module_param(ws16c48_irq, uint, 0);
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MODULE_PARM_DESC(ws16c48_irq, "WinSystems WS16C48 interrupt line number");
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/**
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* struct ws16c48_gpio - GPIO device private data structure
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* @chip: instance of the gpio_chip
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* @io_state: bit I/O state (whether bit is set to input or output)
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* @out_state: output bits state
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* @lock: synchronization lock to prevent I/O race conditions
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* @irq_mask: I/O bits affected by interrupts
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* @flow_mask: IRQ flow type mask for the respective I/O bits
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* @base: base port address of the GPIO device
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* @extent: extent of port address region of the GPIO device
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* @irq: Interrupt line number
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*/
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struct ws16c48_gpio {
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struct gpio_chip chip;
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unsigned char io_state[6];
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unsigned char out_state[6];
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spinlock_t lock;
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unsigned long irq_mask;
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unsigned long flow_mask;
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unsigned base;
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unsigned extent;
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unsigned irq;
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};
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static int ws16c48_gpio_get_direction(struct gpio_chip *chip, unsigned offset)
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{
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struct ws16c48_gpio *const ws16c48gpio = gpiochip_get_data(chip);
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const unsigned port = offset / 8;
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const unsigned mask = BIT(offset % 8);
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return !!(ws16c48gpio->io_state[port] & mask);
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}
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static int ws16c48_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
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{
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struct ws16c48_gpio *const ws16c48gpio = gpiochip_get_data(chip);
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const unsigned port = offset / 8;
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const unsigned mask = BIT(offset % 8);
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unsigned long flags;
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spin_lock_irqsave(&ws16c48gpio->lock, flags);
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ws16c48gpio->io_state[port] |= mask;
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ws16c48gpio->out_state[port] &= ~mask;
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outb(ws16c48gpio->out_state[port], ws16c48gpio->base + port);
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spin_unlock_irqrestore(&ws16c48gpio->lock, flags);
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return 0;
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}
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static int ws16c48_gpio_direction_output(struct gpio_chip *chip,
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unsigned offset, int value)
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{
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struct ws16c48_gpio *const ws16c48gpio = gpiochip_get_data(chip);
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const unsigned port = offset / 8;
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const unsigned mask = BIT(offset % 8);
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unsigned long flags;
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spin_lock_irqsave(&ws16c48gpio->lock, flags);
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ws16c48gpio->io_state[port] &= ~mask;
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if (value)
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ws16c48gpio->out_state[port] |= mask;
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else
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ws16c48gpio->out_state[port] &= ~mask;
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outb(ws16c48gpio->out_state[port], ws16c48gpio->base + port);
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spin_unlock_irqrestore(&ws16c48gpio->lock, flags);
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return 0;
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}
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static int ws16c48_gpio_get(struct gpio_chip *chip, unsigned offset)
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{
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struct ws16c48_gpio *const ws16c48gpio = gpiochip_get_data(chip);
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const unsigned port = offset / 8;
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const unsigned mask = BIT(offset % 8);
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unsigned long flags;
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unsigned port_state;
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spin_lock_irqsave(&ws16c48gpio->lock, flags);
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/* ensure that GPIO is set for input */
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if (!(ws16c48gpio->io_state[port] & mask)) {
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spin_unlock_irqrestore(&ws16c48gpio->lock, flags);
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return -EINVAL;
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}
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port_state = inb(ws16c48gpio->base + port);
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spin_unlock_irqrestore(&ws16c48gpio->lock, flags);
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return !!(port_state & mask);
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}
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static void ws16c48_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
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{
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struct ws16c48_gpio *const ws16c48gpio = gpiochip_get_data(chip);
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const unsigned port = offset / 8;
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const unsigned mask = BIT(offset % 8);
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unsigned long flags;
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spin_lock_irqsave(&ws16c48gpio->lock, flags);
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/* ensure that GPIO is set for output */
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if (ws16c48gpio->io_state[port] & mask) {
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spin_unlock_irqrestore(&ws16c48gpio->lock, flags);
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return;
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}
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if (value)
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ws16c48gpio->out_state[port] |= mask;
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else
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ws16c48gpio->out_state[port] &= ~mask;
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outb(ws16c48gpio->out_state[port], ws16c48gpio->base + port);
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spin_unlock_irqrestore(&ws16c48gpio->lock, flags);
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}
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static void ws16c48_irq_ack(struct irq_data *data)
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{
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struct gpio_chip *chip = irq_data_get_irq_chip_data(data);
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struct ws16c48_gpio *const ws16c48gpio = gpiochip_get_data(chip);
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const unsigned long offset = irqd_to_hwirq(data);
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const unsigned port = offset / 8;
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const unsigned mask = BIT(offset % 8);
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unsigned long flags;
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unsigned port_state;
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/* only the first 3 ports support interrupts */
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if (port > 2)
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return;
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spin_lock_irqsave(&ws16c48gpio->lock, flags);
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port_state = ws16c48gpio->irq_mask >> (8*port);
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outb(0x80, ws16c48gpio->base + 7);
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outb(port_state & ~mask, ws16c48gpio->base + 8 + port);
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outb(port_state | mask, ws16c48gpio->base + 8 + port);
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outb(0xC0, ws16c48gpio->base + 7);
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spin_unlock_irqrestore(&ws16c48gpio->lock, flags);
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}
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static void ws16c48_irq_mask(struct irq_data *data)
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{
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struct gpio_chip *chip = irq_data_get_irq_chip_data(data);
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struct ws16c48_gpio *const ws16c48gpio = gpiochip_get_data(chip);
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const unsigned long offset = irqd_to_hwirq(data);
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const unsigned long mask = BIT(offset);
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const unsigned port = offset / 8;
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unsigned long flags;
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/* only the first 3 ports support interrupts */
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if (port > 2)
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return;
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spin_lock_irqsave(&ws16c48gpio->lock, flags);
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ws16c48gpio->irq_mask &= ~mask;
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outb(0x80, ws16c48gpio->base + 7);
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outb(ws16c48gpio->irq_mask >> (8*port), ws16c48gpio->base + 8 + port);
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outb(0xC0, ws16c48gpio->base + 7);
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spin_unlock_irqrestore(&ws16c48gpio->lock, flags);
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}
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static void ws16c48_irq_unmask(struct irq_data *data)
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{
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struct gpio_chip *chip = irq_data_get_irq_chip_data(data);
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struct ws16c48_gpio *const ws16c48gpio = gpiochip_get_data(chip);
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const unsigned long offset = irqd_to_hwirq(data);
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const unsigned long mask = BIT(offset);
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const unsigned port = offset / 8;
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unsigned long flags;
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/* only the first 3 ports support interrupts */
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if (port > 2)
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return;
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spin_lock_irqsave(&ws16c48gpio->lock, flags);
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ws16c48gpio->irq_mask |= mask;
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outb(0x80, ws16c48gpio->base + 7);
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outb(ws16c48gpio->irq_mask >> (8*port), ws16c48gpio->base + 8 + port);
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outb(0xC0, ws16c48gpio->base + 7);
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spin_unlock_irqrestore(&ws16c48gpio->lock, flags);
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}
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static int ws16c48_irq_set_type(struct irq_data *data, unsigned flow_type)
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{
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struct gpio_chip *chip = irq_data_get_irq_chip_data(data);
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struct ws16c48_gpio *const ws16c48gpio = gpiochip_get_data(chip);
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const unsigned long offset = irqd_to_hwirq(data);
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const unsigned long mask = BIT(offset);
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const unsigned port = offset / 8;
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unsigned long flags;
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/* only the first 3 ports support interrupts */
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if (port > 2)
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return -EINVAL;
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spin_lock_irqsave(&ws16c48gpio->lock, flags);
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switch (flow_type) {
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case IRQ_TYPE_NONE:
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break;
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case IRQ_TYPE_EDGE_RISING:
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ws16c48gpio->flow_mask |= mask;
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break;
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case IRQ_TYPE_EDGE_FALLING:
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ws16c48gpio->flow_mask &= ~mask;
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break;
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default:
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spin_unlock_irqrestore(&ws16c48gpio->lock, flags);
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return -EINVAL;
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}
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outb(0x40, ws16c48gpio->base + 7);
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outb(ws16c48gpio->flow_mask >> (8*port), ws16c48gpio->base + 8 + port);
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outb(0xC0, ws16c48gpio->base + 7);
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spin_unlock_irqrestore(&ws16c48gpio->lock, flags);
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return 0;
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}
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static struct irq_chip ws16c48_irqchip = {
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.name = "ws16c48",
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.irq_ack = ws16c48_irq_ack,
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.irq_mask = ws16c48_irq_mask,
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.irq_unmask = ws16c48_irq_unmask,
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.irq_set_type = ws16c48_irq_set_type
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};
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static irqreturn_t ws16c48_irq_handler(int irq, void *dev_id)
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{
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struct ws16c48_gpio *const ws16c48gpio = dev_id;
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struct gpio_chip *const chip = &ws16c48gpio->chip;
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unsigned long int_pending;
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unsigned long port;
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unsigned long int_id;
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unsigned long gpio;
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int_pending = inb(ws16c48gpio->base + 6) & 0x7;
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if (!int_pending)
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return IRQ_NONE;
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/* loop until all pending interrupts are handled */
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do {
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for_each_set_bit(port, &int_pending, 3) {
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int_id = inb(ws16c48gpio->base + 8 + port);
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for_each_set_bit(gpio, &int_id, 8)
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generic_handle_irq(irq_find_mapping(
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chip->irqdomain, gpio + 8*port));
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}
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int_pending = inb(ws16c48gpio->base + 6) & 0x7;
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} while (int_pending);
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return IRQ_HANDLED;
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}
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static int __init ws16c48_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct ws16c48_gpio *ws16c48gpio;
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const unsigned base = ws16c48_base;
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const unsigned extent = 16;
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const char *const name = dev_name(dev);
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int err;
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const unsigned irq = ws16c48_irq;
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ws16c48gpio = devm_kzalloc(dev, sizeof(*ws16c48gpio), GFP_KERNEL);
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if (!ws16c48gpio)
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return -ENOMEM;
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if (!request_region(base, extent, name)) {
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dev_err(dev, "Unable to lock %s port addresses (0x%X-0x%X)\n",
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name, base, base + extent);
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err = -EBUSY;
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goto err_lock_io_port;
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}
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ws16c48gpio->chip.label = name;
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ws16c48gpio->chip.parent = dev;
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ws16c48gpio->chip.owner = THIS_MODULE;
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ws16c48gpio->chip.base = -1;
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ws16c48gpio->chip.ngpio = 48;
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ws16c48gpio->chip.get_direction = ws16c48_gpio_get_direction;
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ws16c48gpio->chip.direction_input = ws16c48_gpio_direction_input;
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ws16c48gpio->chip.direction_output = ws16c48_gpio_direction_output;
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ws16c48gpio->chip.get = ws16c48_gpio_get;
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ws16c48gpio->chip.set = ws16c48_gpio_set;
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ws16c48gpio->base = base;
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ws16c48gpio->extent = extent;
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ws16c48gpio->irq = irq;
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spin_lock_init(&ws16c48gpio->lock);
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dev_set_drvdata(dev, ws16c48gpio);
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err = gpiochip_add_data(&ws16c48gpio->chip, ws16c48gpio);
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if (err) {
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dev_err(dev, "GPIO registering failed (%d)\n", err);
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goto err_gpio_register;
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}
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/* Disable IRQ by default */
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outb(0x80, base + 7);
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outb(0, base + 8);
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outb(0, base + 9);
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outb(0, base + 10);
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outb(0xC0, base + 7);
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err = gpiochip_irqchip_add(&ws16c48gpio->chip, &ws16c48_irqchip, 0,
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handle_edge_irq, IRQ_TYPE_NONE);
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if (err) {
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dev_err(dev, "Could not add irqchip (%d)\n", err);
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goto err_gpiochip_irqchip_add;
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}
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err = request_irq(irq, ws16c48_irq_handler, IRQF_SHARED, name,
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ws16c48gpio);
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if (err) {
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dev_err(dev, "IRQ handler registering failed (%d)\n", err);
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goto err_request_irq;
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}
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return 0;
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err_request_irq:
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err_gpiochip_irqchip_add:
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gpiochip_remove(&ws16c48gpio->chip);
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err_gpio_register:
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release_region(base, extent);
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err_lock_io_port:
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return err;
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}
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static int ws16c48_remove(struct platform_device *pdev)
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{
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struct ws16c48_gpio *const ws16c48gpio = platform_get_drvdata(pdev);
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free_irq(ws16c48gpio->irq, ws16c48gpio);
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gpiochip_remove(&ws16c48gpio->chip);
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release_region(ws16c48gpio->base, ws16c48gpio->extent);
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return 0;
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}
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static struct platform_device *ws16c48_device;
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static struct platform_driver ws16c48_driver = {
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.driver = {
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.name = "ws16c48"
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},
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.remove = ws16c48_remove
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};
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|
||||
static void __exit ws16c48_exit(void)
|
||||
{
|
||||
platform_device_unregister(ws16c48_device);
|
||||
platform_driver_unregister(&ws16c48_driver);
|
||||
}
|
||||
|
||||
static int __init ws16c48_init(void)
|
||||
{
|
||||
int err;
|
||||
|
||||
ws16c48_device = platform_device_alloc(ws16c48_driver.driver.name, -1);
|
||||
if (!ws16c48_device)
|
||||
return -ENOMEM;
|
||||
|
||||
err = platform_device_add(ws16c48_device);
|
||||
if (err)
|
||||
goto err_platform_device;
|
||||
|
||||
err = platform_driver_probe(&ws16c48_driver, ws16c48_probe);
|
||||
if (err)
|
||||
goto err_platform_driver;
|
||||
|
||||
return 0;
|
||||
|
||||
err_platform_driver:
|
||||
platform_device_del(ws16c48_device);
|
||||
err_platform_device:
|
||||
platform_device_put(ws16c48_device);
|
||||
return err;
|
||||
}
|
||||
|
||||
module_init(ws16c48_init);
|
||||
module_exit(ws16c48_exit);
|
||||
|
||||
MODULE_AUTHOR("William Breathitt Gray <vilhelm.gray@gmail.com>");
|
||||
MODULE_DESCRIPTION("WinSystems WS16C48 GPIO driver");
|
||||
MODULE_LICENSE("GPL");
|
||||
Loading…
Reference in New Issue
Block a user