MIPS: Reimplement get_cycles().
This essentially reverts commit efb9ca08b5a2374b29938cdcab417ce4feb14b54 (kernel.org) / 58020a106879a8b372068741c81f0015c9b0b96dbv [[MIPS] Change get_cycles to always return 0.] Most users of get_cycles() invoke it as a timing interface. That's why in modern kernels it was never very much missed for. /dev/random however uses get_cycles() in the how the jitter in the interrupt timing contains some useful entropy. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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@ -10,7 +10,9 @@
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#ifdef __KERNEL__
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#include <asm/cpu-features.h>
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#include <asm/mipsregs.h>
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#include <asm/cpu-type.h>
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/*
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* This is the clock rate of the i8253 PIT. A MIPS system may not have
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@ -33,9 +35,38 @@
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typedef unsigned int cycles_t;
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/*
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* On R4000/R4400 before version 5.0 an erratum exists such that if the
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* cycle counter is read in the exact moment that it is matching the
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* compare register, no interrupt will be generated.
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*
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* There is a suggested workaround and also the erratum can't strike if
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* the compare interrupt isn't being used as the clock source device.
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* However for now the implementaton of this function doesn't get these
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* fine details right.
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*/
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static inline cycles_t get_cycles(void)
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{
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return 0;
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switch (boot_cpu_type()) {
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case CPU_R4400PC:
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case CPU_R4400SC:
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case CPU_R4400MC:
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if ((read_c0_prid() & 0xff) >= 0x0050)
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return read_c0_count();
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break;
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case CPU_R4000PC:
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case CPU_R4000SC:
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case CPU_R4000MC:
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break;
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default:
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if (cpu_has_counter)
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return read_c0_count();
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break;
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}
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return 0; /* no usable counter */
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}
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#endif /* __KERNEL__ */
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