drm/msm: Set adreno_smmu as gpu's drvdata
This will be populated by adreno-smmu, to provide a way for coordinating enabling/disabling TTBR0 translation. Signed-off-by: Rob Clark <robdclark@chromium.org> Reviewed-by: Jordan Crouse <jcrouse@codeaurora.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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@ -417,8 +417,6 @@ static int adreno_bind(struct device *dev, struct device *master, void *data)
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return PTR_ERR(gpu);
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}
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dev_set_drvdata(dev, gpu);
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return 0;
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}
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@ -896,7 +896,7 @@ int msm_gpu_init(struct drm_device *drm, struct platform_device *pdev,
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gpu->gpu_cx = NULL;
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gpu->pdev = pdev;
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platform_set_drvdata(pdev, gpu);
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platform_set_drvdata(pdev, &gpu->adreno_smmu);
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msm_devfreq_init(gpu);
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@ -7,6 +7,7 @@
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#ifndef __MSM_GPU_H__
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#define __MSM_GPU_H__
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#include <linux/adreno-smmu-priv.h>
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#include <linux/clk.h>
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#include <linux/interconnect.h>
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#include <linux/pm_opp.h>
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@ -74,6 +75,8 @@ struct msm_gpu {
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struct platform_device *pdev;
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const struct msm_gpu_funcs *funcs;
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struct adreno_smmu_priv adreno_smmu;
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/* performance counters (hw & sw): */
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spinlock_t perf_lock;
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bool perfcntr_active;
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@ -146,7 +149,8 @@ struct msm_gpu {
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static inline struct msm_gpu *dev_to_gpu(struct device *dev)
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{
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return dev_get_drvdata(dev);
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struct adreno_smmu_priv *adreno_smmu = dev_get_drvdata(dev);
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return container_of(adreno_smmu, struct msm_gpu, adreno_smmu);
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}
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/* It turns out that all targets use the same ringbuffer size */
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