Merge branch 'pci/controller/rcar'
- Remove unused static pcie_base and pcie_dev (Geert Uytterhoeven) * pci/controller/rcar: PCI: rcar: Use correct product family name for Renesas R-Car PCI: rcar-host: Remove unused static pcie_base and pcie_dev
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9cd5f2cec7
@ -41,21 +41,6 @@ struct rcar_msi {
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int irq2;
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};
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#ifdef CONFIG_ARM
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/*
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* Here we keep a static copy of the remapped PCIe controller address.
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* This is only used on aarch32 systems, all of which have one single
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* PCIe controller, to provide quick access to the PCIe controller in
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* the L1 link state fixup function, called from the ARM fault handler.
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*/
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static void __iomem *pcie_base;
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/*
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* Static copy of PCIe device pointer, so we can check whether the
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* device is runtime suspended or not.
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*/
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static struct device *pcie_dev;
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#endif
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/* Structure representing the PCIe interface */
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struct rcar_pcie_host {
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struct rcar_pcie pcie;
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@ -684,7 +669,7 @@ static void rcar_compose_msi_msg(struct irq_data *data, struct msi_msg *msg)
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}
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static struct irq_chip rcar_msi_bottom_chip = {
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.name = "Rcar MSI",
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.name = "R-Car MSI",
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.irq_ack = rcar_msi_irq_ack,
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.irq_mask = rcar_msi_irq_mask,
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.irq_unmask = rcar_msi_irq_unmask,
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@ -813,7 +798,7 @@ static int rcar_pcie_enable_msi(struct rcar_pcie_host *host)
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/*
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* Setup MSI data target using RC base address address, which
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* is guaranteed to be in the low 32bit range on any RCar HW.
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* is guaranteed to be in the low 32bit range on any R-Car HW.
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*/
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rcar_pci_write_reg(pcie, lower_32_bits(res.start) | MSIFE, PCIEMSIALR);
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rcar_pci_write_reg(pcie, upper_32_bits(res.start), PCIEMSIAUR);
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@ -879,12 +864,6 @@ static int rcar_pcie_get_resources(struct rcar_pcie_host *host)
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}
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host->msi.irq2 = i;
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#ifdef CONFIG_ARM
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/* Cache static copy for L1 link state fixup hook on aarch32 */
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pcie_base = pcie->base;
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pcie_dev = pcie->dev;
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#endif
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return 0;
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err_irq2:
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