agp/intel: new host bridge support
Add new CPU host bridge id, needed for support Ironlake graphics device with it. No change for graphics device itself, so no need to update drm/i915. Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
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@ -62,6 +62,7 @@
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#define PCI_DEVICE_ID_INTEL_IGDNG_D_IG 0x0042
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#define PCI_DEVICE_ID_INTEL_IGDNG_M_HB 0x0044
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#define PCI_DEVICE_ID_INTEL_IGDNG_MA_HB 0x0062
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#define PCI_DEVICE_ID_INTEL_IGDNG_MC2_HB 0x006a
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#define PCI_DEVICE_ID_INTEL_IGDNG_M_IG 0x0046
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/* cover 915 and 945 variants */
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@ -96,7 +97,8 @@
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agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_B43_HB || \
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agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_IGDNG_D_HB || \
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agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_IGDNG_M_HB || \
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agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_IGDNG_MA_HB)
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agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_IGDNG_MA_HB || \
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agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_IGDNG_MC2_HB)
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extern int agp_memory_reserved;
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@ -1364,6 +1366,7 @@ static void intel_i965_get_gtt_range(int *gtt_offset, int *gtt_size)
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case PCI_DEVICE_ID_INTEL_IGDNG_D_HB:
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case PCI_DEVICE_ID_INTEL_IGDNG_M_HB:
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case PCI_DEVICE_ID_INTEL_IGDNG_MA_HB:
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case PCI_DEVICE_ID_INTEL_IGDNG_MC2_HB:
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*gtt_offset = *gtt_size = MB(2);
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break;
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default:
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@ -2365,6 +2368,8 @@ static const struct intel_driver_description {
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"IGDNG/M", NULL, &intel_i965_driver },
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{ PCI_DEVICE_ID_INTEL_IGDNG_MA_HB, PCI_DEVICE_ID_INTEL_IGDNG_M_IG, 0,
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"IGDNG/MA", NULL, &intel_i965_driver },
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{ PCI_DEVICE_ID_INTEL_IGDNG_MC2_HB, PCI_DEVICE_ID_INTEL_IGDNG_M_IG, 0,
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"IGDNG/MC2", NULL, &intel_i965_driver },
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{ 0, 0, 0, NULL, NULL, NULL }
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};
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@ -2561,6 +2566,7 @@ static struct pci_device_id agp_intel_pci_table[] = {
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ID(PCI_DEVICE_ID_INTEL_IGDNG_D_HB),
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ID(PCI_DEVICE_ID_INTEL_IGDNG_M_HB),
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ID(PCI_DEVICE_ID_INTEL_IGDNG_MA_HB),
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ID(PCI_DEVICE_ID_INTEL_IGDNG_MC2_HB),
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{ }
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};
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