Renesas ARM based SoC IRQC Driver Updates for v3.14

* Simplify irq_set_type() method
 * Enable mask on suspend
 * Use lazy disable
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.14 (GNU/Linux)
 
 iQIcBAABAgAGBQJSuP4zAAoJENfPZGlqN0++fTsQAJ7bwMLVdNg0zflm7qMsCSgx
 /SDw1dx9oFboGKtzHrqthXKEGe2ws5uD8MzhHjtg/I9d23lftxOPaSXFqLSKikaz
 EmtbqLukDVYnECTDPzdTmbM7VLqtixWGMYUHwZ7r26dfzgoSmiNZcwF1xZ0N1ANp
 8ZdcylAWUnBEdy0L1c7np8Htdcta80GG2LPhG0ItfWNkTIoUxLoT+upJD6ZjNmZl
 54o+LEDtJAStBY2mkoB7G/lLvR9+3rRa0qjJRWcCkMJC4QAj9kwOqcybwmKOEGlN
 kph+1e4ZL5X9IZhIGQThUTTMYOyfKBrhjHBHwRhZSUg8fkVDAAP0UN/GPH7bCzrM
 E8FFkQbqOro9ROVzjmZ7Obe2/5D/bnbCE/F7RZy8od8gi0FYHJ+WKStEK0KQ0I6+
 6IqrEyD3pueISrGvh9RJEBonlkbnhzWzmp/RScEXp0xVu+ZAPncNzs8/UN8SvlR6
 ErAXpOscPpD1FXkYRYW6TaCJxRpY+PIOOnuwfwgzjxo4H0IXQESdG0WIBUQdzmsB
 A0NrDRtdYyicJXjSuDJSaCJ9XpyyJzSQqFwXhzVl6wXJMQgYXq2FpdteuRfxRLqL
 NFWYIrdby/CZDbXj++LnHyEkugH39bIxlzmThMxg0eR/rOOezXdx4F/DbSXiXITV
 oSB4ALOmiKqDSrPVyyyB
 =4yS6
 -----END PGP SIGNATURE-----

Merge tag 'renesas-irqc-for-v3.14' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/drivers

From Simon Horman:
Renesas ARM based SoC IRQC Driver Updates for v3.14

* Simplify irq_set_type() method
* Enable mask on suspend
* Use lazy disable

* tag 'renesas-irqc-for-v3.14' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  irq-renesas-irqc: simplify irq_set_type() method
  irqchip: renesas-irqc: Enable mask on suspend
  irqchip: renesas-irqc: Use lazy disable

Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson 2013-12-29 13:26:13 -08:00
commit 9d6b65e945

View File

@ -81,15 +81,12 @@ static void irqc_irq_disable(struct irq_data *d)
iowrite32(BIT(hw_irq), p->cpu_int_base + IRQC_EN_STS);
}
#define INTC_IRQ_SENSE_VALID 0x10
#define INTC_IRQ_SENSE(x) (x + INTC_IRQ_SENSE_VALID)
static unsigned char irqc_sense[IRQ_TYPE_SENSE_MASK + 1] = {
[IRQ_TYPE_LEVEL_LOW] = INTC_IRQ_SENSE(0x01),
[IRQ_TYPE_LEVEL_HIGH] = INTC_IRQ_SENSE(0x02),
[IRQ_TYPE_EDGE_FALLING] = INTC_IRQ_SENSE(0x04), /* Synchronous */
[IRQ_TYPE_EDGE_RISING] = INTC_IRQ_SENSE(0x08), /* Synchronous */
[IRQ_TYPE_EDGE_BOTH] = INTC_IRQ_SENSE(0x0c), /* Synchronous */
[IRQ_TYPE_LEVEL_LOW] = 0x01,
[IRQ_TYPE_LEVEL_HIGH] = 0x02,
[IRQ_TYPE_EDGE_FALLING] = 0x04, /* Synchronous */
[IRQ_TYPE_EDGE_RISING] = 0x08, /* Synchronous */
[IRQ_TYPE_EDGE_BOTH] = 0x0c, /* Synchronous */
};
static int irqc_irq_set_type(struct irq_data *d, unsigned int type)
@ -101,12 +98,12 @@ static int irqc_irq_set_type(struct irq_data *d, unsigned int type)
irqc_dbg(&p->irq[hw_irq], "sense");
if (!(value & INTC_IRQ_SENSE_VALID))
if (!value)
return -EINVAL;
tmp = ioread32(p->iomem + IRQC_CONFIG(hw_irq));
tmp &= ~0x3f;
tmp |= value ^ INTC_IRQ_SENSE_VALID;
tmp |= value;
iowrite32(tmp, p->iomem + IRQC_CONFIG(hw_irq));
return 0;
}
@ -212,10 +209,8 @@ static int irqc_probe(struct platform_device *pdev)
irq_chip->name = name;
irq_chip->irq_mask = irqc_irq_disable;
irq_chip->irq_unmask = irqc_irq_enable;
irq_chip->irq_enable = irqc_irq_enable;
irq_chip->irq_disable = irqc_irq_disable;
irq_chip->irq_set_type = irqc_irq_set_type;
irq_chip->flags = IRQCHIP_SKIP_SET_WAKE;
irq_chip->flags = IRQCHIP_SKIP_SET_WAKE | IRQCHIP_MASK_ON_SUSPEND;
p->irq_domain = irq_domain_add_simple(pdev->dev.of_node,
p->number_of_irqs,