RDMA/mlx5: Add sw_owner_v2 bit capability
Added sw_owner_v2 which will be enabled for future devices, replacing sw_owner bit. Signed-off-by: Alex Vesker <valex@nvidia.com> Signed-off-by: Leon Romanovsky <leonro@nvidia.com>
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@ -420,7 +420,8 @@ struct mlx5_ifc_flow_table_prop_layout_bits {
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u8 reserved_at_1a[0x2];
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u8 ipsec_encrypt[0x1];
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u8 ipsec_decrypt[0x1];
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u8 reserved_at_1e[0x2];
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u8 sw_owner_v2[0x1];
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u8 reserved_at_1f[0x1];
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u8 termination_table_raw_traffic[0x1];
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u8 reserved_at_21[0x1];
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