ioat3: xor self test
This adds a hardware specific self test to be called from ioat_probe. In the ioat3 case we will have tests for all the different raid operations, while ioat1 and ioat2 will continue to just test memcpy. Signed-off-by: Dan Williams <dan.j.williams@intel.com>
This commit is contained in:
Dan Williams
parent
b094ad3be5
commit
9de6fc717b
@ -799,7 +799,7 @@ static void __devinit ioat_dma_test_callback(void *dma_async_param)
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* ioat_dma_self_test - Perform a IOAT transaction to verify the HW works.
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* @device: device to be tested
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*/
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static int __devinit ioat_dma_self_test(struct ioatdma_device *device)
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int __devinit ioat_dma_self_test(struct ioatdma_device *device)
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{
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int i;
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u8 *src;
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@ -1039,7 +1039,7 @@ int __devinit ioat_probe(struct ioatdma_device *device)
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if (err)
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goto err_setup_interrupts;
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err = ioat_dma_self_test(device);
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err = device->self_test(device);
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if (err)
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goto err_self_test;
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@ -1197,6 +1197,7 @@ int __devinit ioat1_dma_probe(struct ioatdma_device *device, int dca)
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device->intr_quirk = ioat1_intr_quirk;
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device->enumerate_channels = ioat1_enumerate_channels;
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device->self_test = ioat_dma_self_test;
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dma = &device->common;
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dma->device_prep_dma_memcpy = ioat1_dma_prep_memcpy;
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dma->device_issue_pending = ioat1_dma_memcpy_issue_pending;
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@ -62,10 +62,10 @@
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* @enumerate_channels: hw version specific channel enumeration
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* @cleanup_tasklet: select between the v2 and v3 cleanup routines
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* @timer_fn: select between the v2 and v3 timer watchdog routines
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* @self_test: hardware version specific self test for each supported op type
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*
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* Note: the v3 cleanup routine supports raid operations
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*/
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struct ioatdma_device {
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struct pci_dev *pdev;
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void __iomem *reg_base;
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@ -80,6 +80,7 @@ struct ioatdma_device {
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int (*enumerate_channels)(struct ioatdma_device *device);
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void (*cleanup_tasklet)(unsigned long data);
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void (*timer_fn)(unsigned long data);
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int (*self_test)(struct ioatdma_device *device);
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};
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struct ioat_chan_common {
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@ -313,6 +314,7 @@ static inline void ioat_unmap(struct pci_dev *pdev, dma_addr_t addr, size_t len,
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int __devinit ioat_probe(struct ioatdma_device *device);
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int __devinit ioat_register(struct ioatdma_device *device);
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int __devinit ioat1_dma_probe(struct ioatdma_device *dev, int dca);
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int __devinit ioat_dma_self_test(struct ioatdma_device *device);
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void __devexit ioat_dma_remove(struct ioatdma_device *device);
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struct dca_provider * __devinit ioat_dca_init(struct pci_dev *pdev,
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void __iomem *iobase);
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@ -836,6 +836,7 @@ int __devinit ioat2_dma_probe(struct ioatdma_device *device, int dca)
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device->enumerate_channels = ioat2_enumerate_channels;
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device->cleanup_tasklet = ioat2_cleanup_tasklet;
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device->timer_fn = ioat2_timer_event;
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device->self_test = ioat_dma_self_test;
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dma = &device->common;
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dma->device_prep_dma_memcpy = ioat2_dma_prep_memcpy_lock;
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dma->device_issue_pending = ioat2_issue_pending;
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@ -513,6 +513,280 @@ ioat3_prep_xor_val(struct dma_chan *chan, dma_addr_t *src,
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src_cnt - 1, len, flags);
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}
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static void __devinit ioat3_dma_test_callback(void *dma_async_param)
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{
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struct completion *cmp = dma_async_param;
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complete(cmp);
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}
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#define IOAT_NUM_SRC_TEST 6 /* must be <= 8 */
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static int __devinit ioat_xor_val_self_test(struct ioatdma_device *device)
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{
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int i, src_idx;
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struct page *dest;
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struct page *xor_srcs[IOAT_NUM_SRC_TEST];
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struct page *xor_val_srcs[IOAT_NUM_SRC_TEST + 1];
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dma_addr_t dma_srcs[IOAT_NUM_SRC_TEST + 1];
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dma_addr_t dma_addr, dest_dma;
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struct dma_async_tx_descriptor *tx;
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struct dma_chan *dma_chan;
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dma_cookie_t cookie;
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u8 cmp_byte = 0;
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u32 cmp_word;
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u32 xor_val_result;
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int err = 0;
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struct completion cmp;
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unsigned long tmo;
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struct device *dev = &device->pdev->dev;
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struct dma_device *dma = &device->common;
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dev_dbg(dev, "%s\n", __func__);
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if (!dma_has_cap(DMA_XOR, dma->cap_mask))
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return 0;
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for (src_idx = 0; src_idx < IOAT_NUM_SRC_TEST; src_idx++) {
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xor_srcs[src_idx] = alloc_page(GFP_KERNEL);
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if (!xor_srcs[src_idx]) {
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while (src_idx--)
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__free_page(xor_srcs[src_idx]);
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return -ENOMEM;
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}
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}
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dest = alloc_page(GFP_KERNEL);
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if (!dest) {
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while (src_idx--)
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__free_page(xor_srcs[src_idx]);
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return -ENOMEM;
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}
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/* Fill in src buffers */
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for (src_idx = 0; src_idx < IOAT_NUM_SRC_TEST; src_idx++) {
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u8 *ptr = page_address(xor_srcs[src_idx]);
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for (i = 0; i < PAGE_SIZE; i++)
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ptr[i] = (1 << src_idx);
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}
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for (src_idx = 0; src_idx < IOAT_NUM_SRC_TEST; src_idx++)
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cmp_byte ^= (u8) (1 << src_idx);
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cmp_word = (cmp_byte << 24) | (cmp_byte << 16) |
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(cmp_byte << 8) | cmp_byte;
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memset(page_address(dest), 0, PAGE_SIZE);
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dma_chan = container_of(dma->channels.next, struct dma_chan,
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device_node);
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if (dma->device_alloc_chan_resources(dma_chan) < 1) {
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err = -ENODEV;
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goto out;
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}
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/* test xor */
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dest_dma = dma_map_page(dev, dest, 0, PAGE_SIZE, DMA_FROM_DEVICE);
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for (i = 0; i < IOAT_NUM_SRC_TEST; i++)
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dma_srcs[i] = dma_map_page(dev, xor_srcs[i], 0, PAGE_SIZE,
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DMA_TO_DEVICE);
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tx = dma->device_prep_dma_xor(dma_chan, dest_dma, dma_srcs,
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IOAT_NUM_SRC_TEST, PAGE_SIZE,
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DMA_PREP_INTERRUPT);
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if (!tx) {
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dev_err(dev, "Self-test xor prep failed\n");
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err = -ENODEV;
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goto free_resources;
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}
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async_tx_ack(tx);
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init_completion(&cmp);
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tx->callback = ioat3_dma_test_callback;
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tx->callback_param = &cmp;
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cookie = tx->tx_submit(tx);
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if (cookie < 0) {
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dev_err(dev, "Self-test xor setup failed\n");
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err = -ENODEV;
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goto free_resources;
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}
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dma->device_issue_pending(dma_chan);
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tmo = wait_for_completion_timeout(&cmp, msecs_to_jiffies(3000));
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if (dma->device_is_tx_complete(dma_chan, cookie, NULL, NULL) != DMA_SUCCESS) {
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dev_err(dev, "Self-test xor timed out\n");
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err = -ENODEV;
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goto free_resources;
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}
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dma_sync_single_for_cpu(dev, dest_dma, PAGE_SIZE, DMA_FROM_DEVICE);
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for (i = 0; i < (PAGE_SIZE / sizeof(u32)); i++) {
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u32 *ptr = page_address(dest);
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if (ptr[i] != cmp_word) {
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dev_err(dev, "Self-test xor failed compare\n");
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err = -ENODEV;
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goto free_resources;
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}
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}
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dma_sync_single_for_device(dev, dest_dma, PAGE_SIZE, DMA_TO_DEVICE);
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/* skip validate if the capability is not present */
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if (!dma_has_cap(DMA_XOR_VAL, dma_chan->device->cap_mask))
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goto free_resources;
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/* validate the sources with the destintation page */
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for (i = 0; i < IOAT_NUM_SRC_TEST; i++)
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xor_val_srcs[i] = xor_srcs[i];
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xor_val_srcs[i] = dest;
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xor_val_result = 1;
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for (i = 0; i < IOAT_NUM_SRC_TEST + 1; i++)
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dma_srcs[i] = dma_map_page(dev, xor_val_srcs[i], 0, PAGE_SIZE,
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DMA_TO_DEVICE);
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tx = dma->device_prep_dma_xor_val(dma_chan, dma_srcs,
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IOAT_NUM_SRC_TEST + 1, PAGE_SIZE,
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&xor_val_result, DMA_PREP_INTERRUPT);
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if (!tx) {
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dev_err(dev, "Self-test zero prep failed\n");
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err = -ENODEV;
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goto free_resources;
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}
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async_tx_ack(tx);
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init_completion(&cmp);
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tx->callback = ioat3_dma_test_callback;
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tx->callback_param = &cmp;
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cookie = tx->tx_submit(tx);
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if (cookie < 0) {
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dev_err(dev, "Self-test zero setup failed\n");
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err = -ENODEV;
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goto free_resources;
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}
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dma->device_issue_pending(dma_chan);
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tmo = wait_for_completion_timeout(&cmp, msecs_to_jiffies(3000));
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if (dma->device_is_tx_complete(dma_chan, cookie, NULL, NULL) != DMA_SUCCESS) {
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dev_err(dev, "Self-test validate timed out\n");
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err = -ENODEV;
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goto free_resources;
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}
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if (xor_val_result != 0) {
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dev_err(dev, "Self-test validate failed compare\n");
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err = -ENODEV;
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goto free_resources;
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}
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/* skip memset if the capability is not present */
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if (!dma_has_cap(DMA_MEMSET, dma_chan->device->cap_mask))
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goto free_resources;
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/* test memset */
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dma_addr = dma_map_page(dev, dest, 0,
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PAGE_SIZE, DMA_FROM_DEVICE);
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tx = dma->device_prep_dma_memset(dma_chan, dma_addr, 0, PAGE_SIZE,
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DMA_PREP_INTERRUPT);
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if (!tx) {
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dev_err(dev, "Self-test memset prep failed\n");
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err = -ENODEV;
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goto free_resources;
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}
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async_tx_ack(tx);
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init_completion(&cmp);
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tx->callback = ioat3_dma_test_callback;
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tx->callback_param = &cmp;
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cookie = tx->tx_submit(tx);
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if (cookie < 0) {
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dev_err(dev, "Self-test memset setup failed\n");
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err = -ENODEV;
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goto free_resources;
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}
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dma->device_issue_pending(dma_chan);
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tmo = wait_for_completion_timeout(&cmp, msecs_to_jiffies(3000));
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if (dma->device_is_tx_complete(dma_chan, cookie, NULL, NULL) != DMA_SUCCESS) {
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dev_err(dev, "Self-test memset timed out\n");
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err = -ENODEV;
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goto free_resources;
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}
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for (i = 0; i < PAGE_SIZE/sizeof(u32); i++) {
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u32 *ptr = page_address(dest);
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if (ptr[i]) {
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dev_err(dev, "Self-test memset failed compare\n");
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err = -ENODEV;
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goto free_resources;
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}
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}
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/* test for non-zero parity sum */
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xor_val_result = 0;
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for (i = 0; i < IOAT_NUM_SRC_TEST + 1; i++)
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dma_srcs[i] = dma_map_page(dev, xor_val_srcs[i], 0, PAGE_SIZE,
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DMA_TO_DEVICE);
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tx = dma->device_prep_dma_xor_val(dma_chan, dma_srcs,
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IOAT_NUM_SRC_TEST + 1, PAGE_SIZE,
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&xor_val_result, DMA_PREP_INTERRUPT);
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if (!tx) {
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dev_err(dev, "Self-test 2nd zero prep failed\n");
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err = -ENODEV;
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goto free_resources;
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}
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async_tx_ack(tx);
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init_completion(&cmp);
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tx->callback = ioat3_dma_test_callback;
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tx->callback_param = &cmp;
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cookie = tx->tx_submit(tx);
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if (cookie < 0) {
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dev_err(dev, "Self-test 2nd zero setup failed\n");
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err = -ENODEV;
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goto free_resources;
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}
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dma->device_issue_pending(dma_chan);
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tmo = wait_for_completion_timeout(&cmp, msecs_to_jiffies(3000));
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if (dma->device_is_tx_complete(dma_chan, cookie, NULL, NULL) != DMA_SUCCESS) {
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dev_err(dev, "Self-test 2nd validate timed out\n");
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err = -ENODEV;
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goto free_resources;
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}
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if (xor_val_result != SUM_CHECK_P_RESULT) {
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dev_err(dev, "Self-test validate failed compare\n");
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err = -ENODEV;
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goto free_resources;
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}
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free_resources:
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dma->device_free_chan_resources(dma_chan);
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out:
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src_idx = IOAT_NUM_SRC_TEST;
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while (src_idx--)
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__free_page(xor_srcs[src_idx]);
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__free_page(dest);
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return err;
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}
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static int __devinit ioat3_dma_self_test(struct ioatdma_device *device)
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{
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int rc = ioat_dma_self_test(device);
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if (rc)
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return rc;
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rc = ioat_xor_val_self_test(device);
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if (rc)
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return rc;
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return 0;
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}
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int __devinit ioat3_dma_probe(struct ioatdma_device *device, int dca)
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{
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struct pci_dev *pdev = device->pdev;
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@ -526,6 +800,7 @@ int __devinit ioat3_dma_probe(struct ioatdma_device *device, int dca)
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device->enumerate_channels = ioat2_enumerate_channels;
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device->cleanup_tasklet = ioat3_cleanup_tasklet;
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device->timer_fn = ioat3_timer_event;
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device->self_test = ioat3_dma_self_test;
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dma = &device->common;
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dma->device_prep_dma_memcpy = ioat2_dma_prep_memcpy_lock;
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dma->device_issue_pending = ioat2_issue_pending;
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