KVM: nVMX: introduce nested_vmx_load_cr3 and call it on vmentry
Loading CR3 as part of emulating vmentry is different from regular CR3 loads, as implemented in kvm_set_cr3, in several ways. * different rules are followed to check CR3 and it is desirable for the caller to distinguish between the possible failures * PDPTRs are not loaded if PAE paging and nested EPT are both enabled * many MMU operations are not necessary This patch introduces nested_vmx_load_cr3 suitable for CR3 loads as part of nested vmentry and vmexit, and makes use of it on the nested vmentry path. Signed-off-by: Ladi Prosek <lprosek@redhat.com> Signed-off-by: Radim Krčmář <rkrcmar@redhat.com>
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@ -1071,6 +1071,7 @@ unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm);
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void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages);
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int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3);
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bool pdptrs_changed(struct kvm_vcpu *vcpu);
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int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
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const void *val, int bytes);
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@ -9968,6 +9968,44 @@ static int nested_vmx_store_msr(struct kvm_vcpu *vcpu, u64 gpa, u32 count)
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return 0;
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}
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/*
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* Load guest's/host's cr3 at nested entry/exit. nested_ept is true if we are
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* emulating VM entry into a guest with EPT enabled.
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* Returns 0 on success, 1 on failure. Invalid state exit qualification code
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* is assigned to entry_failure_code on failure.
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*/
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static int nested_vmx_load_cr3(struct kvm_vcpu *vcpu, unsigned long cr3, bool nested_ept,
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unsigned long *entry_failure_code)
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{
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unsigned long invalid_mask;
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if (cr3 != kvm_read_cr3(vcpu) || (!nested_ept && pdptrs_changed(vcpu))) {
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invalid_mask = (~0ULL) << cpuid_maxphyaddr(vcpu);
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if (cr3 & invalid_mask) {
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*entry_failure_code = ENTRY_FAIL_DEFAULT;
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return 1;
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}
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/*
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* If PAE paging and EPT are both on, CR3 is not used by the CPU and
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* must not be dereferenced.
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*/
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if (!is_long_mode(vcpu) && is_pae(vcpu) && is_paging(vcpu) &&
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!nested_ept) {
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if (!load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3)) {
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*entry_failure_code = ENTRY_FAIL_PDPTE;
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return 1;
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}
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}
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vcpu->arch.cr3 = cr3;
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__set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
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}
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kvm_mmu_reset_context(vcpu);
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return 0;
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}
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/*
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* prepare_vmcs02 is called when the L1 guest hypervisor runs its nested
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* L2 guest. L1 has a vmcs for L2 (vmcs12), and this function "merges" it
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@ -10300,21 +10338,10 @@ static int prepare_vmcs02(struct kvm_vcpu *vcpu, struct vmcs12 *vmcs12,
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/* Note: modifies VM_ENTRY/EXIT_CONTROLS and GUEST/HOST_IA32_EFER */
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vmx_set_efer(vcpu, vcpu->arch.efer);
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/*
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* Shadow page tables on either EPT or shadow page tables.
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* If PAE and EPT are both on, CR3 is not used by the CPU and must not
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* be dereferenced.
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*/
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if (is_pae(vcpu) && is_paging(vcpu) && !is_long_mode(vcpu) &&
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nested_ept_enabled) {
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vcpu->arch.cr3 = vmcs12->guest_cr3;
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__set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
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} else {
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if (kvm_set_cr3(vcpu, vmcs12->guest_cr3)) {
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*entry_failure_code = ENTRY_FAIL_DEFAULT;
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return 1;
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}
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}
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/* Shadow page tables on either EPT or shadow page tables. */
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if (nested_vmx_load_cr3(vcpu, vmcs12->guest_cr3, nested_ept_enabled,
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entry_failure_code))
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return 1;
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kvm_mmu_reset_context(vcpu);
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@ -566,7 +566,7 @@ out:
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}
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EXPORT_SYMBOL_GPL(load_pdptrs);
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static bool pdptrs_changed(struct kvm_vcpu *vcpu)
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bool pdptrs_changed(struct kvm_vcpu *vcpu)
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{
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u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
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bool changed = true;
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@ -592,6 +592,7 @@ out:
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return changed;
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}
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EXPORT_SYMBOL_GPL(pdptrs_changed);
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int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
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{
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