ARM: tegra: Add SPI controller nodes for Tegra124
The SPI controllers on Tegra124 are compatible with those found on the Tegra114 SoC. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
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@ -277,6 +277,96 @@
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status = "disabled";
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};
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spi@7000d400 {
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compatible = "nvidia,tegra124-spi", "nvidia,tegra114-spi";
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reg = <0x7000d400 0x200>;
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interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&tegra_car TEGRA124_CLK_SBC1>;
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clock-names = "spi";
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resets = <&tegra_car 41>;
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reset-names = "spi";
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dmas = <&apbdma 15>, <&apbdma 15>;
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dma-names = "rx", "tx";
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status = "disabled";
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};
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spi@7000d600 {
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compatible = "nvidia,tegra124-spi", "nvidia,tegra114-spi";
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reg = <0x7000d600 0x200>;
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interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&tegra_car TEGRA124_CLK_SBC2>;
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clock-names = "spi";
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resets = <&tegra_car 44>;
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reset-names = "spi";
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dmas = <&apbdma 16>, <&apbdma 16>;
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dma-names = "rx", "tx";
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status = "disabled";
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};
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spi@7000d800 {
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compatible = "nvidia,tegra124-spi", "nvidia,tegra114-spi";
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reg = <0x7000d800 0x200>;
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interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&tegra_car TEGRA124_CLK_SBC3>;
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clock-names = "spi";
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resets = <&tegra_car 46>;
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reset-names = "spi";
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dmas = <&apbdma 17>, <&apbdma 17>;
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dma-names = "rx", "tx";
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status = "disabled";
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};
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spi@7000da00 {
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compatible = "nvidia,tegra124-spi", "nvidia,tegra114-spi";
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reg = <0x7000da00 0x200>;
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interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&tegra_car TEGRA124_CLK_SBC4>;
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clock-names = "spi";
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resets = <&tegra_car 68>;
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reset-names = "spi";
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dmas = <&apbdma 18>, <&apbdma 18>;
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dma-names = "rx", "tx";
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status = "disabled";
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};
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spi@7000dc00 {
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compatible = "nvidia,tegra124-spi", "nvidia,tegra114-spi";
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reg = <0x7000dc00 0x200>;
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interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&tegra_car TEGRA124_CLK_SBC5>;
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clock-names = "spi";
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resets = <&tegra_car 104>;
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reset-names = "spi";
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dmas = <&apbdma 27>, <&apbdma 27>;
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dma-names = "rx", "tx";
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status = "disabled";
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};
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spi@7000de00 {
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compatible = "nvidia,tegra124-spi", "nvidia,tegra114-spi";
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reg = <0x7000de00 0x200>;
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interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&tegra_car TEGRA124_CLK_SBC6>;
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clock-names = "spi";
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resets = <&tegra_car 105>;
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reset-names = "spi";
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dmas = <&apbdma 28>, <&apbdma 28>;
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dma-names = "rx", "tx";
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status = "disabled";
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};
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rtc@7000e000 {
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compatible = "nvidia,tegra124-rtc", "nvidia,tegra20-rtc";
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reg = <0x7000e000 0x100>;
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