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x86, irq: Clean up unused IOAPIC interface

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Now we have converted all x86 platforms to use the common irqdomain map
interface. There's no caller of io_apic_set_pci_routing(),
setup_IO_APIC_irq_extra() and io_apic_setup_irq_pin_once() any more,
so kill them.

Signed-off-by: Jiang Liu <jiang.liu@linux.intel.com>
Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Cc: Tony Luck <tony.luck@intel.com>
Cc: Joerg Roedel <joro@8bytes.org>
Cc: Paul Gortmaker <paul.gortmaker@windriver.com>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Grant Likely <grant.likely@linaro.org>
Cc: Rafael J. Wysocki <rjw@rjwysocki.net>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Randy Dunlap <rdunlap@infradead.org>
Cc: Yinghai Lu <yinghai@kernel.org>
Link: http://lkml.kernel.org/r/1402302011-23642-35-git-send-email-jiang.liu@linux.intel.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
This commit is contained in:
Jiang Liu 2014-06-09 16:20:03 +08:00 committed by Thomas Gleixner
parent 795aacf63f
commit 9f354b0252
2 changed files with 0 additions and 79 deletions
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9
arch/x86/include/asm/io_apic.h
View File

@ -141,9 +141,6 @@ extern int noioapicreroute;
struct io_apic_irq_attr; struct io_apic_irq_attr;
struct irq_cfg; struct irq_cfg;
extern int io_apic_set_pci_routing(struct device *dev, int irq,
struct io_apic_irq_attr *irq_attr);
extern void setup_IO_APIC_irq_extra(u32 gsi);
extern void ioapic_insert_resources(void); extern void ioapic_insert_resources(void);
extern int native_setup_ioapic_entry(int, struct IO_APIC_route_entry *, extern int native_setup_ioapic_entry(int, struct IO_APIC_route_entry *,
@ -155,8 +152,6 @@ extern void native_compose_msi_msg(struct pci_dev *pdev,
unsigned int irq, unsigned int dest, unsigned int irq, unsigned int dest,
struct msi_msg *msg, u8 hpet_id); struct msi_msg *msg, u8 hpet_id);
extern void native_eoi_ioapic_pin(int apic, int pin, int vector); extern void native_eoi_ioapic_pin(int apic, int pin, int vector);
extern int io_apic_setup_irq_pin_once(unsigned int irq, int node,
struct io_apic_irq_attr *attr);
extern int save_ioapic_entries(void); extern int save_ioapic_entries(void);
extern void mask_ioapic_entries(void); extern void mask_ioapic_entries(void);
@ -240,10 +235,6 @@ static inline int mp_find_ioapic(u32 gsi) { return 0; }
static inline u32 mp_pin_to_gsi(int ioapic, int pin) { return UINT_MAX; } static inline u32 mp_pin_to_gsi(int ioapic, int pin) { return UINT_MAX; }
static inline int mp_map_gsi_to_irq(u32 gsi, unsigned int flags) { return gsi; } static inline int mp_map_gsi_to_irq(u32 gsi, unsigned int flags) { return gsi; }
struct io_apic_irq_attr;
static inline int io_apic_set_pci_routing(struct device *dev, int irq,
struct io_apic_irq_attr *irq_attr) { return 0; }
static inline int save_ioapic_entries(void) static inline int save_ioapic_entries(void)
{ {
return -ENOMEM; return -ENOMEM;

70
arch/x86/kernel/apic/io_apic.c
View File

@ -111,7 +111,6 @@ static struct ioapic {
struct ioapic_domain_cfg irqdomain_cfg; struct ioapic_domain_cfg irqdomain_cfg;
struct irq_domain *irqdomain; struct irq_domain *irqdomain;
struct mp_pin_info *pin_info; struct mp_pin_info *pin_info;
DECLARE_BITMAP(pin_programmed, MP_MAX_IOAPIC_PIN + 1);
} ioapics[MAX_IO_APICS]; } ioapics[MAX_IO_APICS];
#define mpc_ioapic_ver(ioapic_idx) ioapics[ioapic_idx].mp_config.apicver #define mpc_ioapic_ver(ioapic_idx) ioapics[ioapic_idx].mp_config.apicver
@ -1523,38 +1522,6 @@ static void __init setup_IO_APIC_irqs(void)
__io_apic_setup_irqs(ioapic_idx); __io_apic_setup_irqs(ioapic_idx);
} }
/*
* for the gsi that is not in first ioapic
* but could not use acpi_register_gsi()
* like some special sci in IBM x3330
*/
void setup_IO_APIC_irq_extra(u32 gsi)
{
int ioapic_idx = 0, pin, idx, irq, node = cpu_to_node(0);
struct io_apic_irq_attr attr;
/*
* Convert 'gsi' to 'ioapic.pin'.
*/
ioapic_idx = mp_find_ioapic(gsi);
if (ioapic_idx < 0)
return;
pin = mp_find_ioapic_pin(ioapic_idx, gsi);
idx = find_irq_entry(ioapic_idx, pin, mp_INT);
if (idx == -1)
return;
irq = pin_2_irq(idx, ioapic_idx, pin, IOAPIC_MAP_ALLOC);
if (irq < 0 || mp_init_irq_at_boot(ioapic_idx, irq))
return;
set_io_apic_irq_attr(&attr, ioapic_idx, pin, irq_trigger(idx),
irq_polarity(idx));
io_apic_setup_irq_pin_once(irq, node, &attr);
}
/* /*
* Set up the timer pin, possibly with the 8259A-master behind. * Set up the timer pin, possibly with the 8259A-master behind.
*/ */
@ -3458,27 +3425,6 @@ io_apic_setup_irq_pin(unsigned int irq, int node, struct io_apic_irq_attr *attr)
return ret; return ret;
} }
int io_apic_setup_irq_pin_once(unsigned int irq, int node,
struct io_apic_irq_attr *attr)
{
unsigned int ioapic_idx = attr->ioapic, pin = attr->ioapic_pin;
int ret;
struct IO_APIC_route_entry orig_entry;
/* Avoid redundant programming */
if (test_bit(pin, ioapics[ioapic_idx].pin_programmed)) {
pr_debug("Pin %d-%d already programmed\n", mpc_ioapic_id(ioapic_idx), pin);
orig_entry = ioapic_read_entry(attr->ioapic, pin);
if (attr->trigger == orig_entry.trigger && attr->polarity == orig_entry.polarity)
return 0;
return -EBUSY;
}
ret = io_apic_setup_irq_pin(irq, node, attr);
if (!ret)
set_bit(pin, ioapics[ioapic_idx].pin_programmed);
return ret;
}
static int __init io_apic_get_redir_entries(int ioapic) static int __init io_apic_get_redir_entries(int ioapic)
{ {
union IO_APIC_reg_01 reg_01; union IO_APIC_reg_01 reg_01;
@ -3525,22 +3471,6 @@ int __init arch_probe_nr_irqs(void)
return 0; return 0;
} }
int io_apic_set_pci_routing(struct device *dev, int irq,
struct io_apic_irq_attr *irq_attr)
{
int node;
if (!IO_APIC_IRQ(irq)) {
apic_printk(APIC_QUIET,KERN_ERR "IOAPIC[%d]: Invalid reference to IRQ 0\n",
irq_attr->ioapic);
return -EINVAL;
}
node = dev ? dev_to_node(dev) : cpu_to_node(0);
return io_apic_setup_irq_pin_once(irq, node, irq_attr);
}
#ifdef CONFIG_X86_32 #ifdef CONFIG_X86_32
static int __init io_apic_get_unique_id(int ioapic, int apic_id) static int __init io_apic_get_unique_id(int ioapic, int apic_id)
{ {