ARM: kprobes: Add emulate_rd12rn16rm0rs8_rwflags()
This is the emulation function for the instruction format used by the ARM data-processing instructions. Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
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@ -893,6 +893,41 @@ prep_emulate_rdhi16rdlo12rs8rm0_wflags(kprobe_opcode_t insn,
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return INSN_GOOD;
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}
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static void __kprobes
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emulate_rd12rn16rm0rs8_rwflags(struct kprobe *p, struct pt_regs *regs)
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{
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kprobe_opcode_t insn = p->opcode;
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unsigned long pc = (unsigned long)p->addr + 8;
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int rd = (insn >> 12) & 0xf;
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int rn = (insn >> 16) & 0xf;
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int rm = insn & 0xf;
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int rs = (insn >> 8) & 0xf;
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register unsigned long rdv asm("r0") = regs->uregs[rd];
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register unsigned long rnv asm("r2") = (rn == 15) ? pc
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: regs->uregs[rn];
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register unsigned long rmv asm("r3") = (rm == 15) ? pc
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: regs->uregs[rm];
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register unsigned long rsv asm("r1") = regs->uregs[rs];
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unsigned long cpsr = regs->ARM_cpsr;
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__asm__ __volatile__ (
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"msr cpsr_fs, %[cpsr] \n\t"
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BLX("%[fn]")
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"mrs %[cpsr], cpsr \n\t"
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: "=r" (rdv), [cpsr] "=r" (cpsr)
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: "0" (rdv), "r" (rnv), "r" (rmv), "r" (rsv),
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"1" (cpsr), [fn] "r" (p->ainsn.insn_fn)
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: "lr", "memory", "cc"
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);
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if (rd == 15)
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alu_write_pc(rdv, regs);
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else
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regs->uregs[rd] = rdv;
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regs->ARM_cpsr = (regs->ARM_cpsr & ~APSR_MASK) | (cpsr & APSR_MASK);
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}
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/*
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* For the instruction masking and comparisons in all the "space_*"
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* functions below, Do _not_ rearrange the order of tests unless
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