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arm64: dts: st: add all 8 i2c nodes on stm32mp251

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Add the 8 nodes for all i2c instances available on the stm32mp251.

Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
This commit is contained in:
Alain Volmat 2023-12-15 18:06:11 +01:00 committed by Alexandre Torgue
parent 948a4db95d
commit 9fd205d487
1 changed files with 104 additions and 0 deletions
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104
arch/arm64/boot/dts/st/stm32mp251.dtsi
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@ -124,6 +124,110 @@
status = "disabled";
};
i2c1: i2c@40120000 {
compatible = "st,stm32mp25-i2c";
reg = <0x40120000 0x400>;
interrupt-names = "event";
interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&rcc CK_KER_I2C1>;
resets = <&rcc I2C1_R>;
#address-cells = <1>;
#size-cells = <0>;
access-controllers = <&rifsc 41>;
status = "disabled";
};
i2c2: i2c@40130000 {
compatible = "st,stm32mp25-i2c";
reg = <0x40130000 0x400>;
interrupt-names = "event";
interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&rcc CK_KER_I2C2>;
resets = <&rcc I2C2_R>;
#address-cells = <1>;
#size-cells = <0>;
access-controllers = <&rifsc 42>;
status = "disabled";
};
i2c3: i2c@40140000 {
compatible = "st,stm32mp25-i2c";
reg = <0x40140000 0x400>;
interrupt-names = "event";
interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&rcc CK_KER_I2C3>;
resets = <&rcc I2C3_R>;
#address-cells = <1>;
#size-cells = <0>;
access-controllers = <&rifsc 43>;
status = "disabled";
};
i2c4: i2c@40150000 {
compatible = "st,stm32mp25-i2c";
reg = <0x40150000 0x400>;
interrupt-names = "event";
interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&rcc CK_KER_I2C4>;
resets = <&rcc I2C4_R>;
#address-cells = <1>;
#size-cells = <0>;
access-controllers = <&rifsc 44>;
status = "disabled";
};
i2c5: i2c@40160000 {
compatible = "st,stm32mp25-i2c";
reg = <0x40160000 0x400>;
interrupt-names = "event";
interrupts = <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&rcc CK_KER_I2C5>;
resets = <&rcc I2C5_R>;
#address-cells = <1>;
#size-cells = <0>;
access-controllers = <&rifsc 45>;
status = "disabled";
};
i2c6: i2c@40170000 {
compatible = "st,stm32mp25-i2c";
reg = <0x40170000 0x400>;
interrupt-names = "event";
interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&rcc CK_KER_I2C6>;
resets = <&rcc I2C6_R>;
#address-cells = <1>;
#size-cells = <0>;
access-controllers = <&rifsc 46>;
status = "disabled";
};
i2c7: i2c@40180000 {
compatible = "st,stm32mp25-i2c";
reg = <0x40180000 0x400>;
interrupt-names = "event";
interrupts = <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&rcc CK_KER_I2C7>;
resets = <&rcc I2C7_R>;
#address-cells = <1>;
#size-cells = <0>;
access-controllers = <&rifsc 47>;
status = "disabled";
};
i2c8: i2c@46040000 {
compatible = "st,stm32mp25-i2c";
reg = <0x46040000 0x400>;
interrupt-names = "event";
interrupts = <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&rcc CK_KER_I2C8>;
resets = <&rcc I2C8_R>;
#address-cells = <1>;
#size-cells = <0>;
access-controllers = <&rifsc 48>;
status = "disabled";
};
sdmmc1: mmc@48220000 {
compatible = "st,stm32mp25-sdmmc2", "arm,pl18x", "arm,primecell";
arm,primecell-periphid = <0x00353180>;