arm64: dts: qcom: sm8650: add IPA information

Add IPA-related nodes and definitions to SM8650 dtsi,
which uses IPA v5.5.1 a minor revision of v5.5 found
in the SM8550 SoC.

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20231201-topic-sm8650-upstream-ipa-v1-1-7e8cf7200cd2@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
This commit is contained in:
Neil Armstrong 2023-12-01 14:50:41 +01:00 committed by Bjorn Andersson
parent 0c5b1016b5
commit 9fdddbd134

View File

@ -2558,6 +2558,45 @@
#power-domain-cells = <1>;
};
ipa: ipa@3f40000 {
compatible = "qcom,sm8650-ipa", "qcom,sm8550-ipa";
iommus = <&apps_smmu 0x4a0 0x0>,
<&apps_smmu 0x4a2 0x0>;
reg = <0 0x3f40000 0 0x10000>,
<0 0x3f50000 0 0x5000>,
<0 0x3e04000 0 0xfc000>;
reg-names = "ipa-reg",
"ipa-shared",
"gsi";
interrupts-extended = <&intc GIC_SPI 654 IRQ_TYPE_EDGE_RISING>,
<&intc GIC_SPI 432 IRQ_TYPE_LEVEL_HIGH>,
<&ipa_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
<&ipa_smp2p_in 1 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "ipa",
"gsi",
"ipa-clock-query",
"ipa-setup-ready";
clocks = <&rpmhcc RPMH_IPA_CLK>;
clock-names = "core";
interconnects = <&aggre2_noc MASTER_IPA 0 &mc_virt SLAVE_EBI1 0>,
<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_IPA_CFG 0>;
interconnect-names = "memory",
"config";
qcom,qmp = <&aoss_qmp>;
qcom,smem-states = <&ipa_smp2p_out 0>,
<&ipa_smp2p_out 1>;
qcom,smem-state-names = "ipa-clock-enabled-valid",
"ipa-clock-enabled";
status = "disabled";
};
remoteproc_mpss: remoteproc@4080000 {
compatible = "qcom,sm8650-mpss-pas";
reg = <0 0x04080000 0 0x4040>;