arm64: dts: qcom: sm8650: add IPA information
Add IPA-related nodes and definitions to SM8650 dtsi, which uses IPA v5.5.1 a minor revision of v5.5 found in the SM8550 SoC. Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20231201-topic-sm8650-upstream-ipa-v1-1-7e8cf7200cd2@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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@ -2558,6 +2558,45 @@
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#power-domain-cells = <1>;
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};
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ipa: ipa@3f40000 {
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compatible = "qcom,sm8650-ipa", "qcom,sm8550-ipa";
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iommus = <&apps_smmu 0x4a0 0x0>,
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<&apps_smmu 0x4a2 0x0>;
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reg = <0 0x3f40000 0 0x10000>,
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<0 0x3f50000 0 0x5000>,
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<0 0x3e04000 0 0xfc000>;
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reg-names = "ipa-reg",
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"ipa-shared",
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"gsi";
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interrupts-extended = <&intc GIC_SPI 654 IRQ_TYPE_EDGE_RISING>,
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<&intc GIC_SPI 432 IRQ_TYPE_LEVEL_HIGH>,
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<&ipa_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
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<&ipa_smp2p_in 1 IRQ_TYPE_EDGE_RISING>;
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interrupt-names = "ipa",
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"gsi",
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"ipa-clock-query",
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"ipa-setup-ready";
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clocks = <&rpmhcc RPMH_IPA_CLK>;
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clock-names = "core";
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interconnects = <&aggre2_noc MASTER_IPA 0 &mc_virt SLAVE_EBI1 0>,
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<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_IPA_CFG 0>;
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interconnect-names = "memory",
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"config";
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qcom,qmp = <&aoss_qmp>;
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qcom,smem-states = <&ipa_smp2p_out 0>,
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<&ipa_smp2p_out 1>;
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qcom,smem-state-names = "ipa-clock-enabled-valid",
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"ipa-clock-enabled";
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status = "disabled";
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};
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remoteproc_mpss: remoteproc@4080000 {
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compatible = "qcom,sm8650-mpss-pas";
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reg = <0 0x04080000 0 0x4040>;
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