Merge branch 'dt-bindinga-dwmac'
Joakim Zhang says: ==================== dt-bindings: net: dwmac-imx: convert This patch set intends to convert imx dwmac binding to schema, and fixes found by dt_binding_check and dtbs_check. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
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IMX8 glue layer controller, NXP imx8 families support Synopsys MAC 5.10a IP.
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This file documents platform glue layer for IMX.
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Please see stmmac.txt for the other unchanged properties.
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The device node has following properties.
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Required properties:
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- compatible: Should be "nxp,imx8mp-dwmac-eqos" to select glue layer
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and "snps,dwmac-5.10a" to select IP version.
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- clocks: Must contain a phandle for each entry in clock-names.
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- clock-names: Should be "stmmaceth" for the host clock.
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Should be "pclk" for the MAC apb clock.
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Should be "ptp_ref" for the MAC timer clock.
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Should be "tx" for the MAC RGMII TX clock:
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Should be "mem" for EQOS MEM clock.
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- "mem" clock is required for imx8dxl platform.
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- "mem" clock is not required for imx8mp platform.
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- interrupt-names: Should contain a list of interrupt names corresponding to
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the interrupts in the interrupts property, if available.
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Should be "macirq" for the main MAC IRQ
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Should be "eth_wake_irq" for the IT which wake up system
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- intf_mode: Should be phandle/offset pair. The phandle to the syscon node which
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encompases the GPR register, and the offset of the GPR register.
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- required for imx8mp platform.
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- is optional for imx8dxl platform.
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Optional properties:
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- intf_mode: is optional for imx8dxl platform.
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- snps,rmii_refclk_ext: to select RMII reference clock from external.
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Example:
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eqos: ethernet@30bf0000 {
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compatible = "nxp,imx8mp-dwmac-eqos", "snps,dwmac-5.10a";
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reg = <0x30bf0000 0x10000>;
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interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "eth_wake_irq", "macirq";
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clocks = <&clk IMX8MP_CLK_ENET_QOS_ROOT>,
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<&clk IMX8MP_CLK_QOS_ENET_ROOT>,
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<&clk IMX8MP_CLK_ENET_QOS_TIMER>,
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<&clk IMX8MP_CLK_ENET_QOS>;
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clock-names = "stmmaceth", "pclk", "ptp_ref", "tx";
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assigned-clocks = <&clk IMX8MP_CLK_ENET_AXI>,
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<&clk IMX8MP_CLK_ENET_QOS_TIMER>,
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<&clk IMX8MP_CLK_ENET_QOS>;
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assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_266M>,
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<&clk IMX8MP_SYS_PLL2_100M>,
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<&clk IMX8MP_SYS_PLL2_125M>;
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assigned-clock-rates = <0>, <100000000>, <125000000>;
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nvmem-cells = <ð_mac0>;
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nvmem-cell-names = "mac-address";
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nvmem_macaddr_swap;
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intf_mode = <&gpr 0x4>;
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status = "disabled";
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};
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93
Documentation/devicetree/bindings/net/nxp,dwmac-imx.yaml
Normal file
93
Documentation/devicetree/bindings/net/nxp,dwmac-imx.yaml
Normal file
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/net/nxp,dwmac-imx.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: NXP i.MX8 DWMAC glue layer Device Tree Bindings
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maintainers:
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- Joakim Zhang <qiangqing.zhang@nxp.com>
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# We need a select here so we don't match all nodes with 'snps,dwmac'
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select:
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properties:
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compatible:
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contains:
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enum:
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- nxp,imx8mp-dwmac-eqos
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- nxp,imx8dxl-dwmac-eqos
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required:
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- compatible
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allOf:
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- $ref: "snps,dwmac.yaml#"
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properties:
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compatible:
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oneOf:
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- items:
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- enum:
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- nxp,imx8mp-dwmac-eqos
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- nxp,imx8dxl-dwmac-eqos
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- const: snps,dwmac-5.10a
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clocks:
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minItems: 3
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maxItems: 5
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items:
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- description: MAC host clock
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- description: MAC apb clock
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- description: MAC timer clock
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- description: MAC RGMII TX clock
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- description: EQOS MEM clock
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clock-names:
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minItems: 3
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maxItems: 5
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contains:
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enum:
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- stmmaceth
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- pclk
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- ptp_ref
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- tx
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- mem
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intf_mode:
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$ref: /schemas/types.yaml#/definitions/phandle-array
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description:
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Should be phandle/offset pair. The phandle to the syscon node which
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encompases the GPR register, and the offset of the GPR register.
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snps,rmii_refclk_ext:
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$ref: /schemas/types.yaml#/definitions/flag
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description:
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To select RMII reference clock from external.
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required:
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- compatible
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- clocks
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- clock-names
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/clock/imx8mp-clock.h>
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eqos: ethernet@30bf0000 {
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compatible = "nxp,imx8mp-dwmac-eqos","snps,dwmac-5.10a";
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reg = <0x30bf0000 0x10000>;
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interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "macirq", "eth_wake_irq";
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clocks = <&clk IMX8MP_CLK_ENET_QOS_ROOT>,
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<&clk IMX8MP_CLK_QOS_ENET_ROOT>,
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<&clk IMX8MP_CLK_ENET_QOS_TIMER>,
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<&clk IMX8MP_CLK_ENET_QOS>;
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clock-names = "stmmaceth", "pclk", "ptp_ref", "tx";
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phy-mode = "rgmii";
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status = "disabled";
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};
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@ -28,6 +28,7 @@ select:
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- snps,dwmac-4.00
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- snps,dwmac-4.10a
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- snps,dwmac-4.20a
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- snps,dwmac-5.10a
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- snps,dwxgmac
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- snps,dwxgmac-2.10
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@ -82,6 +83,7 @@ properties:
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- snps,dwmac-4.00
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- snps,dwmac-4.10a
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- snps,dwmac-4.20a
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- snps,dwmac-5.10a
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- snps,dwxgmac
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- snps,dwxgmac-2.10
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@ -375,6 +377,7 @@ allOf:
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- snps,dwmac-4.00
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- snps,dwmac-4.10a
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- snps,dwmac-4.20a
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- snps,dwmac-5.10a
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- snps,dwxgmac
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- snps,dwxgmac-2.10
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- st,spear600-gmac
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eqos: ethernet@30bf0000 {
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compatible = "nxp,imx8mp-dwmac-eqos", "snps,dwmac-5.10a";
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reg = <0x30bf0000 0x10000>;
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interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "eth_wake_irq", "macirq";
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interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "macirq", "eth_wake_irq";
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clocks = <&clk IMX8MP_CLK_ENET_QOS_ROOT>,
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<&clk IMX8MP_CLK_QOS_ENET_ROOT>,
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<&clk IMX8MP_CLK_ENET_QOS_TIMER>,
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