powerpc/mm: Don't be too strict with _etext alignment on PPC32
Similar to PPC64, accept to map RO data as ROX as a trade off between between security and memory usage. Having RO data executable is not a high risk as RO data can't be modified to forge an exploit. Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/8c4a0d89d944eed984dd941e509614031a5ace2b.1589866984.git.christophe.leroy@csgroup.eu
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@ -778,32 +778,6 @@ config THREAD_SHIFT
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Used to define the stack size. The default is almost always what you
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want. Only change this if you know what you are doing.
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config ETEXT_SHIFT_BOOL
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bool "Set custom etext alignment" if STRICT_KERNEL_RWX && \
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(PPC_BOOK3S_32 || PPC_8xx)
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depends on ADVANCED_OPTIONS
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help
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This option allows you to set the kernel end of text alignment. When
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RAM is mapped by blocks, the alignment needs to fit the size and
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number of possible blocks. The default should be OK for most configs.
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Say N here unless you know what you are doing.
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config ETEXT_SHIFT
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int "_etext shift" if ETEXT_SHIFT_BOOL
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range 17 28 if STRICT_KERNEL_RWX && PPC_BOOK3S_32
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range 19 23 if STRICT_KERNEL_RWX && PPC_8xx
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default 17 if STRICT_KERNEL_RWX && PPC_BOOK3S_32
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default 19 if STRICT_KERNEL_RWX && PPC_8xx
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default PPC_PAGE_SHIFT
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help
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On Book3S 32 (603+), IBATs are used to map kernel text.
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Smaller is the alignment, greater is the number of necessary IBATs.
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On 8xx, large pages (512kb or 8M) are used to map kernel linear
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memory. Aligning to 8M reduces TLB misses as only 8M pages are used
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in that case.
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config DATA_SHIFT_BOOL
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bool "Set custom data alignment" if STRICT_KERNEL_RWX && \
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(PPC_BOOK3S_32 || PPC_8xx)
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@ -15,7 +15,6 @@
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#include <asm/thread_info.h>
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#define STRICT_ALIGN_SIZE (1 << CONFIG_DATA_SHIFT)
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#define ETEXT_ALIGN_SIZE (1 << CONFIG_ETEXT_SHIFT)
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ENTRY(_stext)
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@ -116,7 +115,7 @@ SECTIONS
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} :text
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. = ALIGN(ETEXT_ALIGN_SIZE);
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. = ALIGN(PAGE_SIZE);
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_etext = .;
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PROVIDE32 (etext = .);
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