From 362922a1a5345d17a9d4ad7e3f848aa4fdf79d75 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Tue, 1 Sep 2015 16:30:12 +0200 Subject: [PATCH 01/23] reset: Add renesas,rst DT bindings Add DT bindings for the Renesas R-Car Reset Controller (R-Car Gen1 RESET/WDT and R-Car Gen2/Gen3 and RZ/G RST). As the features provided by the hardware module differ a lot across the various SoC families and members, only SoC-specific compatible values are defined. For now we use the RST only for providing access to the state of the mode pins, which is needed by the clock driver. Signed-off-by: Geert Uytterhoeven Acked-by: Magnus Damm Acked-by: Dirk Behme Acked-by: Laurent Pinchart Acked-by: Philipp Zabel Acked-by: Rob Herring --- .../devicetree/bindings/reset/renesas,rst.txt | 37 +++++++++++++++++++ 1 file changed, 37 insertions(+) create mode 100644 Documentation/devicetree/bindings/reset/renesas,rst.txt diff --git a/Documentation/devicetree/bindings/reset/renesas,rst.txt b/Documentation/devicetree/bindings/reset/renesas,rst.txt new file mode 100644 index 000000000000..fe5e0f37b3c9 --- /dev/null +++ b/Documentation/devicetree/bindings/reset/renesas,rst.txt @@ -0,0 +1,37 @@ +DT bindings for the Renesas R-Car and RZ/G Reset Controllers + +The R-Car and RZ/G Reset Controllers provide reset control, and implement the +following functions: + - Latching of the levels on mode pins when PRESET# is negated, + - Mode monitoring register, + - Reset control of peripheral devices (on R-Car Gen1), + - Watchdog timer (on R-Car Gen1), + - Register-based reset control and boot address registers for the various CPU + cores (on R-Car Gen2 and Gen3, and on RZ/G). + + +Required properties: + - compatible: Should be + - "renesas,-reset-wdt" for R-Car Gen1, + - "renesas,-rst" for R-Car Gen2 and Gen3, and RZ/G + Examples with soctypes are: + - "renesas,r8a7743-rst" (RZ/G1M) + - "renesas,r8a7745-rst" (RZ/G1E) + - "renesas,r8a7778-reset-wdt" (R-Car M1A) + - "renesas,r8a7779-reset-wdt" (R-Car H1) + - "renesas,r8a7790-rst" (R-Car H2) + - "renesas,r8a7791-rst" (R-Car M2-W) + - "renesas,r8a7792-rst" (R-Car V2H + - "renesas,r8a7793-rst" (R-Car M2-N) + - "renesas,r8a7794-rst" (R-Car E2) + - "renesas,r8a7795-rst" (R-Car H3) + - "renesas,r8a7796-rst" (R-Car M3-W) + - reg: Address start and address range for the device. + + +Example: + + rst: reset-controller@e6160000 { + compatible = "renesas,r8a7795-rst"; + reg = <0 0xe6160000 0 0x0200>; + }; From 527c02f66d263d2eeff237a2326c3278cfc03d3b Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Fri, 27 May 2016 11:56:53 +0200 Subject: [PATCH 02/23] soc: renesas: Add R-Car RST driver Add a driver for the Renesas R-Car Gen1 RESET/WDT and R-Car Gen2/Gen3 and RZ/G RST module. For now this driver just provides an API to obtain the state of the mode pins, as latched at reset time. As this is typically called from the probe function of a clock driver, which can run much earlier than any initcall, calling rcar_rst_read_mode_pins() just forces an early initialization of the driver. Despite the current simple and almost identical handling for all supported SoCs, the driver matches against SoC-specific compatible values, as the features provided by the hardware module differ a lot across the various SoC families and members. Signed-off-by: Geert Uytterhoeven Acked-by: Dirk Behme --- drivers/soc/renesas/Makefile | 5 ++ drivers/soc/renesas/rcar-rst.c | 92 ++++++++++++++++++++++++++++ include/linux/soc/renesas/rcar-rst.h | 6 ++ 3 files changed, 103 insertions(+) create mode 100644 drivers/soc/renesas/rcar-rst.c create mode 100644 include/linux/soc/renesas/rcar-rst.h diff --git a/drivers/soc/renesas/Makefile b/drivers/soc/renesas/Makefile index 623039c3514c..86cc78cd1962 100644 --- a/drivers/soc/renesas/Makefile +++ b/drivers/soc/renesas/Makefile @@ -1,3 +1,8 @@ +obj-$(CONFIG_ARCH_RCAR_GEN1) += rcar-rst.o +obj-$(CONFIG_ARCH_RCAR_GEN2) += rcar-rst.o +obj-$(CONFIG_ARCH_R8A7795) += rcar-rst.o +obj-$(CONFIG_ARCH_R8A7796) += rcar-rst.o + obj-$(CONFIG_ARCH_R8A7779) += rcar-sysc.o r8a7779-sysc.o obj-$(CONFIG_ARCH_R8A7790) += rcar-sysc.o r8a7790-sysc.o obj-$(CONFIG_ARCH_R8A7791) += rcar-sysc.o r8a7791-sysc.o diff --git a/drivers/soc/renesas/rcar-rst.c b/drivers/soc/renesas/rcar-rst.c new file mode 100644 index 000000000000..a6d1c26d3167 --- /dev/null +++ b/drivers/soc/renesas/rcar-rst.c @@ -0,0 +1,92 @@ +/* + * R-Car Gen1 RESET/WDT, R-Car Gen2, Gen3, and RZ/G RST Driver + * + * Copyright (C) 2016 Glider bvba + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ + +#include +#include +#include +#include + +struct rst_config { + unsigned int modemr; /* Mode Monitoring Register Offset */ +}; + +static const struct rst_config rcar_rst_gen1 __initconst = { + .modemr = 0x20, +}; + +static const struct rst_config rcar_rst_gen2 __initconst = { + .modemr = 0x60, +}; + +static const struct of_device_id rcar_rst_matches[] __initconst = { + /* RZ/G is handled like R-Car Gen2 */ + { .compatible = "renesas,r8a7743-rst", .data = &rcar_rst_gen2 }, + { .compatible = "renesas,r8a7745-rst", .data = &rcar_rst_gen2 }, + /* R-Car Gen1 */ + { .compatible = "renesas,r8a7778-reset-wdt", .data = &rcar_rst_gen1 }, + { .compatible = "renesas,r8a7779-reset-wdt", .data = &rcar_rst_gen1 }, + /* R-Car Gen2 */ + { .compatible = "renesas,r8a7790-rst", .data = &rcar_rst_gen2 }, + { .compatible = "renesas,r8a7791-rst", .data = &rcar_rst_gen2 }, + { .compatible = "renesas,r8a7792-rst", .data = &rcar_rst_gen2 }, + { .compatible = "renesas,r8a7793-rst", .data = &rcar_rst_gen2 }, + { .compatible = "renesas,r8a7794-rst", .data = &rcar_rst_gen2 }, + /* R-Car Gen3 is handled like R-Car Gen2 */ + { .compatible = "renesas,r8a7795-rst", .data = &rcar_rst_gen2 }, + { .compatible = "renesas,r8a7796-rst", .data = &rcar_rst_gen2 }, + { /* sentinel */ } +}; + +static void __iomem *rcar_rst_base __initdata; +static u32 saved_mode __initdata; + +static int __init rcar_rst_init(void) +{ + const struct of_device_id *match; + const struct rst_config *cfg; + struct device_node *np; + void __iomem *base; + int error = 0; + + np = of_find_matching_node_and_match(NULL, rcar_rst_matches, &match); + if (!np) + return -ENODEV; + + base = of_iomap(np, 0); + if (!base) { + pr_warn("%s: Cannot map regs\n", np->full_name); + error = -ENOMEM; + goto out_put; + } + + rcar_rst_base = base; + cfg = match->data; + saved_mode = ioread32(base + cfg->modemr); + + pr_debug("%s: MODE = 0x%08x\n", np->full_name, saved_mode); + +out_put: + of_node_put(np); + return error; +} + +int __init rcar_rst_read_mode_pins(u32 *mode) +{ + int error; + + if (!rcar_rst_base) { + error = rcar_rst_init(); + if (error) + return error; + } + + *mode = saved_mode; + return 0; +} diff --git a/include/linux/soc/renesas/rcar-rst.h b/include/linux/soc/renesas/rcar-rst.h new file mode 100644 index 000000000000..a18e0783946b --- /dev/null +++ b/include/linux/soc/renesas/rcar-rst.h @@ -0,0 +1,6 @@ +#ifndef __LINUX_SOC_RENESAS_RCAR_RST_H__ +#define __LINUX_SOC_RENESAS_RCAR_RST_H__ + +int rcar_rst_read_mode_pins(u32 *mode); + +#endif /* __LINUX_SOC_RENESAS_RCAR_RST_H__ */ From e2eb35e03af7c884bf4373802a28a59aa63070b8 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Wed, 1 Jun 2016 13:46:16 +0200 Subject: [PATCH 03/23] ARM: dts: r8a7778: Add device node for RESET/WDT module Add a device node for the RESET/WDT module, which provides a.o. reset control, mode pin monitoring, and watchdog control. Signed-off-by: Geert Uytterhoeven Acked-by: Dirk Behme --- arch/arm/boot/dts/r8a7778.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm/boot/dts/r8a7778.dtsi b/arch/arm/boot/dts/r8a7778.dtsi index e571d66ea0fe..3d0a18abd408 100644 --- a/arch/arm/boot/dts/r8a7778.dtsi +++ b/arch/arm/boot/dts/r8a7778.dtsi @@ -626,4 +626,9 @@ "sru-src6", "sru-src7", "sru-src8"; }; }; + + rst: reset-controller@ffcc0000 { + compatible = "renesas,r8a7778-reset-wdt"; + reg = <0xffcc0000 0x40>; + }; }; From ad40150ab896455efa3677ebb9b469801c3f7214 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Wed, 1 Jun 2016 13:47:30 +0200 Subject: [PATCH 04/23] ARM: dts: r8a7779: Add device node for RESET/WDT module Add a device node for the RESET/WDT module, which provides a.o. reset control, mode pin monitoring, and watchdog control. Signed-off-by: Geert Uytterhoeven Acked-by: Dirk Behme --- arch/arm/boot/dts/r8a7779.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm/boot/dts/r8a7779.dtsi b/arch/arm/boot/dts/r8a7779.dtsi index b9bbcce69dfb..8cf16008a09b 100644 --- a/arch/arm/boot/dts/r8a7779.dtsi +++ b/arch/arm/boot/dts/r8a7779.dtsi @@ -590,6 +590,11 @@ }; }; + rst: reset-controller@ffcc0000 { + compatible = "renesas,r8a7779-reset-wdt"; + reg = <0xffcc0000 0x48>; + }; + sysc: system-controller@ffd85000 { compatible = "renesas,r8a7779-sysc"; reg = <0xffd85000 0x0200>; From dd2b267bae0461e08a76fb6f6b27664cfa5b9520 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Fri, 12 Jun 2015 10:08:25 +0200 Subject: [PATCH 05/23] ARM: dts: r8a7790: Add device node for RST module Add a device node for the RST module, which provides a.o. reset control and mode pin monitoring. Signed-off-by: Geert Uytterhoeven Acked-by: Dirk Behme --- arch/arm/boot/dts/r8a7790.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi index 351fcc2f87df..3f10b0bf1b08 100644 --- a/arch/arm/boot/dts/r8a7790.dtsi +++ b/arch/arm/boot/dts/r8a7790.dtsi @@ -1471,6 +1471,11 @@ }; }; + rst: reset-controller@e6160000 { + compatible = "renesas,r8a7790-rst"; + reg = <0 0xe6160000 0 0x0100>; + }; + sysc: system-controller@e6180000 { compatible = "renesas,r8a7790-sysc"; reg = <0 0xe6180000 0 0x0200>; From 1fd27b80b60d5fabe22abdcb464968c37ea3a366 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Fri, 12 Jun 2015 10:08:25 +0200 Subject: [PATCH 06/23] ARM: dts: r8a7791: Add device node for RST module Add a device node for the RST module, which provides a.o. reset control and mode pin monitoring. Signed-off-by: Geert Uytterhoeven Acked-by: Dirk Behme --- arch/arm/boot/dts/r8a7791.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi index 162b55c665a3..c465c79bcca6 100644 --- a/arch/arm/boot/dts/r8a7791.dtsi +++ b/arch/arm/boot/dts/r8a7791.dtsi @@ -1482,6 +1482,11 @@ }; }; + rst: reset-controller@e6160000 { + compatible = "renesas,r8a7791-rst"; + reg = <0 0xe6160000 0 0x0100>; + }; + sysc: system-controller@e6180000 { compatible = "renesas,r8a7791-sysc"; reg = <0 0xe6180000 0 0x0200>; From d6f78ec4521bc195b76ff7a54f19a712ba6ecdbc Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Fri, 21 Oct 2016 12:13:33 +0200 Subject: [PATCH 07/23] ARM: dts: r8a7792: Add device node for RST module Add a device node for the RST module, which provides a.o. reset control and mode pin monitoring. Signed-off-by: Geert Uytterhoeven --- arch/arm/boot/dts/r8a7792.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm/boot/dts/r8a7792.dtsi b/arch/arm/boot/dts/r8a7792.dtsi index 713141d38b3e..6e1f61f65d29 100644 --- a/arch/arm/boot/dts/r8a7792.dtsi +++ b/arch/arm/boot/dts/r8a7792.dtsi @@ -118,6 +118,11 @@ IRQ_TYPE_LEVEL_LOW)>; }; + rst: reset-controller@e6160000 { + compatible = "renesas,r8a7792-rst"; + reg = <0 0xe6160000 0 0x0100>; + }; + sysc: system-controller@e6180000 { compatible = "renesas,r8a7792-sysc"; reg = <0 0xe6180000 0 0x0200>; From eb2d2723d51ed29f706c5a0a2c46ebdbd5baa3bd Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Fri, 12 Jun 2015 10:08:25 +0200 Subject: [PATCH 08/23] ARM: dts: r8a7793: Add device node for RST module Add a device node for the RST module, which provides a.o. reset control and mode pin monitoring. Signed-off-by: Geert Uytterhoeven Acked-by: Dirk Behme --- arch/arm/boot/dts/r8a7793.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm/boot/dts/r8a7793.dtsi b/arch/arm/boot/dts/r8a7793.dtsi index 8d02aacf2892..e4b385eccf74 100644 --- a/arch/arm/boot/dts/r8a7793.dtsi +++ b/arch/arm/boot/dts/r8a7793.dtsi @@ -1279,6 +1279,11 @@ }; }; + rst: reset-controller@e6160000 { + compatible = "renesas,r8a7793-rst"; + reg = <0 0xe6160000 0 0x0100>; + }; + sysc: system-controller@e6180000 { compatible = "renesas,r8a7793-sysc"; reg = <0 0xe6180000 0 0x0200>; From 46edf183af72fdb64daf81bcee05f091a9255c0c Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Fri, 12 Jun 2015 10:08:25 +0200 Subject: [PATCH 09/23] ARM: dts: r8a7794: Add device node for RST module Add a device node for the RST module, which provides a.o. reset control and mode pin monitoring. Signed-off-by: Geert Uytterhoeven Acked-by: Dirk Behme --- arch/arm/boot/dts/r8a7794.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi index 9365580a194f..69e4f4fad89b 100644 --- a/arch/arm/boot/dts/r8a7794.dtsi +++ b/arch/arm/boot/dts/r8a7794.dtsi @@ -1375,6 +1375,11 @@ }; }; + rst: reset-controller@e6160000 { + compatible = "renesas,r8a7794-rst"; + reg = <0 0xe6160000 0 0x0100>; + }; + sysc: system-controller@e6180000 { compatible = "renesas,r8a7794-sysc"; reg = <0 0xe6180000 0 0x0200>; From 6ddbb4cec2f426f92e4b1d764a2a4475d1a49475 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Tue, 1 Sep 2015 16:15:32 +0200 Subject: [PATCH 10/23] arm64: renesas: r8a7795 dtsi: Add device node for RST module Add a device node for the RST module, which provides a.o. reset control and mode pin monitoring. Signed-off-by: Geert Uytterhoeven Acked-by: Dirk Behme --- arch/arm64/boot/dts/renesas/r8a7795.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi index 8c15040f2540..625dda713548 100644 --- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi @@ -321,6 +321,11 @@ #power-domain-cells = <0>; }; + rst: reset-controller@e6160000 { + compatible = "renesas,r8a7795-rst"; + reg = <0 0xe6160000 0 0x0200>; + }; + sysc: system-controller@e6180000 { compatible = "renesas,r8a7795-sysc"; reg = <0 0xe6180000 0 0x0400>; From 65f922c78f9693c037905f00785033aefd97df47 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Fri, 27 May 2016 11:55:26 +0200 Subject: [PATCH 11/23] arm64: renesas: r8a7796 dtsi: Add device node for RST module Add a device node for the RST module, which provides a.o. reset control and mode pin monitoring. Signed-off-by: Geert Uytterhoeven Acked-by: Dirk Behme --- arch/arm64/boot/dts/renesas/r8a7796.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r8a7796.dtsi b/arch/arm64/boot/dts/renesas/r8a7796.dtsi index 9217da983525..75c8c55a8248 100644 --- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi @@ -233,6 +233,11 @@ #power-domain-cells = <0>; }; + rst: reset-controller@e6160000 { + compatible = "renesas,r8a7796-rst"; + reg = <0 0xe6160000 0 0x0200>; + }; + sysc: system-controller@e6180000 { compatible = "renesas,r8a7796-sysc"; reg = <0 0xe6180000 0 0x0400>; From 578d601cbc514b92bc9ed71fd4fb700180275211 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Wed, 1 Jun 2016 14:46:01 +0200 Subject: [PATCH 12/23] clk: renesas: r8a7778: Obtain mode pin values using R-Car RST driver Obtain the values of the mode pins from the R-Car RST driver, which relies on the presence in DT of a device node for the RESET/WDT module. Signed-off-by: Geert Uytterhoeven Acked-by: Dirk Behme --- drivers/clk/renesas/clk-r8a7778.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/drivers/clk/renesas/clk-r8a7778.c b/drivers/clk/renesas/clk-r8a7778.c index 40e3a501a50e..07ea411098a7 100644 --- a/drivers/clk/renesas/clk-r8a7778.c +++ b/drivers/clk/renesas/clk-r8a7778.c @@ -12,6 +12,7 @@ #include #include #include +#include struct r8a7778_cpg { struct clk_onecell_data data; @@ -83,6 +84,18 @@ static void __init r8a7778_cpg_clocks_init(struct device_node *np) struct clk **clks; unsigned int i; int num_clks; + u32 mode; + + if (rcar_rst_read_mode_pins(&mode)) + return; + + BUG_ON(!(mode & BIT(19))); + + cpg_mode_rates = (!!(mode & BIT(18)) << 2) | + (!!(mode & BIT(12)) << 1) | + (!!(mode & BIT(11))); + cpg_mode_divs = (!!(mode & BIT(2)) << 1) | + (!!(mode & BIT(1))); num_clks = of_property_count_strings(np, "clock-output-names"); if (num_clks < 0) { From 931db8a0c646e23f0c5a3e2175742997d7e60ff5 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Wed, 1 Jun 2016 14:49:41 +0200 Subject: [PATCH 13/23] clk: renesas: r8a7779: Obtain mode pin values from R-Car RST driver Obtain the values of the mode pins from the R-Car RST driver, which relies on the presence in DT of a device node for the RESET/WDT module. Signed-off-by: Geert Uytterhoeven Acked-by: Dirk Behme --- drivers/clk/renesas/clk-r8a7779.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/drivers/clk/renesas/clk-r8a7779.c b/drivers/clk/renesas/clk-r8a7779.c index cf2a37df03b1..ca7551bcb115 100644 --- a/drivers/clk/renesas/clk-r8a7779.c +++ b/drivers/clk/renesas/clk-r8a7779.c @@ -18,6 +18,7 @@ #include #include #include +#include #include @@ -127,6 +128,10 @@ static void __init r8a7779_cpg_clocks_init(struct device_node *np) struct clk **clks; unsigned int i, plla_mult; int num_clks; + u32 mode; + + if (rcar_rst_read_mode_pins(&mode)) + return; num_clks = of_property_count_strings(np, "clock-output-names"); if (num_clks < 0) { @@ -148,8 +153,8 @@ static void __init r8a7779_cpg_clocks_init(struct device_node *np) cpg->data.clks = clks; cpg->data.clk_num = num_clks; - config = &cpg_clk_configs[CPG_CLK_CONFIG_INDEX(cpg_mode)]; - plla_mult = cpg_plla_mult[CPG_PLLA_MULT_INDEX(cpg_mode)]; + config = &cpg_clk_configs[CPG_CLK_CONFIG_INDEX(mode)]; + plla_mult = cpg_plla_mult[CPG_PLLA_MULT_INDEX(mode)]; for (i = 0; i < num_clks; ++i) { const char *name; From f84c9c3ca9770bd847cb361d67bd385499a20d37 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Tue, 7 Jul 2015 14:57:37 +0200 Subject: [PATCH 14/23] clk: renesas: rcar-gen2: Obtain mode pin values using RST driver Obtain the values of the mode pins from the R-Car RST driver, which relies on the presence in DT of a device node for the RST module. Fall back to our own private copy of rcar_gen2_read_mode_pins() for backward-compatibility with old DTs. Signed-off-by: Geert Uytterhoeven Acked-by: Dirk Behme --- drivers/clk/renesas/clk-rcar-gen2.c | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+) diff --git a/drivers/clk/renesas/clk-rcar-gen2.c b/drivers/clk/renesas/clk-rcar-gen2.c index 00e6aba4b9c0..3291fd430ad4 100644 --- a/drivers/clk/renesas/clk-rcar-gen2.c +++ b/drivers/clk/renesas/clk-rcar-gen2.c @@ -19,6 +19,7 @@ #include #include #include +#include struct rcar_gen2_cpg { struct clk_onecell_data data; @@ -364,6 +365,23 @@ rcar_gen2_cpg_register_clock(struct device_node *np, struct rcar_gen2_cpg *cpg, 4, 0, table, &cpg->lock); } +/* + * Reset register definitions. + */ +#define MODEMR 0xe6160060 + +static u32 __init rcar_gen2_read_mode_pins(void) +{ + void __iomem *modemr = ioremap_nocache(MODEMR, 4); + u32 mode; + + BUG_ON(!modemr); + mode = ioread32(modemr); + iounmap(modemr); + + return mode; +} + static void __init rcar_gen2_cpg_clocks_init(struct device_node *np) { const struct cpg_pll_config *config; @@ -372,6 +390,13 @@ static void __init rcar_gen2_cpg_clocks_init(struct device_node *np) unsigned int i; int num_clks; + if (rcar_rst_read_mode_pins(&cpg_mode)) { + /* Backward-compatibility with old DT */ + pr_warn("%s: failed to obtain mode pins from RST\n", + np->full_name); + cpg_mode = rcar_gen2_read_mode_pins(); + } + num_clks = of_property_count_strings(np, "clock-output-names"); if (num_clks < 0) { pr_err("%s: failed to count clocks\n", __func__); From 969921e0d2b5a582aa6a28cb2208273a2d5679d6 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Wed, 1 Jun 2016 14:54:10 +0200 Subject: [PATCH 15/23] clk: renesas: r8a7795: Obtain mode pin values from R-Car RST driver Obtain the values of the mode pins from the R-Car RST driver, which relies on the presence in DT of a device node for the RST module. Signed-off-by: Geert Uytterhoeven Acked-by: Dirk Behme Reviewed-by: Laurent Pinchart --- drivers/clk/renesas/r8a7795-cpg-mssr.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/drivers/clk/renesas/r8a7795-cpg-mssr.c b/drivers/clk/renesas/r8a7795-cpg-mssr.c index f255e451e8ca..726c3d7940b4 100644 --- a/drivers/clk/renesas/r8a7795-cpg-mssr.c +++ b/drivers/clk/renesas/r8a7795-cpg-mssr.c @@ -15,6 +15,7 @@ #include #include #include +#include #include @@ -311,7 +312,12 @@ static const struct rcar_gen3_cpg_pll_config cpg_pll_configs[16] __initconst = { static int __init r8a7795_cpg_mssr_init(struct device *dev) { const struct rcar_gen3_cpg_pll_config *cpg_pll_config; - u32 cpg_mode = rcar_gen3_read_mode_pins(); + u32 cpg_mode; + int error; + + error = rcar_rst_read_mode_pins(&cpg_mode); + if (error) + return error; cpg_pll_config = &cpg_pll_configs[CPG_PLL_CONFIG_INDEX(cpg_mode)]; if (!cpg_pll_config->extal_div) { From 05972d48d23927e9d4932a10c8c172ccee4b1a6d Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Wed, 1 Jun 2016 14:54:45 +0200 Subject: [PATCH 16/23] clk: renesas: r8a7796: Obtain mode pin values from R-Car RST driver Obtain the values of the mode pins from the R-Car RST driver, which relies on the presence in DT of a device node for the RST module. Signed-off-by: Geert Uytterhoeven Acked-by: Dirk Behme Reviewed-by: Laurent Pinchart --- drivers/clk/renesas/r8a7796-cpg-mssr.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/drivers/clk/renesas/r8a7796-cpg-mssr.c b/drivers/clk/renesas/r8a7796-cpg-mssr.c index eb347ed265f2..1c144b21869d 100644 --- a/drivers/clk/renesas/r8a7796-cpg-mssr.c +++ b/drivers/clk/renesas/r8a7796-cpg-mssr.c @@ -16,6 +16,7 @@ #include #include #include +#include #include @@ -190,7 +191,12 @@ static const struct rcar_gen3_cpg_pll_config cpg_pll_configs[16] __initconst = { static int __init r8a7796_cpg_mssr_init(struct device *dev) { const struct rcar_gen3_cpg_pll_config *cpg_pll_config; - u32 cpg_mode = rcar_gen3_read_mode_pins(); + u32 cpg_mode; + int error; + + error = rcar_rst_read_mode_pins(&cpg_mode); + if (error) + return error; cpg_pll_config = &cpg_pll_configs[CPG_PLL_CONFIG_INDEX(cpg_mode)]; if (!cpg_pll_config->extal_div) { From ddab5aed8ecd277bd34b6421736c882fdff2dfe1 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Wed, 1 Jun 2016 14:56:58 +0200 Subject: [PATCH 17/23] clk: renesas: rcar-gen3-cpg: Remove obsolete rcar_gen3_read_mode_pins() All R-Car Gen3 clock drivers now obtain the values of the mode pins from the R-Car RST driver. Signed-off-by: Geert Uytterhoeven Acked-by: Dirk Behme Reviewed-by: Laurent Pinchart --- drivers/clk/renesas/rcar-gen3-cpg.c | 17 ----------------- drivers/clk/renesas/rcar-gen3-cpg.h | 1 - 2 files changed, 18 deletions(-) diff --git a/drivers/clk/renesas/rcar-gen3-cpg.c b/drivers/clk/renesas/rcar-gen3-cpg.c index bb4f2f9a8c2f..9d76076da494 100644 --- a/drivers/clk/renesas/rcar-gen3-cpg.c +++ b/drivers/clk/renesas/rcar-gen3-cpg.c @@ -333,23 +333,6 @@ struct clk * __init rcar_gen3_cpg_clk_register(struct device *dev, __clk_get_name(parent), 0, mult, div); } -/* - * Reset register definitions. - */ -#define MODEMR 0xe6160060 - -u32 __init rcar_gen3_read_mode_pins(void) -{ - void __iomem *modemr = ioremap_nocache(MODEMR, 4); - u32 mode; - - BUG_ON(!modemr); - mode = ioread32(modemr); - iounmap(modemr); - - return mode; -} - int __init rcar_gen3_cpg_init(const struct rcar_gen3_cpg_pll_config *config, unsigned int clk_extalr) { diff --git a/drivers/clk/renesas/rcar-gen3-cpg.h b/drivers/clk/renesas/rcar-gen3-cpg.h index f699085147d1..f788f481dd42 100644 --- a/drivers/clk/renesas/rcar-gen3-cpg.h +++ b/drivers/clk/renesas/rcar-gen3-cpg.h @@ -33,7 +33,6 @@ struct rcar_gen3_cpg_pll_config { #define CPG_RCKCR 0x240 -u32 rcar_gen3_read_mode_pins(void); struct clk *rcar_gen3_cpg_clk_register(struct device *dev, const struct cpg_core_clk *core, const struct cpg_mssr_info *info, struct clk **clks, void __iomem *base); From f3519926babeb1872345810eacd14342458f4904 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Wed, 1 Jun 2016 15:16:57 +0200 Subject: [PATCH 18/23] ARM: shmobile: r8a7778: Stop passing mode pins state to clock driver Now the R-Car M1A CPG clock driver obtains the state of the mode pins from the R-Car RST driver, there's no longer a need to pass this state explicitly. Hence we can just remove the .init_time() callback, the generic ARM code will take care of calling of_clk_init(). Signed-off-by: Geert Uytterhoeven Acked-by: Dirk Behme --- arch/arm/mach-shmobile/setup-r8a7778.c | 15 --------------- 1 file changed, 15 deletions(-) diff --git a/arch/arm/mach-shmobile/setup-r8a7778.c b/arch/arm/mach-shmobile/setup-r8a7778.c index cf236db686a9..7fa4a0b5f654 100644 --- a/arch/arm/mach-shmobile/setup-r8a7778.c +++ b/arch/arm/mach-shmobile/setup-r8a7778.c @@ -15,7 +15,6 @@ * GNU General Public License for more details. */ -#include #include #include @@ -23,19 +22,6 @@ #include "common.h" -#define MODEMR 0xffcc0020 - -static void __init r8a7778_timer_init(void) -{ - u32 mode; - void __iomem *modemr = ioremap_nocache(MODEMR, 4); - - BUG_ON(!modemr); - mode = ioread32(modemr); - iounmap(modemr); - r8a7778_clocks_init(mode); -} - #define INT2SMSKCR0 0x82288 /* 0xfe782288 */ #define INT2SMSKCR1 0x8228c /* 0xfe78228c */ @@ -70,6 +56,5 @@ DT_MACHINE_START(R8A7778_DT, "Generic R8A7778 (Flattened Device Tree)") .init_early = shmobile_init_delay, .init_irq = r8a7778_init_irq_dt, .init_late = shmobile_init_late, - .init_time = r8a7778_timer_init, .dt_compat = r8a7778_compat_dt, MACHINE_END From eae339264fd46f6e8adf5c6ed2f454b0a115e90d Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Wed, 1 Jun 2016 15:21:14 +0200 Subject: [PATCH 19/23] ARM: shmobile: r8a7779: Stop passing mode pins state to clock driver Now the R-Car H1 CPG clock driver obtains the state of the mode pins from the R-Car RST driver, there's no longer a need to pass this state explicitly. Hence we can just remove the .init_time() callback, the generic ARM code will take care of calling of_clk_init() and clocksource_probe(). Signed-off-by: Geert Uytterhoeven Acked-by: Dirk Behme --- arch/arm/mach-shmobile/setup-r8a7779.c | 27 -------------------------- 1 file changed, 27 deletions(-) diff --git a/arch/arm/mach-shmobile/setup-r8a7779.c b/arch/arm/mach-shmobile/setup-r8a7779.c index 0007ff51d180..0686112f2435 100644 --- a/arch/arm/mach-shmobile/setup-r8a7779.c +++ b/arch/arm/mach-shmobile/setup-r8a7779.c @@ -14,8 +14,6 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. */ -#include -#include #include #include #include @@ -76,30 +74,6 @@ static void __init r8a7779_init_irq_dt(void) __raw_writel(0x003fee3f, INT2SMSKCR4); } -#define MODEMR 0xffcc0020 - -static u32 __init r8a7779_read_mode_pins(void) -{ - static u32 mode; - static bool mode_valid; - - if (!mode_valid) { - void __iomem *modemr = ioremap_nocache(MODEMR, PAGE_SIZE); - BUG_ON(!modemr); - mode = ioread32(modemr); - iounmap(modemr); - mode_valid = true; - } - - return mode; -} - -static void __init r8a7779_init_time(void) -{ - r8a7779_clocks_init(r8a7779_read_mode_pins()); - clocksource_probe(); -} - static const char *const r8a7779_compat_dt[] __initconst = { "renesas,r8a7779", NULL, @@ -109,7 +83,6 @@ DT_MACHINE_START(R8A7779_DT, "Generic R8A7779 (Flattened Device Tree)") .smp = smp_ops(r8a7779_smp_ops), .map_io = r8a7779_map_io, .init_early = shmobile_init_delay, - .init_time = r8a7779_init_time, .init_irq = r8a7779_init_irq_dt, .init_late = shmobile_init_late, .dt_compat = r8a7779_compat_dt, From 80951f04c3f925330104403ec90ee5a8bb5de763 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Tue, 7 Jul 2015 15:06:34 +0200 Subject: [PATCH 20/23] ARM: shmobile: rcar-gen2: Stop passing mode pins state to clock driver Now the R-Car Gen2 CPG clock driver obtains the state of the mode pins from the R-Car RST driver, there's no longer a need to pass this state explicitly. Hence we can just call of_clk_init() instead. Signed-off-by: Geert Uytterhoeven Acked-by: Dirk Behme --- arch/arm/mach-shmobile/setup-rcar-gen2.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/arch/arm/mach-shmobile/setup-rcar-gen2.c b/arch/arm/mach-shmobile/setup-rcar-gen2.c index afb9fdcd3d90..b527258e0a62 100644 --- a/arch/arm/mach-shmobile/setup-rcar-gen2.c +++ b/arch/arm/mach-shmobile/setup-rcar-gen2.c @@ -15,7 +15,7 @@ * GNU General Public License for more details. */ -#include +#include #include #include #include @@ -71,7 +71,6 @@ static unsigned int __init get_extal_freq(void) void __init rcar_gen2_timer_init(void) { - u32 mode = rcar_gen2_read_mode_pins(); #ifdef CONFIG_ARM_ARCH_TIMER void __iomem *base; u32 freq; @@ -130,7 +129,7 @@ void __init rcar_gen2_timer_init(void) iounmap(base); #endif /* CONFIG_ARM_ARCH_TIMER */ - rcar_gen2_clocks_init(mode); + of_clk_init(NULL); clocksource_probe(); } From 7978a78c828ac8d5351b85480e60ada865b9bea9 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Wed, 1 Jun 2016 15:23:22 +0200 Subject: [PATCH 21/23] clk: renesas: r8a7778: Remove obsolete r8a7778_clocks_init() The R-Car M1A board code no longer calls r8a7778_clocks_init(). Signed-off-by: Geert Uytterhoeven Acked-by: Dirk Behme --- drivers/clk/renesas/clk-r8a7778.c | 13 ------------- include/linux/clk/renesas.h | 1 - 2 files changed, 14 deletions(-) diff --git a/drivers/clk/renesas/clk-r8a7778.c b/drivers/clk/renesas/clk-r8a7778.c index 07ea411098a7..886a8380e912 100644 --- a/drivers/clk/renesas/clk-r8a7778.c +++ b/drivers/clk/renesas/clk-r8a7778.c @@ -143,16 +143,3 @@ static void __init r8a7778_cpg_clocks_init(struct device_node *np) CLK_OF_DECLARE(r8a7778_cpg_clks, "renesas,r8a7778-cpg-clocks", r8a7778_cpg_clocks_init); - -void __init r8a7778_clocks_init(u32 mode) -{ - BUG_ON(!(mode & BIT(19))); - - cpg_mode_rates = (!!(mode & BIT(18)) << 2) | - (!!(mode & BIT(12)) << 1) | - (!!(mode & BIT(11))); - cpg_mode_divs = (!!(mode & BIT(2)) << 1) | - (!!(mode & BIT(1))); - - of_clk_init(NULL); -} diff --git a/include/linux/clk/renesas.h b/include/linux/clk/renesas.h index ba6fa4148515..2b663bba1adc 100644 --- a/include/linux/clk/renesas.h +++ b/include/linux/clk/renesas.h @@ -20,7 +20,6 @@ struct device; struct device_node; struct generic_pm_domain; -void r8a7778_clocks_init(u32 mode); void r8a7779_clocks_init(u32 mode); void rcar_gen2_clocks_init(u32 mode); From b9fe9421d06653d735df07954730795d907e618d Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Wed, 1 Jun 2016 15:24:58 +0200 Subject: [PATCH 22/23] clk: renesas: r8a7779: Remove obsolete r8a7779_clocks_init() The R-Car H1 board code no longer calls r8a7779_clocks_init(). Signed-off-by: Geert Uytterhoeven Acked-by: Dirk Behme --- drivers/clk/renesas/clk-r8a7779.c | 9 --------- include/linux/clk/renesas.h | 1 - 2 files changed, 10 deletions(-) diff --git a/drivers/clk/renesas/clk-r8a7779.c b/drivers/clk/renesas/clk-r8a7779.c index ca7551bcb115..27fbfafaf2cd 100644 --- a/drivers/clk/renesas/clk-r8a7779.c +++ b/drivers/clk/renesas/clk-r8a7779.c @@ -89,8 +89,6 @@ static const unsigned int cpg_plla_mult[4] __initconst = { 42, 48, 56, 64 }; * Initialization */ -static u32 cpg_mode __initdata; - static struct clk * __init r8a7779_cpg_register_clock(struct device_node *np, struct r8a7779_cpg *cpg, const struct cpg_clk_config *config, @@ -178,10 +176,3 @@ static void __init r8a7779_cpg_clocks_init(struct device_node *np) } CLK_OF_DECLARE(r8a7779_cpg_clks, "renesas,r8a7779-cpg-clocks", r8a7779_cpg_clocks_init); - -void __init r8a7779_clocks_init(u32 mode) -{ - cpg_mode = mode; - - of_clk_init(NULL); -} diff --git a/include/linux/clk/renesas.h b/include/linux/clk/renesas.h index 2b663bba1adc..9e969941f3f6 100644 --- a/include/linux/clk/renesas.h +++ b/include/linux/clk/renesas.h @@ -20,7 +20,6 @@ struct device; struct device_node; struct generic_pm_domain; -void r8a7779_clocks_init(u32 mode); void rcar_gen2_clocks_init(u32 mode); void cpg_mstp_add_clk_domain(struct device_node *np); From 3e91d07bb592895982400002020d510fd7b6e85f Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Wed, 1 Jun 2016 15:26:53 +0200 Subject: [PATCH 23/23] clk: renesas: rcar-gen2: Remove obsolete rcar_gen2_clocks_init() The R-Car Gen2 board code no longer calls rcar_gen2_clocks_init(). Signed-off-by: Geert Uytterhoeven Acked-by: Dirk Behme --- drivers/clk/renesas/clk-rcar-gen2.c | 7 ------- include/linux/clk/renesas.h | 2 -- 2 files changed, 9 deletions(-) diff --git a/drivers/clk/renesas/clk-rcar-gen2.c b/drivers/clk/renesas/clk-rcar-gen2.c index 3291fd430ad4..f39519edc645 100644 --- a/drivers/clk/renesas/clk-rcar-gen2.c +++ b/drivers/clk/renesas/clk-rcar-gen2.c @@ -445,10 +445,3 @@ static void __init rcar_gen2_cpg_clocks_init(struct device_node *np) } CLK_OF_DECLARE(rcar_gen2_cpg_clks, "renesas,rcar-gen2-cpg-clocks", rcar_gen2_cpg_clocks_init); - -void __init rcar_gen2_clocks_init(u32 mode) -{ - cpg_mode = mode; - - of_clk_init(NULL); -} diff --git a/include/linux/clk/renesas.h b/include/linux/clk/renesas.h index 9e969941f3f6..9ebf1f8243bb 100644 --- a/include/linux/clk/renesas.h +++ b/include/linux/clk/renesas.h @@ -20,8 +20,6 @@ struct device; struct device_node; struct generic_pm_domain; -void rcar_gen2_clocks_init(u32 mode); - void cpg_mstp_add_clk_domain(struct device_node *np); #ifdef CONFIG_CLK_RENESAS_CPG_MSTP int cpg_mstp_attach_dev(struct generic_pm_domain *unused, struct device *dev);