Renesas Ethernet AVB PTP clock driver
Ethernet AVB device includes the gPTP timer, so we can implement a PTP clock driver. We're doing that in a separate file, with the main Ethernet driver calling the PTP driver's [de]initialization and interrupt handler functions. Unfortunately, the clock seems tightly coupled with the AVB-DMAC, so when that one leaves the operation mode, we have to unregister the PTP clock... :-( Based on the original patches by Masaru Nagai. Signed-off-by: Masaru Nagai <masaru.nagai.vx@renesas.com> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Sergei Shtylyov
David S. Miller
parent
c156633f13
commit
a0d2f20650
@ -3,4 +3,7 @@
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#
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obj-$(CONFIG_SH_ETH) += sh_eth.o
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ravb-objs := ravb_main.o ravb_ptp.o
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obj-$(CONFIG_RAVB) += ravb.o
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@ -20,6 +20,8 @@
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#include <linux/mdio-bitbang.h>
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#include <linux/netdevice.h>
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#include <linux/phy.h>
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#include <linux/platform_device.h>
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#include <linux/ptp_clock_kernel.h>
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#define BE_TX_RING_SIZE 64 /* TX ring size for Best Effort */
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#define BE_RX_RING_SIZE 1024 /* RX ring size for Best Effort */
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@ -744,6 +746,23 @@ struct ravb_tstamp_skb {
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u16 tag;
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};
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struct ravb_ptp_perout {
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u32 target;
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u32 period;
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};
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#define N_EXT_TS 1
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#define N_PER_OUT 1
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struct ravb_ptp {
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struct ptp_clock *clock;
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struct ptp_clock_info info;
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u32 default_addend;
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u32 current_addend;
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int extts[N_EXT_TS];
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struct ravb_ptp_perout perout[N_PER_OUT];
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};
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struct ravb_private {
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struct net_device *ndev;
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struct platform_device *pdev;
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@ -768,6 +787,7 @@ struct ravb_private {
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u32 tstamp_rx_ctrl;
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struct list_head ts_skb_list;
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u32 ts_skb_tag;
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struct ravb_ptp ptp;
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spinlock_t lock; /* Register access lock */
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u32 cur_rx[NUM_RX_QUEUE]; /* Consumer ring indices */
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u32 dirty_rx[NUM_RX_QUEUE]; /* Producer ring indices */
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@ -803,4 +823,10 @@ static inline void ravb_write(struct net_device *ndev, u32 data,
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iowrite32(data, priv->addr + reg);
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}
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int ravb_wait(struct net_device *ndev, enum ravb_reg reg, u32 mask, u32 value);
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irqreturn_t ravb_ptp_interrupt(struct net_device *ndev);
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void ravb_ptp_init(struct net_device *ndev, struct platform_device *pdev);
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void ravb_ptp_stop(struct net_device *ndev);
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#endif /* #ifndef __RAVB_H__ */
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@ -28,7 +28,6 @@
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#include <linux/of_irq.h>
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#include <linux/of_mdio.h>
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#include <linux/of_net.h>
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#include <linux/platform_device.h>
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#include <linux/pm_runtime.h>
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#include <linux/slab.h>
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#include <linux/spinlock.h>
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@ -41,8 +40,7 @@
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NETIF_MSG_RX_ERR | \
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NETIF_MSG_TX_ERR)
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static int ravb_wait(struct net_device *ndev, enum ravb_reg reg, u32 mask,
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u32 value)
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int ravb_wait(struct net_device *ndev, enum ravb_reg reg, u32 mask, u32 value)
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{
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int i;
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@ -763,6 +761,9 @@ static irqreturn_t ravb_interrupt(int irq, void *dev_id)
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result = IRQ_HANDLED;
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}
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if (iss & ISS_CGIS)
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result = ravb_ptp_interrupt(ndev);
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mmiowb();
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spin_unlock(&priv->lock);
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return result;
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@ -1103,6 +1104,8 @@ static int ravb_set_ringparam(struct net_device *ndev,
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if (netif_running(ndev)) {
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netif_device_detach(ndev);
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/* Stop PTP Clock driver */
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ravb_ptp_stop(ndev);
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/* Wait for DMA stopping */
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error = ravb_stop_dma(ndev);
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if (error) {
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@ -1132,6 +1135,9 @@ static int ravb_set_ringparam(struct net_device *ndev,
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ravb_emac_init(ndev);
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/* Initialise PTP Clock driver */
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ravb_ptp_init(ndev, priv->pdev);
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netif_device_attach(ndev);
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}
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@ -1141,6 +1147,8 @@ static int ravb_set_ringparam(struct net_device *ndev,
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static int ravb_get_ts_info(struct net_device *ndev,
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struct ethtool_ts_info *info)
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{
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struct ravb_private *priv = netdev_priv(ndev);
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info->so_timestamping =
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SOF_TIMESTAMPING_TX_SOFTWARE |
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SOF_TIMESTAMPING_RX_SOFTWARE |
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@ -1153,7 +1161,7 @@ static int ravb_get_ts_info(struct net_device *ndev,
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(1 << HWTSTAMP_FILTER_NONE) |
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(1 << HWTSTAMP_FILTER_PTP_V2_L2_EVENT) |
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(1 << HWTSTAMP_FILTER_ALL);
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info->phc_index = -1;
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info->phc_index = ptp_clock_index(priv->ptp.clock);
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return 0;
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}
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@ -1195,15 +1203,21 @@ static int ravb_open(struct net_device *ndev)
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goto out_free_irq;
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ravb_emac_init(ndev);
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/* Initialise PTP Clock driver */
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ravb_ptp_init(ndev, priv->pdev);
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netif_tx_start_all_queues(ndev);
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/* PHY control start */
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error = ravb_phy_start(ndev);
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if (error)
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goto out_free_irq;
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goto out_ptp_stop;
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return 0;
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out_ptp_stop:
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/* Stop PTP Clock driver */
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ravb_ptp_stop(ndev);
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out_free_irq:
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free_irq(ndev->irq, ndev);
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out_napi_off:
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@ -1235,6 +1249,9 @@ static void ravb_tx_timeout_work(struct work_struct *work)
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netif_tx_stop_all_queues(ndev);
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/* Stop PTP Clock driver */
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ravb_ptp_stop(ndev);
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/* Wait for DMA stopping */
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ravb_stop_dma(ndev);
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@ -1245,6 +1262,9 @@ static void ravb_tx_timeout_work(struct work_struct *work)
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ravb_dmac_init(ndev);
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ravb_emac_init(ndev);
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/* Initialise PTP Clock driver */
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ravb_ptp_init(ndev, priv->pdev);
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netif_tx_start_all_queues(ndev);
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}
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@ -1409,6 +1429,9 @@ static int ravb_close(struct net_device *ndev)
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ravb_write(ndev, 0, RIC2);
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ravb_write(ndev, 0, TIC);
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/* Stop PTP Clock driver */
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ravb_ptp_stop(ndev);
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/* Set the config mode to stop the AVB-DMAC's processes */
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if (ravb_stop_dma(ndev) < 0)
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netdev_err(ndev,
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357
drivers/net/ethernet/renesas/ravb_ptp.c
Normal file
357
drivers/net/ethernet/renesas/ravb_ptp.c
Normal file
@ -0,0 +1,357 @@
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/* PTP 1588 clock using the Renesas Ethernet AVB
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*
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* Copyright (C) 2013-2015 Renesas Electronics Corporation
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* Copyright (C) 2015 Renesas Solutions Corp.
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* Copyright (C) 2015 Cogent Embedded, Inc. <source@cogentembedded.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#include "ravb.h"
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static int ravb_ptp_tcr_request(struct ravb_private *priv, u32 request)
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{
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struct net_device *ndev = priv->ndev;
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int error;
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error = ravb_wait(ndev, GCCR, GCCR_TCR, GCCR_TCR_NOREQ);
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if (error)
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return error;
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ravb_write(ndev, ravb_read(ndev, GCCR) | request, GCCR);
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return ravb_wait(ndev, GCCR, GCCR_TCR, GCCR_TCR_NOREQ);
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}
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/* Caller must hold the lock */
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static int ravb_ptp_time_read(struct ravb_private *priv, struct timespec64 *ts)
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{
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struct net_device *ndev = priv->ndev;
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int error;
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error = ravb_ptp_tcr_request(priv, GCCR_TCR_CAPTURE);
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if (error)
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return error;
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ts->tv_nsec = ravb_read(ndev, GCT0);
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ts->tv_sec = ravb_read(ndev, GCT1) |
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((s64)ravb_read(ndev, GCT2) << 32);
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return 0;
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}
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/* Caller must hold the lock */
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static int ravb_ptp_time_write(struct ravb_private *priv,
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const struct timespec64 *ts)
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{
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struct net_device *ndev = priv->ndev;
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int error;
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u32 gccr;
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error = ravb_ptp_tcr_request(priv, GCCR_TCR_RESET);
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if (error)
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return error;
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gccr = ravb_read(ndev, GCCR);
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if (gccr & GCCR_LTO)
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return -EBUSY;
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ravb_write(ndev, ts->tv_nsec, GTO0);
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ravb_write(ndev, ts->tv_sec, GTO1);
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ravb_write(ndev, (ts->tv_sec >> 32) & 0xffff, GTO2);
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ravb_write(ndev, gccr | GCCR_LTO, GCCR);
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return 0;
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}
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/* Caller must hold the lock */
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static int ravb_ptp_update_compare(struct ravb_private *priv, u32 ns)
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{
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struct net_device *ndev = priv->ndev;
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/* When the comparison value (GPTC.PTCV) is in range of
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* [x-1 to x+1] (x is the configured increment value in
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* GTI.TIV), it may happen that a comparison match is
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* not detected when the timer wraps around.
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*/
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u32 gti_ns_plus_1 = (priv->ptp.current_addend >> 20) + 1;
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u32 gccr;
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if (ns < gti_ns_plus_1)
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ns = gti_ns_plus_1;
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else if (ns > 0 - gti_ns_plus_1)
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ns = 0 - gti_ns_plus_1;
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gccr = ravb_read(ndev, GCCR);
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if (gccr & GCCR_LPTC)
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return -EBUSY;
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ravb_write(ndev, ns, GPTC);
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ravb_write(ndev, gccr | GCCR_LPTC, GCCR);
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return 0;
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}
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/* PTP clock operations */
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static int ravb_ptp_adjfreq(struct ptp_clock_info *ptp, s32 ppb)
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{
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struct ravb_private *priv = container_of(ptp, struct ravb_private,
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ptp.info);
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struct net_device *ndev = priv->ndev;
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unsigned long flags;
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u32 diff, addend;
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bool neg_adj = false;
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u32 gccr;
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if (ppb < 0) {
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neg_adj = true;
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ppb = -ppb;
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}
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addend = priv->ptp.default_addend;
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diff = div_u64((u64)addend * ppb, NSEC_PER_SEC);
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addend = neg_adj ? addend - diff : addend + diff;
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spin_lock_irqsave(&priv->lock, flags);
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priv->ptp.current_addend = addend;
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gccr = ravb_read(ndev, GCCR);
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if (gccr & GCCR_LTI)
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return -EBUSY;
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ravb_write(ndev, addend & GTI_TIV, GTI);
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ravb_write(ndev, gccr | GCCR_LTI, GCCR);
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spin_unlock_irqrestore(&priv->lock, flags);
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return 0;
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}
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static int ravb_ptp_adjtime(struct ptp_clock_info *ptp, s64 delta)
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{
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struct ravb_private *priv = container_of(ptp, struct ravb_private,
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ptp.info);
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struct timespec64 ts;
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unsigned long flags;
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int error;
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spin_lock_irqsave(&priv->lock, flags);
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error = ravb_ptp_time_read(priv, &ts);
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if (!error) {
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u64 now = ktime_to_ns(timespec64_to_ktime(ts));
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ts = ns_to_timespec64(now + delta);
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error = ravb_ptp_time_write(priv, &ts);
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}
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spin_unlock_irqrestore(&priv->lock, flags);
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return error;
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}
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static int ravb_ptp_gettime64(struct ptp_clock_info *ptp, struct timespec64 *ts)
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{
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struct ravb_private *priv = container_of(ptp, struct ravb_private,
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ptp.info);
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unsigned long flags;
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int error;
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spin_lock_irqsave(&priv->lock, flags);
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error = ravb_ptp_time_read(priv, ts);
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spin_unlock_irqrestore(&priv->lock, flags);
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return error;
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}
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static int ravb_ptp_settime64(struct ptp_clock_info *ptp,
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const struct timespec64 *ts)
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{
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struct ravb_private *priv = container_of(ptp, struct ravb_private,
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ptp.info);
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unsigned long flags;
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int error;
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spin_lock_irqsave(&priv->lock, flags);
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error = ravb_ptp_time_write(priv, ts);
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spin_unlock_irqrestore(&priv->lock, flags);
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return error;
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}
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static int ravb_ptp_extts(struct ptp_clock_info *ptp,
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struct ptp_extts_request *req, int on)
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{
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struct ravb_private *priv = container_of(ptp, struct ravb_private,
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ptp.info);
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struct net_device *ndev = priv->ndev;
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unsigned long flags;
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u32 gic;
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if (req->index)
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return -EINVAL;
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if (priv->ptp.extts[req->index] == on)
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return 0;
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priv->ptp.extts[req->index] = on;
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spin_lock_irqsave(&priv->lock, flags);
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gic = ravb_read(ndev, GIC);
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if (on)
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gic |= GIC_PTCE;
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else
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gic &= ~GIC_PTCE;
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ravb_write(ndev, gic, GIC);
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mmiowb();
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spin_unlock_irqrestore(&priv->lock, flags);
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return 0;
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}
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static int ravb_ptp_perout(struct ptp_clock_info *ptp,
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struct ptp_perout_request *req, int on)
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{
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struct ravb_private *priv = container_of(ptp, struct ravb_private,
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ptp.info);
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struct net_device *ndev = priv->ndev;
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struct ravb_ptp_perout *perout;
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unsigned long flags;
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int error = 0;
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u32 gic;
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if (req->index)
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return -EINVAL;
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if (on) {
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u64 start_ns;
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u64 period_ns;
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start_ns = req->start.sec * NSEC_PER_SEC + req->start.nsec;
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period_ns = req->period.sec * NSEC_PER_SEC + req->period.nsec;
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if (start_ns > U32_MAX) {
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netdev_warn(ndev,
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"ptp: start value (nsec) is over limit. Maximum size of start is only 32 bits\n");
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return -ERANGE;
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}
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if (period_ns > U32_MAX) {
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netdev_warn(ndev,
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"ptp: period value (nsec) is over limit. Maximum size of period is only 32 bits\n");
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return -ERANGE;
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}
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spin_lock_irqsave(&priv->lock, flags);
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perout = &priv->ptp.perout[req->index];
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perout->target = (u32)start_ns;
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perout->period = (u32)period_ns;
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error = ravb_ptp_update_compare(priv, (u32)start_ns);
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if (!error) {
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/* Unmask interrupt */
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gic = ravb_read(ndev, GIC);
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gic |= GIC_PTME;
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ravb_write(ndev, gic, GIC);
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}
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} else {
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spin_lock_irqsave(&priv->lock, flags);
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perout = &priv->ptp.perout[req->index];
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perout->period = 0;
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/* Mask interrupt */
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gic = ravb_read(ndev, GIC);
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gic &= ~GIC_PTME;
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ravb_write(ndev, gic, GIC);
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}
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mmiowb();
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spin_unlock_irqrestore(&priv->lock, flags);
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return error;
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}
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static int ravb_ptp_enable(struct ptp_clock_info *ptp,
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struct ptp_clock_request *req, int on)
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{
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||||
switch (req->type) {
|
||||
case PTP_CLK_REQ_EXTTS:
|
||||
return ravb_ptp_extts(ptp, &req->extts, on);
|
||||
case PTP_CLK_REQ_PEROUT:
|
||||
return ravb_ptp_perout(ptp, &req->perout, on);
|
||||
default:
|
||||
return -EOPNOTSUPP;
|
||||
}
|
||||
}
|
||||
|
||||
static const struct ptp_clock_info ravb_ptp_info = {
|
||||
.owner = THIS_MODULE,
|
||||
.name = "ravb clock",
|
||||
.max_adj = 50000000,
|
||||
.n_ext_ts = N_EXT_TS,
|
||||
.n_per_out = N_PER_OUT,
|
||||
.adjfreq = ravb_ptp_adjfreq,
|
||||
.adjtime = ravb_ptp_adjtime,
|
||||
.gettime64 = ravb_ptp_gettime64,
|
||||
.settime64 = ravb_ptp_settime64,
|
||||
.enable = ravb_ptp_enable,
|
||||
};
|
||||
|
||||
/* Caller must hold the lock */
|
||||
irqreturn_t ravb_ptp_interrupt(struct net_device *ndev)
|
||||
{
|
||||
struct ravb_private *priv = netdev_priv(ndev);
|
||||
u32 gis = ravb_read(ndev, GIS);
|
||||
|
||||
gis &= ravb_read(ndev, GIC);
|
||||
if (gis & GIS_PTCF) {
|
||||
struct ptp_clock_event event;
|
||||
|
||||
event.type = PTP_CLOCK_EXTTS;
|
||||
event.index = 0;
|
||||
event.timestamp = ravb_read(ndev, GCPT);
|
||||
ptp_clock_event(priv->ptp.clock, &event);
|
||||
}
|
||||
if (gis & GIS_PTMF) {
|
||||
struct ravb_ptp_perout *perout = priv->ptp.perout;
|
||||
|
||||
if (perout->period) {
|
||||
perout->target += perout->period;
|
||||
ravb_ptp_update_compare(priv, perout->target);
|
||||
}
|
||||
}
|
||||
|
||||
if (gis) {
|
||||
ravb_write(ndev, ~gis, GIS);
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
|
||||
return IRQ_NONE;
|
||||
}
|
||||
|
||||
void ravb_ptp_init(struct net_device *ndev, struct platform_device *pdev)
|
||||
{
|
||||
struct ravb_private *priv = netdev_priv(ndev);
|
||||
unsigned long flags;
|
||||
u32 gccr;
|
||||
|
||||
priv->ptp.info = ravb_ptp_info;
|
||||
|
||||
priv->ptp.default_addend = ravb_read(ndev, GTI);
|
||||
priv->ptp.current_addend = priv->ptp.default_addend;
|
||||
|
||||
spin_lock_irqsave(&priv->lock, flags);
|
||||
ravb_wait(ndev, GCCR, GCCR_TCR, GCCR_TCR_NOREQ);
|
||||
gccr = ravb_read(ndev, GCCR) & ~GCCR_TCSS;
|
||||
ravb_write(ndev, gccr | GCCR_TCSS_ADJGPTP, GCCR);
|
||||
mmiowb();
|
||||
spin_unlock_irqrestore(&priv->lock, flags);
|
||||
|
||||
priv->ptp.clock = ptp_clock_register(&priv->ptp.info, &pdev->dev);
|
||||
}
|
||||
|
||||
void ravb_ptp_stop(struct net_device *ndev)
|
||||
{
|
||||
struct ravb_private *priv = netdev_priv(ndev);
|
||||
|
||||
ravb_write(ndev, 0, GIC);
|
||||
ravb_write(ndev, 0, GIS);
|
||||
|
||||
ptp_clock_unregister(priv->ptp.clock);
|
||||
}
|
||||
Loading…
Reference in New Issue
Block a user