sh, perf: Use common PMU interrupt disabled code
Transition to using the new generic PERF_PMU_CAP_NO_INTERRUPT method for failing a sampling event when no PMU interrupt is available. Signed-off-by: Vince Weaver <vincent.weaver@maine.edu> Signed-off-by: Peter Zijlstra <peterz@infradead.org> Cc: Arnaldo Carvalho de Melo <acme@kernel.org> Cc: Paul Mackerras <paulus@samba.org> Cc: linux-sh@vger.kernel.org Link: http://lkml.kernel.org/r/alpine.DEB.2.10.1406150205300.16738@vincent-weaver-1.umelst.maine.edu Signed-off-by: Ingo Molnar <mingo@kernel.org>
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@ -128,14 +128,6 @@ static int __hw_perf_event_init(struct perf_event *event)
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if (!sh_pmu_initialized())
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return -ENODEV;
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/*
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* All of the on-chip counters are "limited", in that they have
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* no interrupts, and are therefore unable to do sampling without
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* further work and timer assistance.
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*/
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if (hwc->sample_period)
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return -EINVAL;
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/*
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* See if we need to reserve the counter.
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*
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@ -392,6 +384,13 @@ int register_sh_pmu(struct sh_pmu *_pmu)
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pr_info("Performance Events: %s support registered\n", _pmu->name);
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/*
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* All of the on-chip counters are "limited", in that they have
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* no interrupts, and are therefore unable to do sampling without
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* further work and timer assistance.
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*/
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pmu.capabilities |= PERF_PMU_CAP_NO_INTERRUPT;
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WARN_ON(_pmu->num_events > MAX_HWEVENTS);
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perf_pmu_register(&pmu, "cpu", PERF_TYPE_RAW);
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