mlxsw: Add an indication of SMPE index validity for PGT table
In Spectrum-1, the index into the MPE table - called switch multicast to port egress VID (SMPE) - is derived from the PGT entry, whereas in Spectrum-2 and later ASICs it is derived from the FID. Therefore, in Spectrum-1, the SMPE index needs to be programmed as part of the PGT entry via SMID register, while it is reserved for Spectrum-2 and later ASICs. Add 'pgt_smpe_index_valid' boolean as part of 'struct mlxsw_sp' and set it to true for Spectrum-1 and to false for the later ASICs. Add 'smpe_index_valid' as part of 'struct mlxsw_sp_pgt' and set it according to the value in 'struct mlxsw_sp' as part of PGT initialization. Signed-off-by: Amit Cohen <amcohen@nvidia.com> Reviewed-by: Petr Machata <petrm@nvidia.com> Signed-off-by: Ido Schimmel <idosch@nvidia.com> Signed-off-by: Paolo Abeni <pabeni@redhat.com>
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@ -3235,6 +3235,7 @@ static int mlxsw_sp1_init(struct mlxsw_core *mlxsw_core,
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mlxsw_sp->listeners_count = ARRAY_SIZE(mlxsw_sp1_listener);
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mlxsw_sp->fid_family_arr = mlxsw_sp1_fid_family_arr;
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mlxsw_sp->lowest_shaper_bs = MLXSW_REG_QEEC_LOWEST_SHAPER_BS_SP1;
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mlxsw_sp->pgt_smpe_index_valid = true;
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return mlxsw_sp_init(mlxsw_core, mlxsw_bus_info, extack);
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}
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@ -3268,6 +3269,7 @@ static int mlxsw_sp2_init(struct mlxsw_core *mlxsw_core,
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mlxsw_sp->listeners_count = ARRAY_SIZE(mlxsw_sp2_listener);
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mlxsw_sp->fid_family_arr = mlxsw_sp2_fid_family_arr;
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mlxsw_sp->lowest_shaper_bs = MLXSW_REG_QEEC_LOWEST_SHAPER_BS_SP2;
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mlxsw_sp->pgt_smpe_index_valid = false;
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return mlxsw_sp_init(mlxsw_core, mlxsw_bus_info, extack);
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}
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@ -3301,6 +3303,7 @@ static int mlxsw_sp3_init(struct mlxsw_core *mlxsw_core,
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mlxsw_sp->listeners_count = ARRAY_SIZE(mlxsw_sp2_listener);
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mlxsw_sp->fid_family_arr = mlxsw_sp2_fid_family_arr;
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mlxsw_sp->lowest_shaper_bs = MLXSW_REG_QEEC_LOWEST_SHAPER_BS_SP3;
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mlxsw_sp->pgt_smpe_index_valid = false;
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return mlxsw_sp_init(mlxsw_core, mlxsw_bus_info, extack);
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}
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@ -3334,6 +3337,7 @@ static int mlxsw_sp4_init(struct mlxsw_core *mlxsw_core,
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mlxsw_sp->listeners_count = ARRAY_SIZE(mlxsw_sp2_listener);
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mlxsw_sp->fid_family_arr = mlxsw_sp2_fid_family_arr;
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mlxsw_sp->lowest_shaper_bs = MLXSW_REG_QEEC_LOWEST_SHAPER_BS_SP4;
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mlxsw_sp->pgt_smpe_index_valid = false;
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return mlxsw_sp_init(mlxsw_core, mlxsw_bus_info, extack);
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}
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@ -219,6 +219,7 @@ struct mlxsw_sp {
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struct mutex ipv6_addr_ht_lock; /* Protects ipv6_addr_ht */
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bool ubridge;
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struct mlxsw_sp_pgt *pgt;
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bool pgt_smpe_index_valid;
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};
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struct mlxsw_sp_ptp_ops {
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@ -11,6 +11,7 @@ struct mlxsw_sp_pgt {
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struct idr pgt_idr;
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u16 end_index; /* Exclusive. */
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struct mutex lock; /* Protects PGT. */
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bool smpe_index_valid;
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};
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int mlxsw_sp_pgt_mid_alloc(struct mlxsw_sp *mlxsw_sp, u16 *p_mid)
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@ -107,6 +108,7 @@ int mlxsw_sp_pgt_init(struct mlxsw_sp *mlxsw_sp)
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idr_init(&pgt->pgt_idr);
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pgt->end_index = MLXSW_CORE_RES_GET(mlxsw_sp->core, PGT_SIZE);
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mutex_init(&pgt->lock);
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pgt->smpe_index_valid = mlxsw_sp->pgt_smpe_index_valid;
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mlxsw_sp->pgt = pgt;
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return 0;
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}
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