usb: chipidea: tegra: Specify TX FIFO threshold in UDC SoC info
The UDC/OTG controller could be switched to a host mode and the TXFILLTUNING register needs to be programmed properly for the host mode. Hence specify the TX FIFO threshold in the UDC SoC info. Acked-by: Peter Chen <peter.chen@kernel.org> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Link: https://lore.kernel.org/r/20201218120246.7759-8-digetx@gmail.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -52,11 +52,20 @@ static const struct tegra_usb_soc_info tegra30_ehci_soc_info = {
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.txfifothresh = 16,
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.txfifothresh = 16,
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};
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};
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static const struct tegra_usb_soc_info tegra_udc_soc_info = {
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static const struct tegra_usb_soc_info tegra20_udc_soc_info = {
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.flags = CI_HDRC_REQUIRES_ALIGNED_DMA |
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.flags = CI_HDRC_REQUIRES_ALIGNED_DMA |
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CI_HDRC_OVERRIDE_PHY_CONTROL |
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CI_HDRC_OVERRIDE_PHY_CONTROL |
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CI_HDRC_SUPPORTS_RUNTIME_PM,
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CI_HDRC_SUPPORTS_RUNTIME_PM,
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.dr_mode = USB_DR_MODE_UNKNOWN,
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.dr_mode = USB_DR_MODE_UNKNOWN,
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.txfifothresh = 10,
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};
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static const struct tegra_usb_soc_info tegra30_udc_soc_info = {
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.flags = CI_HDRC_REQUIRES_ALIGNED_DMA |
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CI_HDRC_OVERRIDE_PHY_CONTROL |
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CI_HDRC_SUPPORTS_RUNTIME_PM,
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.dr_mode = USB_DR_MODE_UNKNOWN,
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.txfifothresh = 16,
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};
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};
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static const struct of_device_id tegra_usb_of_match[] = {
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static const struct of_device_id tegra_usb_of_match[] = {
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@ -68,16 +77,16 @@ static const struct of_device_id tegra_usb_of_match[] = {
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.data = &tegra30_ehci_soc_info,
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.data = &tegra30_ehci_soc_info,
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}, {
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}, {
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.compatible = "nvidia,tegra20-udc",
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.compatible = "nvidia,tegra20-udc",
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.data = &tegra_udc_soc_info,
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.data = &tegra20_udc_soc_info,
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}, {
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}, {
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.compatible = "nvidia,tegra30-udc",
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.compatible = "nvidia,tegra30-udc",
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.data = &tegra_udc_soc_info,
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.data = &tegra30_udc_soc_info,
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}, {
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}, {
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.compatible = "nvidia,tegra114-udc",
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.compatible = "nvidia,tegra114-udc",
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.data = &tegra_udc_soc_info,
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.data = &tegra30_udc_soc_info,
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}, {
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}, {
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.compatible = "nvidia,tegra124-udc",
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.compatible = "nvidia,tegra124-udc",
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.data = &tegra_udc_soc_info,
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.data = &tegra30_udc_soc_info,
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}, {
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}, {
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/* sentinel */
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/* sentinel */
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}
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}
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