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wireless-next patches for v6.8

Browse Source 
The third "new features" pull request for v6.8. This is a smaller one
 to clear up our tree before the break and nothing really noteworthy
 this time.
 
 Major changes:
 
 stack
 
 * cfg80211: introduce cfg80211_ssid_eq() for SSID matching
 
 * cfg80211: support P2P operation on DFS channels
 
 * mac80211: allow 64-bit radiotap timestamps
 
 iwlwifi
 
 * AX210: allow concurrent P2P operation on DFS channels
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Merge tag 'wireless-next-2023-12-22' of git://git.kernel.org/pub/scm/linux/kernel/git/wireless/wireless-next

Kalle Valo says:

====================
wireless-next patches for v6.8

The third "new features" pull request for v6.8. This is a smaller one
to clear up our tree before the break and nothing really noteworthy
this time.

Major changes:

stack

* cfg80211: introduce cfg80211_ssid_eq() for SSID matching

* cfg80211: support P2P operation on DFS channels

* mac80211: allow 64-bit radiotap timestamps

iwlwifi

* AX210: allow concurrent P2P operation on DFS channels
====================

Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
David S. Miller 2024-01-02 12:46:10 +00:00
commit a27359abc8
67 changed files with 2733 additions and 419 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
drivers/net/wireless/ath/ath10k/htt_rx.c
View File

@ -1295,7 +1295,7 @@ static void ath10k_htt_rx_h_ppdu(struct ath10k *ar,
status->encoding = RX_ENC_LEGACY;
status->bw = RATE_INFO_BW_20;
status->flag &= ~RX_FLAG_MACTIME_END;
status->flag &= ~RX_FLAG_MACTIME;
status->flag |= RX_FLAG_NO_SIGNAL_VAL;
status->flag &= ~(RX_FLAG_AMPDU_IS_LAST);

6
drivers/net/wireless/intel/iwlwifi/fw/api/debug.h
View File

@ -59,6 +59,12 @@ enum iwl_debug_cmds {
* &struct iwl_dbg_dump_complete_cmd
*/
FW_DUMP_COMPLETE_CMD = 0xB,
/**
* @FW_CLEAR_BUFFER:
* clears the firmware's internal buffer
* no payload
*/
FW_CLEAR_BUFFER = 0xD,
/**
* @MFU_ASSERT_DUMP_NTF:
* &struct iwl_mfu_assert_dump_notif

3
drivers/net/wireless/intel/iwlwifi/fw/api/nvm-reg.h
View File

@ -269,6 +269,9 @@ struct iwl_nvm_access_complete_cmd {
__le32 reserved;
} __packed; /* NVM_ACCESS_COMPLETE_CMD_API_S_VER_1 */
#define IWL_MCC_US 0x5553
#define IWL_MCC_CANADA 0x4341
/**
* struct iwl_mcc_update_cmd - Request the device to update geographic
* regulatory profile according to the given MCC (Mobile Country Code).

9
drivers/net/wireless/intel/iwlwifi/fw/dbg.c
View File

@ -3401,6 +3401,15 @@ void iwl_fw_dbg_clear_monitor_buf(struct iwl_fw_runtime *fwrt)
struct iwl_fw_dbg_params params = {0};
iwl_fw_dbg_stop_sync(fwrt);
if (fw_has_api(&fwrt->fw->ucode_capa,
IWL_UCODE_TLV_API_INT_DBG_BUF_CLEAR)) {
struct iwl_host_cmd hcmd = {
.id = WIDE_ID(DEBUG_GROUP, FW_CLEAR_BUFFER),
};
iwl_trans_send_cmd(fwrt->trans, &hcmd);
}
iwl_dbg_tlv_init_cfg(fwrt);
iwl_fw_dbg_stop_restart_recording(fwrt, &params, false);
}

4
drivers/net/wireless/intel/iwlwifi/fw/file.h
View File

@ -245,6 +245,8 @@ typedef unsigned int __bitwise iwl_ucode_tlv_api_t;
* SCAN_CONFIG_DB_CMD_API_S.
* @IWL_UCODE_TLV_API_NO_HOST_DISABLE_TX: Firmware offloaded the station disable tx
* logic.
* @IWL_UCODE_TLV_API_INT_DBG_BUF_CLEAR: Firmware supports clearing the debug
* internal buffer
*
* @NUM_IWL_UCODE_TLV_API: number of bits used
*/
@ -282,7 +284,9 @@ enum iwl_ucode_tlv_api {
IWL_UCODE_TLV_API_ADWELL_HB_DEF_N_AP = (__force iwl_ucode_tlv_api_t)57,
IWL_UCODE_TLV_API_SCAN_EXT_CHAN_VER = (__force iwl_ucode_tlv_api_t)58,
IWL_UCODE_TLV_API_BAND_IN_RX_DATA = (__force iwl_ucode_tlv_api_t)59,
/* API Set 2 */
IWL_UCODE_TLV_API_NO_HOST_DISABLE_TX = (__force iwl_ucode_tlv_api_t)66,
IWL_UCODE_TLV_API_INT_DBG_BUF_CLEAR = (__force iwl_ucode_tlv_api_t)67,
NUM_IWL_UCODE_TLV_API
/*

1
drivers/net/wireless/intel/iwlwifi/iwl-config.h
View File

@ -377,7 +377,6 @@ struct iwl_cfg {
u16 nvm_calib_ver;
u32 rx_with_siso_diversity:1,
tx_with_siso_diversity:1,
bt_shared_single_ant:1,
internal_wimax_coex:1,
host_interrupt_operation_mode:1,
high_temp:1,

2
drivers/net/wireless/intel/iwlwifi/iwl-csr.h
View File

@ -354,6 +354,8 @@ enum {
#define CSR_HW_RF_ID_TYPE_GF (0x0010D000)
#define CSR_HW_RF_ID_TYPE_GF4 (0x0010E000)
#define CSR_HW_RF_ID_TYPE_MS (0x00111000)
#define CSR_HW_RF_ID_TYPE_FM (0x00112000)
#define CSR_HW_RF_ID_TYPE_WP (0x00113000)
/* HW_RF CHIP STEP */
#define CSR_HW_RF_STEP(_val) (((_val) >> 8) & 0xF)

15
drivers/net/wireless/intel/iwlwifi/iwl-nvm-parse.c
View File

@ -1609,10 +1609,17 @@ static u32 iwl_nvm_get_regdom_bw_flags(const u16 *nvm_chan,
/* Set the GO concurrent flag only in case that NO_IR is set.
* Otherwise it is meaningless
*/
if ((nvm_flags & NVM_CHANNEL_GO_CONCURRENT) &&
(flags & NL80211_RRF_NO_IR))
flags |= NL80211_RRF_GO_CONCURRENT;
if ((nvm_flags & NVM_CHANNEL_GO_CONCURRENT)) {
if (flags & NL80211_RRF_NO_IR)
flags |= NL80211_RRF_GO_CONCURRENT;
if (flags & NL80211_RRF_DFS) {
flags |= NL80211_RRF_DFS_CONCURRENT;
/* Our device doesn't set active bit for DFS channels
* however, once marked as DFS no-ir is not needed.
*/
flags &= ~NL80211_RRF_NO_IR;
}
}
/*
* reg_capa is per regulatory domain so apply it for every channel
*/

8
drivers/net/wireless/intel/iwlwifi/iwl-trans.h
View File

@ -1316,7 +1316,7 @@ iwl_trans_get_rxq_dma_data(struct iwl_trans *trans, int queue,
struct iwl_trans_rxq_dma_data *data)
{
if (WARN_ON_ONCE(!trans->ops->rxq_dma_data))
return -ENOTSUPP;
return -EOPNOTSUPP;
return trans->ops->rxq_dma_data(trans, queue, data);
}
@ -1338,7 +1338,7 @@ iwl_trans_txq_alloc(struct iwl_trans *trans,
might_sleep();
if (WARN_ON_ONCE(!trans->ops->txq_alloc))
return -ENOTSUPP;
return -EOPNOTSUPP;
if (WARN_ON_ONCE(trans->state != IWL_TRANS_FW_ALIVE)) {
IWL_ERR(trans, "%s bad state = %d\n", __func__, trans->state);
@ -1404,7 +1404,7 @@ static inline int iwl_trans_wait_tx_queues_empty(struct iwl_trans *trans,
u32 txqs)
{
if (WARN_ON_ONCE(!trans->ops->wait_tx_queues_empty))
return -ENOTSUPP;
return -EOPNOTSUPP;
/* No need to wait if the firmware is not alive */
if (trans->state != IWL_TRANS_FW_ALIVE) {
@ -1418,7 +1418,7 @@ static inline int iwl_trans_wait_tx_queues_empty(struct iwl_trans *trans,
static inline int iwl_trans_wait_txq_empty(struct iwl_trans *trans, int queue)
{
if (WARN_ON_ONCE(!trans->ops->wait_txq_empty))
return -ENOTSUPP;
return -EOPNOTSUPP;
if (WARN_ON_ONCE(trans->state != IWL_TRANS_FW_ALIVE)) {
IWL_ERR(trans, "%s bad state = %d\n", __func__, trans->state);

22
drivers/net/wireless/intel/iwlwifi/mvm/coex.c
View File

@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
/*
* Copyright (C) 2013-2014, 2018-2020, 2022 Intel Corporation
* Copyright (C) 2013-2014, 2018-2020, 2022-2023 Intel Corporation
* Copyright (C) 2013-2015 Intel Mobile Communications GmbH
*/
#include <linux/ieee80211.h>
@ -116,11 +116,6 @@ iwl_get_coex_type(struct iwl_mvm *mvm, const struct ieee80211_vif *vif)
ret = BT_COEX_TX_DIS_LUT;
if (mvm->cfg->bt_shared_single_ant) {
rcu_read_unlock();
return ret;
}
phy_ctx_id = *((u16 *)chanctx_conf->drv_priv);
primary_ch_phy_id = le32_to_cpu(mvm->last_bt_ci_cmd.primary_ch_phy_id);
secondary_ch_phy_id =
@ -383,13 +378,12 @@ static void iwl_mvm_bt_notif_per_link(struct iwl_mvm *mvm,
/*
* don't reduce the Tx power if one of these is true:
* we are in LOOSE
* single share antenna product
* BT is inactive
* we are not associated
*/
if (iwl_get_coex_type(mvm, vif) == BT_COEX_LOOSE_LUT ||
mvm->cfg->bt_shared_single_ant || !vif->cfg.assoc ||
le32_to_cpu(mvm->last_bt_notif.bt_activity_grading) == BT_OFF) {
le32_to_cpu(mvm->last_bt_notif.bt_activity_grading) == BT_OFF ||
!vif->cfg.assoc) {
iwl_mvm_bt_coex_reduced_txp(mvm, link_info->ap_sta_id, false);
/* FIXME: should this be per link? */
iwl_mvm_bt_coex_enable_rssi_event(mvm, vif, false, 0);
@ -570,7 +564,7 @@ void iwl_mvm_bt_rssi_event(struct iwl_mvm *mvm, struct ieee80211_vif *vif,
* Check if rssi is good enough for reduced Tx power, but not in loose
* scheme.
*/
if (rssi_event == RSSI_EVENT_LOW || mvm->cfg->bt_shared_single_ant ||
if (rssi_event == RSSI_EVENT_LOW ||
iwl_get_coex_type(mvm, vif) == BT_COEX_LOOSE_LUT)
ret = iwl_mvm_bt_coex_reduced_txp(mvm,
mvmvif->deflink.ap_sta_id,
@ -639,10 +633,6 @@ bool iwl_mvm_bt_coex_is_mimo_allowed(struct iwl_mvm *mvm,
bool iwl_mvm_bt_coex_is_ant_avail(struct iwl_mvm *mvm, u8 ant)
{
/* there is no other antenna, shared antenna is always available */
if (mvm->cfg->bt_shared_single_ant)
return true;
if (ant & mvm->cfg->non_shared_ant)
return true;
@ -652,10 +642,6 @@ bool iwl_mvm_bt_coex_is_ant_avail(struct iwl_mvm *mvm, u8 ant)
bool iwl_mvm_bt_coex_is_shared_ant_avail(struct iwl_mvm *mvm)
{
/* there is no other antenna, shared antenna is always available */
if (mvm->cfg->bt_shared_single_ant)
return true;
return le32_to_cpu(mvm->last_bt_notif.bt_activity_grading) < BT_HIGH_TRAFFIC;
}

17
drivers/net/wireless/intel/iwlwifi/mvm/d3.c
View File

@ -1130,14 +1130,7 @@ iwl_mvm_wowlan_config(struct iwl_mvm *mvm,
return ret;
}
/*
* This needs to be unlocked due to lock ordering
* constraints. Since we're in the suspend path
* that isn't really a problem though.
*/
mutex_unlock(&mvm->mutex);
ret = iwl_mvm_wowlan_config_key_params(mvm, vif);
mutex_lock(&mvm->mutex);
if (ret)
return ret;
@ -2497,7 +2490,7 @@ static bool iwl_mvm_query_wakeup_reasons(struct iwl_mvm *mvm,
struct iwl_wowlan_status_data *status)
{
int i;
bool keep;
bool keep = false;
struct iwl_mvm_sta *mvm_ap_sta;
if (!status)
@ -2525,18 +2518,12 @@ static bool iwl_mvm_query_wakeup_reasons(struct iwl_mvm *mvm,
mvm_ap_sta->tid_data[i].seq_number >> 4);
}
/* now we have all the data we need, unlock to avoid mac80211 issues */
mutex_unlock(&mvm->mutex);
iwl_mvm_report_wakeup_reasons(mvm, vif, status);
keep = iwl_mvm_setup_connection_keep(mvm, vif, status);
return keep;
out_unlock:
mutex_unlock(&mvm->mutex);
return false;
return keep;
}
#define ND_QUERY_BUF_LEN (sizeof(struct iwl_scan_offload_profile_match) * \

4
drivers/net/wireless/intel/iwlwifi/mvm/debugfs.c
View File

@ -1521,7 +1521,7 @@ static ssize_t iwl_dbgfs_inject_packet_write(struct iwl_mvm *mvm,
/* supporting only MQ RX */
if (!mvm->trans->trans_cfg->mq_rx_supported)
return -ENOTSUPP;
return -EOPNOTSUPP;
rxb._page = alloc_pages(GFP_ATOMIC, 0);
if (!rxb._page)
@ -1829,7 +1829,7 @@ static ssize_t _iwl_dbgfs_link_sta_##name##_write(struct file *file, \
char buf[buflen] = {}; \
size_t buf_size = min(count, sizeof(buf) - 1); \
\
if (copy_from_user(buf, user_buf, sizeof(buf))) \
if (copy_from_user(buf, user_buf, buf_size)) \
return -EFAULT; \
\
return _iwl_dbgfs_link_sta_wrap_write(iwl_dbgfs_##name##_write, \

8
drivers/net/wireless/intel/iwlwifi/mvm/ftm-responder.c
View File

@ -39,7 +39,7 @@ static int iwl_mvm_ftm_responder_set_bw_v1(struct cfg80211_chan_def *chandef,
*ctrl_ch_position = iwl_mvm_get_ctrl_pos(chandef);
break;
default:
return -ENOTSUPP;
return -EOPNOTSUPP;
}
return 0;
@ -77,7 +77,7 @@ static int iwl_mvm_ftm_responder_set_bw_v2(struct cfg80211_chan_def *chandef,
}
fallthrough;
default:
return -ENOTSUPP;
return -EOPNOTSUPP;
}
return 0;
@ -291,7 +291,7 @@ iwl_mvm_ftm_responder_dyn_cfg_cmd(struct iwl_mvm *mvm,
default:
IWL_ERR(mvm, "Unsupported DYN_CONFIG_CMD version %u\n",
cmd_ver);
ret = -ENOTSUPP;
ret = -EOPNOTSUPP;
}
return ret;
@ -333,7 +333,7 @@ int iwl_mvm_ftm_respoder_add_pasn_sta(struct iwl_mvm *mvm,
if (cmd_ver < 3) {
IWL_ERR(mvm, "Adding PASN station not supported by FW\n");
return -ENOTSUPP;
return -EOPNOTSUPP;
}
if ((!hltk || !hltk_len) && (!tk || !tk_len)) {

7
drivers/net/wireless/intel/iwlwifi/mvm/fw.c
View File

@ -27,9 +27,6 @@
#define MVM_UCODE_ALIVE_TIMEOUT (2 * HZ)
#define MVM_UCODE_CALIB_TIMEOUT (2 * HZ)
#define IWL_TAS_US_MCC 0x5553
#define IWL_TAS_CANADA_MCC 0x4341
#define IWL_UATS_VLP_AP_SUPPORTED BIT(29)
#define IWL_UATS_AFC_AP_SUPPORTED BIT(30)
@ -1234,10 +1231,10 @@ static void iwl_mvm_tas_init(struct iwl_mvm *mvm)
dmi_get_system_info(DMI_SYS_VENDOR));
if ((!iwl_mvm_add_to_tas_block_list(cmd.v4.block_list_array,
&cmd.v4.block_list_size,
IWL_TAS_US_MCC)) ||
IWL_MCC_US)) ||
(!iwl_mvm_add_to_tas_block_list(cmd.v4.block_list_array,
&cmd.v4.block_list_size,
IWL_TAS_CANADA_MCC))) {
IWL_MCC_CANADA))) {
IWL_DEBUG_RADIO(mvm,
"Unable to add US/Canada to TAS block list, disabling TAS\n");
return;

16
drivers/net/wireless/intel/iwlwifi/mvm/mac80211.c
View File

@ -152,6 +152,16 @@ struct ieee80211_regdomain *iwl_mvm_get_regdomain(struct wiphy *wiphy,
mvm->lar_regdom_set = true;
mvm->mcc_src = src_id;
/* Some kind of regulatory mess means we need to currently disallow
* puncturing in the US and Canada. Do that here, at least until we
* figure out the new chanctx APIs for puncturing.
*/
if (resp->mcc == cpu_to_le16(IWL_MCC_US) ||
resp->mcc == cpu_to_le16(IWL_MCC_CANADA))
ieee80211_hw_set(mvm->hw, DISALLOW_PUNCTURING);
else
__clear_bit(IEEE80211_HW_DISALLOW_PUNCTURING, mvm->hw->flags);
iwl_mei_set_country_code(__le16_to_cpu(resp->mcc));
out:
@ -288,7 +298,7 @@ int iwl_mvm_op_set_antenna(struct ieee80211_hw *hw, u32 tx_ant, u32 rx_ant)
/* This has been tested on those devices only */
if (mvm->trans->trans_cfg->device_family != IWL_DEVICE_FAMILY_9000 &&
mvm->trans->trans_cfg->device_family != IWL_DEVICE_FAMILY_22000)
return -ENOTSUPP;
return -EOPNOTSUPP;
if (!mvm->nvm_data)
return -EBUSY;
@ -517,6 +527,10 @@ int iwl_mvm_mac_setup_register(struct iwl_mvm *mvm)
hw->wiphy->regulatory_flags |= REGULATORY_CUSTOM_REG |
REGULATORY_DISABLE_BEACON_HINTS;
if (mvm->trans->trans_cfg->device_family >= IWL_DEVICE_FAMILY_AX210)
wiphy_ext_feature_set(hw->wiphy,
NL80211_EXT_FEATURE_DFS_CONCURRENT);
hw->wiphy->flags |= WIPHY_FLAG_AP_UAPSD;
hw->wiphy->flags |= WIPHY_FLAG_HAS_CHANNEL_SWITCH;
hw->wiphy->flags |= WIPHY_FLAG_SPLIT_SCAN_6GHZ;

8
drivers/net/wireless/intel/iwlwifi/mvm/mld-mac80211.c
View File

@ -271,17 +271,17 @@ __iwl_mvm_mld_assign_vif_chanctx(struct iwl_mvm *mvm,
}
}
mvmvif->link[link_id]->phy_ctxt = phy_ctxt;
if (iwl_mvm_is_esr_supported(mvm->fwrt.trans) && n_active > 1) {
mvmvif->link[link_id]->listen_lmac = true;
ret = iwl_mvm_esr_mode_active(mvm, vif);
if (ret) {
IWL_ERR(mvm, "failed to activate ESR mode (%d)\n", ret);
return ret;
goto out;
}
}
mvmvif->link[link_id]->phy_ctxt = phy_ctxt;
if (switching_chanctx) {
/* reactivate if we turned this off during channel switch */
if (vif->type == NL80211_IFTYPE_AP)
@ -716,7 +716,7 @@ void iwl_mvm_mld_select_links(struct iwl_mvm *mvm, struct ieee80211_vif *vif,
}
}
if (WARN_ON(!new_active_links))
if (!new_active_links)
return;
if (vif->active_links != new_active_links)

11
drivers/net/wireless/intel/iwlwifi/mvm/phy-ctxt.c
View File

@ -99,17 +99,6 @@ static void iwl_mvm_phy_ctxt_set_rxchain(struct iwl_mvm *mvm,
active_cnt = 2;
}
/*
* If the firmware requested it, then we know that it supports
* getting zero for the values to indicate "use one, but pick
* which one yourself", which means it can dynamically pick one
* that e.g. has better RSSI.
*/
if (mvm->fw_static_smps_request && active_cnt == 1 && idle_cnt == 1) {
idle_cnt = 0;
active_cnt = 0;
}
*rxchain_info = cpu_to_le32(iwl_mvm_get_valid_rx_ant(mvm) <<
PHY_RX_CHAIN_VALID_POS);
*rxchain_info |= cpu_to_le32(idle_cnt << PHY_RX_CHAIN_CNT_POS);

4
drivers/net/wireless/intel/iwlwifi/mvm/sta.c
View File

@ -2550,7 +2550,7 @@ int iwl_mvm_add_mcast_sta(struct iwl_mvm *mvm, struct ieee80211_vif *vif)
if (WARN_ON(vif->type != NL80211_IFTYPE_AP &&
vif->type != NL80211_IFTYPE_ADHOC))
return -ENOTSUPP;
return -EOPNOTSUPP;
/*
* In IBSS, ieee80211_check_queues() sets the cab_queue to be
@ -3234,7 +3234,7 @@ int iwl_mvm_sta_tx_agg_oper(struct iwl_mvm *mvm, struct ieee80211_vif *vif,
* should be updated as well.
*/
if (buf_size < IWL_FRAME_LIMIT)
return -ENOTSUPP;
return -EOPNOTSUPP;
ret = iwl_mvm_sta_tx_agg(mvm, sta, tid, queue, true);
if (ret)

2
drivers/net/wireless/intel/iwlwifi/mvm/tx.c
View File

@ -2256,7 +2256,7 @@ int iwl_mvm_flush_sta_tids(struct iwl_mvm *mvm, u32 sta_id, u16 tids)
WARN_ON(!iwl_mvm_has_new_tx_api(mvm));
if (iwl_fw_lookup_notif_ver(mvm->fw, LONG_GROUP, TXPATH_FLUSH, 0) > 0)
cmd.flags |= CMD_WANT_SKB;
cmd.flags |= CMD_WANT_SKB | CMD_SEND_IN_RFKILL;
IWL_DEBUG_TX_QUEUES(mvm, "flush for sta id %d tid mask 0x%x\n",
sta_id, tids);

10
drivers/net/wireless/intel/iwlwifi/pcie/trans-gen2.c
View File

@ -290,6 +290,16 @@ static void iwl_pcie_get_rf_name(struct iwl_trans *trans)
case CSR_HW_RFID_TYPE(CSR_HW_RF_ID_TYPE_MS):
pos = scnprintf(buf, buflen, "MS");
break;
case CSR_HW_RFID_TYPE(CSR_HW_RF_ID_TYPE_FM):
pos = scnprintf(buf, buflen, "FM");
break;
case CSR_HW_RFID_TYPE(CSR_HW_RF_ID_TYPE_WP):
if (SILICON_Z_STEP ==
CSR_HW_RFID_STEP(trans->hw_rf_id))
pos = scnprintf(buf, buflen, "WHTC");
else
pos = scnprintf(buf, buflen, "WH");
break;
default:
return;
}

4
drivers/net/wireless/marvell/mwifiex/join.c
View File

@ -1427,8 +1427,8 @@ int mwifiex_adhoc_join(struct mwifiex_private *priv,
/* Check if the requested SSID is already joined */
if (priv->curr_bss_params.bss_descriptor.ssid.ssid_len &&
!mwifiex_ssid_cmp(&bss_desc->ssid,
&priv->curr_bss_params.bss_descriptor.ssid) &&
cfg80211_ssid_eq(&bss_desc->ssid,
&priv->curr_bss_params.bss_descriptor.ssid) &&
(priv->curr_bss_params.bss_descriptor.bss_mode ==
NL80211_IFTYPE_ADHOC)) {
mwifiex_dbg(priv->adapter, INFO,

1
drivers/net/wireless/marvell/mwifiex/main.h
View File

@ -1152,7 +1152,6 @@ void mwifiex_queue_scan_cmd(struct mwifiex_private *priv,
struct cmd_ctrl_node *cmd_node);
int mwifiex_ret_802_11_scan(struct mwifiex_private *priv,
struct host_cmd_ds_command *resp);
s32 mwifiex_ssid_cmp(struct cfg80211_ssid *ssid1, struct cfg80211_ssid *ssid2);
int mwifiex_associate(struct mwifiex_private *priv,
struct mwifiex_bssdescriptor *bss_desc);
int mwifiex_cmd_802_11_associate(struct mwifiex_private *priv,

11
drivers/net/wireless/marvell/mwifiex/scan.c
View File

@ -179,17 +179,6 @@ mwifiex_is_wpa_oui_present(struct mwifiex_bssdescriptor *bss_desc, u32 cipher)
return ret;
}
/*
* This function compares two SSIDs and checks if they match.
*/
s32
mwifiex_ssid_cmp(struct cfg80211_ssid *ssid1, struct cfg80211_ssid *ssid2)
{
if (!ssid1 || !ssid2 || (ssid1->ssid_len != ssid2->ssid_len))
return -1;
return memcmp(ssid1->ssid, ssid2->ssid, ssid1->ssid_len);
}
/*
* This function checks if wapi is enabled in driver and scanned network is
* compatible with it.

2
drivers/net/wireless/marvell/mwifiex/sdio.c
View File

@ -779,7 +779,7 @@ static int mwifiex_check_fw_status(struct mwifiex_adapter *adapter,
{
struct sdio_mmc_card *card = adapter->card;
int ret = 0;
u16 firmware_stat;
u16 firmware_stat = 0;
u32 tries;
for (tries = 0; tries < poll_num; tries++) {

4
drivers/net/wireless/marvell/mwifiex/sta_ioctl.c
View File

@ -345,8 +345,8 @@ int mwifiex_bss_start(struct mwifiex_private *priv, struct cfg80211_bss *bss,
/* Adhoc mode */
/* If the requested SSID matches current SSID, return */
if (bss_desc && bss_desc->ssid.ssid_len &&
(!mwifiex_ssid_cmp(&priv->curr_bss_params.bss_descriptor.
ssid, &bss_desc->ssid))) {
cfg80211_ssid_eq(&priv->curr_bss_params.bss_descriptor.ssid,
&bss_desc->ssid)) {
ret = 0;
goto done;
}

12
drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c
View File

@ -7961,6 +7961,18 @@ static const struct usb_device_id dev_table[] = {
.driver_info = (unsigned long)&rtl8192eu_fops},
{USB_DEVICE_AND_INTERFACE_INFO(USB_VENDOR_ID_REALTEK, 0x818c, 0xff, 0xff, 0xff),
.driver_info = (unsigned long)&rtl8192eu_fops},
/* D-Link DWA-131 rev C1 */
{USB_DEVICE_AND_INTERFACE_INFO(0x2001, 0x3312, 0xff, 0xff, 0xff),
.driver_info = (unsigned long)&rtl8192eu_fops},
/* TP-Link TL-WN8200ND V2 */
{USB_DEVICE_AND_INTERFACE_INFO(0x2357, 0x0126, 0xff, 0xff, 0xff),
.driver_info = (unsigned long)&rtl8192eu_fops},
/* Mercusys MW300UM */
{USB_DEVICE_AND_INTERFACE_INFO(0x2c4e, 0x0100, 0xff, 0xff, 0xff),
.driver_info = (unsigned long)&rtl8192eu_fops},
/* Mercusys MW300UH */
{USB_DEVICE_AND_INTERFACE_INFO(0x2c4e, 0x0104, 0xff, 0xff, 0xff),
.driver_info = (unsigned long)&rtl8192eu_fops},
#endif
{ }
};

14
drivers/net/wireless/realtek/rtlwifi/rtl8188ee/phy.c
View File

@ -16,12 +16,6 @@ static u32 _rtl88e_phy_rf_serial_read(struct ieee80211_hw *hw,
static void _rtl88e_phy_rf_serial_write(struct ieee80211_hw *hw,
enum radio_path rfpath, u32 offset,
u32 data);
static u32 _rtl88e_phy_calculate_bit_shift(u32 bitmask)
{
u32 i = ffs(bitmask);
return i ? i - 1 : 32;
}
static bool _rtl88e_phy_bb8188e_config_parafile(struct ieee80211_hw *hw);
static bool _rtl88e_phy_config_mac_with_headerfile(struct ieee80211_hw *hw);
static bool phy_config_bb_with_headerfile(struct ieee80211_hw *hw,
@ -51,7 +45,7 @@ u32 rtl88e_phy_query_bb_reg(struct ieee80211_hw *hw, u32 regaddr, u32 bitmask)
rtl_dbg(rtlpriv, COMP_RF, DBG_TRACE,
"regaddr(%#x), bitmask(%#x)\n", regaddr, bitmask);
originalvalue = rtl_read_dword(rtlpriv, regaddr);
bitshift = _rtl88e_phy_calculate_bit_shift(bitmask);
bitshift = calculate_bit_shift(bitmask);
returnvalue = (originalvalue & bitmask) >> bitshift;
rtl_dbg(rtlpriv, COMP_RF, DBG_TRACE,
@ -74,7 +68,7 @@ void rtl88e_phy_set_bb_reg(struct ieee80211_hw *hw,
if (bitmask != MASKDWORD) {
originalvalue = rtl_read_dword(rtlpriv, regaddr);
bitshift = _rtl88e_phy_calculate_bit_shift(bitmask);
bitshift = calculate_bit_shift(bitmask);
data = ((originalvalue & (~bitmask)) | (data << bitshift));
}
@ -99,7 +93,7 @@ u32 rtl88e_phy_query_rf_reg(struct ieee80211_hw *hw,
original_value = _rtl88e_phy_rf_serial_read(hw, rfpath, regaddr);
bitshift = _rtl88e_phy_calculate_bit_shift(bitmask);
bitshift = calculate_bit_shift(bitmask);
readback_value = (original_value & bitmask) >> bitshift;
spin_unlock(&rtlpriv->locks.rf_lock);
@ -127,7 +121,7 @@ void rtl88e_phy_set_rf_reg(struct ieee80211_hw *hw,
original_value = _rtl88e_phy_rf_serial_read(hw,
rfpath,
regaddr);
bitshift = _rtl88e_phy_calculate_bit_shift(bitmask);
bitshift = calculate_bit_shift(bitmask);
data =
((original_value & (~bitmask)) |
(data << bitshift));

12
drivers/net/wireless/realtek/rtlwifi/rtl8192c/phy_common.c
View File

@ -17,7 +17,7 @@ u32 rtl92c_phy_query_bb_reg(struct ieee80211_hw *hw, u32 regaddr, u32 bitmask)
rtl_dbg(rtlpriv, COMP_RF, DBG_TRACE, "regaddr(%#x), bitmask(%#x)\n",
regaddr, bitmask);
originalvalue = rtl_read_dword(rtlpriv, regaddr);
bitshift = _rtl92c_phy_calculate_bit_shift(bitmask);
bitshift = calculate_bit_shift(bitmask);
returnvalue = (originalvalue & bitmask) >> bitshift;
rtl_dbg(rtlpriv, COMP_RF, DBG_TRACE,
@ -40,7 +40,7 @@ void rtl92c_phy_set_bb_reg(struct ieee80211_hw *hw,
if (bitmask != MASKDWORD) {
originalvalue = rtl_read_dword(rtlpriv, regaddr);
bitshift = _rtl92c_phy_calculate_bit_shift(bitmask);
bitshift = calculate_bit_shift(bitmask);
data = ((originalvalue & (~bitmask)) | (data << bitshift));
}
@ -143,14 +143,6 @@ void _rtl92c_phy_rf_serial_write(struct ieee80211_hw *hw,
}
EXPORT_SYMBOL(_rtl92c_phy_rf_serial_write);
u32 _rtl92c_phy_calculate_bit_shift(u32 bitmask)
{
u32 i = ffs(bitmask);
return i ? i - 1 : 32;
}
EXPORT_SYMBOL(_rtl92c_phy_calculate_bit_shift);
static void _rtl92c_phy_bb_config_1t(struct ieee80211_hw *hw)
{
rtl_set_bbreg(hw, RFPGA0_TXINFO, 0x3, 0x2);

1
drivers/net/wireless/realtek/rtlwifi/rtl8192c/phy_common.h
View File

@ -196,7 +196,6 @@ bool rtl92c_phy_set_rf_power_state(struct ieee80211_hw *hw,
void rtl92ce_phy_set_rf_on(struct ieee80211_hw *hw);
void rtl92c_phy_set_io(struct ieee80211_hw *hw);
void rtl92c_bb_block_on(struct ieee80211_hw *hw);
u32 _rtl92c_phy_calculate_bit_shift(u32 bitmask);
long _rtl92c_phy_txpwr_idx_to_dbm(struct ieee80211_hw *hw,
enum wireless_mode wirelessmode,
u8 txpwridx);

6
drivers/net/wireless/realtek/rtlwifi/rtl8192ce/phy.c
View File

@ -39,7 +39,7 @@ u32 rtl92c_phy_query_rf_reg(struct ieee80211_hw *hw,
rfpath, regaddr);
}
bitshift = _rtl92c_phy_calculate_bit_shift(bitmask);
bitshift = calculate_bit_shift(bitmask);
readback_value = (original_value & bitmask) >> bitshift;
spin_unlock(&rtlpriv->locks.rf_lock);
@ -110,7 +110,7 @@ void rtl92ce_phy_set_rf_reg(struct ieee80211_hw *hw,
original_value = _rtl92c_phy_rf_serial_read(hw,
rfpath,
regaddr);
bitshift = _rtl92c_phy_calculate_bit_shift(bitmask);
bitshift = calculate_bit_shift(bitmask);
data =
((original_value & (~bitmask)) |
(data << bitshift));
@ -122,7 +122,7 @@ void rtl92ce_phy_set_rf_reg(struct ieee80211_hw *hw,
original_value = _rtl92c_phy_fw_rf_serial_read(hw,
rfpath,
regaddr);
bitshift = _rtl92c_phy_calculate_bit_shift(bitmask);
bitshift = calculate_bit_shift(bitmask);
data =
((original_value & (~bitmask)) |
(data << bitshift));

1
drivers/net/wireless/realtek/rtlwifi/rtl8192ce/phy.h
View File

@ -94,7 +94,6 @@ u32 _rtl92c_phy_rf_serial_read(struct ieee80211_hw *hw, enum radio_path rfpath,
u32 offset);
u32 _rtl92c_phy_fw_rf_serial_read(struct ieee80211_hw *hw,
enum radio_path rfpath, u32 offset);
u32 _rtl92c_phy_calculate_bit_shift(u32 bitmask);
void _rtl92c_phy_rf_serial_write(struct ieee80211_hw *hw,
enum radio_path rfpath, u32 offset, u32 data);
void _rtl92c_phy_fw_rf_serial_write(struct ieee80211_hw *hw,

6
drivers/net/wireless/realtek/rtlwifi/rtl8192cu/phy.c
View File

@ -32,7 +32,7 @@ u32 rtl92cu_phy_query_rf_reg(struct ieee80211_hw *hw,
original_value = _rtl92c_phy_fw_rf_serial_read(hw,
rfpath, regaddr);
}
bitshift = _rtl92c_phy_calculate_bit_shift(bitmask);
bitshift = calculate_bit_shift(bitmask);
readback_value = (original_value & bitmask) >> bitshift;
rtl_dbg(rtlpriv, COMP_RF, DBG_TRACE,
"regaddr(%#x), rfpath(%#x), bitmask(%#x), original_value(%#x)\n",
@ -56,7 +56,7 @@ void rtl92cu_phy_set_rf_reg(struct ieee80211_hw *hw,
original_value = _rtl92c_phy_rf_serial_read(hw,
rfpath,
regaddr);
bitshift = _rtl92c_phy_calculate_bit_shift(bitmask);
bitshift = calculate_bit_shift(bitmask);
data =
((original_value & (~bitmask)) |
(data << bitshift));
@ -67,7 +67,7 @@ void rtl92cu_phy_set_rf_reg(struct ieee80211_hw *hw,
original_value = _rtl92c_phy_fw_rf_serial_read(hw,
rfpath,
regaddr);
bitshift = _rtl92c_phy_calculate_bit_shift(bitmask);
bitshift = calculate_bit_shift(bitmask);
data =
((original_value & (~bitmask)) |
(data << bitshift));

15
drivers/net/wireless/realtek/rtlwifi/rtl8192de/phy.c
View File

@ -169,13 +169,6 @@ static const u8 channel_all[59] = {
157, 159, 161, 163, 165
};
static u32 _rtl92d_phy_calculate_bit_shift(u32 bitmask)
{
u32 i = ffs(bitmask);
return i ? i - 1 : 32;
}
u32 rtl92d_phy_query_bb_reg(struct ieee80211_hw *hw, u32 regaddr, u32 bitmask)
{
struct rtl_priv *rtlpriv = rtl_priv(hw);
@ -198,7 +191,7 @@ u32 rtl92d_phy_query_bb_reg(struct ieee80211_hw *hw, u32 regaddr, u32 bitmask)
} else {
originalvalue = rtl_read_dword(rtlpriv, regaddr);
}
bitshift = _rtl92d_phy_calculate_bit_shift(bitmask);
bitshift = calculate_bit_shift(bitmask);
returnvalue = (originalvalue & bitmask) >> bitshift;
rtl_dbg(rtlpriv, COMP_RF, DBG_TRACE,
"BBR MASK=0x%x Addr[0x%x]=0x%x\n",
@ -230,7 +223,7 @@ void rtl92d_phy_set_bb_reg(struct ieee80211_hw *hw,
dbi_direct);
else
originalvalue = rtl_read_dword(rtlpriv, regaddr);
bitshift = _rtl92d_phy_calculate_bit_shift(bitmask);
bitshift = calculate_bit_shift(bitmask);
data = ((originalvalue & (~bitmask)) | (data << bitshift));
}
if (rtlhal->during_mac1init_radioa || rtlhal->during_mac0init_radiob)
@ -317,7 +310,7 @@ u32 rtl92d_phy_query_rf_reg(struct ieee80211_hw *hw,
regaddr, rfpath, bitmask);
spin_lock(&rtlpriv->locks.rf_lock);
original_value = _rtl92d_phy_rf_serial_read(hw, rfpath, regaddr);
bitshift = _rtl92d_phy_calculate_bit_shift(bitmask);
bitshift = calculate_bit_shift(bitmask);
readback_value = (original_value & bitmask) >> bitshift;
spin_unlock(&rtlpriv->locks.rf_lock);
rtl_dbg(rtlpriv, COMP_RF, DBG_TRACE,
@ -343,7 +336,7 @@ void rtl92d_phy_set_rf_reg(struct ieee80211_hw *hw, enum radio_path rfpath,
if (bitmask != RFREG_OFFSET_MASK) {
original_value = _rtl92d_phy_rf_serial_read(hw,
rfpath, regaddr);
bitshift = _rtl92d_phy_calculate_bit_shift(bitmask);
bitshift = calculate_bit_shift(bitmask);
data = ((original_value & (~bitmask)) |
(data << bitshift));
}

16
drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c
View File

@ -16,7 +16,6 @@ static u32 _rtl92ee_phy_rf_serial_read(struct ieee80211_hw *hw,
static void _rtl92ee_phy_rf_serial_write(struct ieee80211_hw *hw,
enum radio_path rfpath, u32 offset,
u32 data);
static u32 _rtl92ee_phy_calculate_bit_shift(u32 bitmask);
static bool _rtl92ee_phy_bb8192ee_config_parafile(struct ieee80211_hw *hw);
static bool _rtl92ee_phy_config_mac_with_headerfile(struct ieee80211_hw *hw);
static bool phy_config_bb_with_hdr_file(struct ieee80211_hw *hw,
@ -46,7 +45,7 @@ u32 rtl92ee_phy_query_bb_reg(struct ieee80211_hw *hw, u32 regaddr, u32 bitmask)
rtl_dbg(rtlpriv, COMP_RF, DBG_TRACE,
"regaddr(%#x), bitmask(%#x)\n", regaddr, bitmask);
originalvalue = rtl_read_dword(rtlpriv, regaddr);
bitshift = _rtl92ee_phy_calculate_bit_shift(bitmask);
bitshift = calculate_bit_shift(bitmask);
returnvalue = (originalvalue & bitmask) >> bitshift;
rtl_dbg(rtlpriv, COMP_RF, DBG_TRACE,
@ -68,7 +67,7 @@ void rtl92ee_phy_set_bb_reg(struct ieee80211_hw *hw, u32 regaddr,
if (bitmask != MASKDWORD) {
originalvalue = rtl_read_dword(rtlpriv, regaddr);
bitshift = _rtl92ee_phy_calculate_bit_shift(bitmask);
bitshift = calculate_bit_shift(bitmask);
data = ((originalvalue & (~bitmask)) | (data << bitshift));
}
@ -92,7 +91,7 @@ u32 rtl92ee_phy_query_rf_reg(struct ieee80211_hw *hw,
spin_lock(&rtlpriv->locks.rf_lock);
original_value = _rtl92ee_phy_rf_serial_read(hw , rfpath, regaddr);
bitshift = _rtl92ee_phy_calculate_bit_shift(bitmask);
bitshift = calculate_bit_shift(bitmask);
readback_value = (original_value & bitmask) >> bitshift;
spin_unlock(&rtlpriv->locks.rf_lock);
@ -119,7 +118,7 @@ void rtl92ee_phy_set_rf_reg(struct ieee80211_hw *hw,
if (bitmask != RFREG_OFFSET_MASK) {
original_value = _rtl92ee_phy_rf_serial_read(hw, rfpath, addr);
bitshift = _rtl92ee_phy_calculate_bit_shift(bitmask);
bitshift = calculate_bit_shift(bitmask);
data = (original_value & (~bitmask)) | (data << bitshift);
}
@ -201,13 +200,6 @@ static void _rtl92ee_phy_rf_serial_write(struct ieee80211_hw *hw,
pphyreg->rf3wire_offset, data_and_addr);
}
static u32 _rtl92ee_phy_calculate_bit_shift(u32 bitmask)
{
u32 i = ffs(bitmask);
return i ? i - 1 : 32;
}
bool rtl92ee_phy_mac_config(struct ieee80211_hw *hw)
{
return _rtl92ee_phy_config_mac_with_headerfile(hw);

15
drivers/net/wireless/realtek/rtlwifi/rtl8192se/phy.c
View File

@ -14,13 +14,6 @@
#include "hw.h"
#include "table.h"
static u32 _rtl92s_phy_calculate_bit_shift(u32 bitmask)
{
u32 i = ffs(bitmask);
return i ? i - 1 : 32;
}
u32 rtl92s_phy_query_bb_reg(struct ieee80211_hw *hw, u32 regaddr, u32 bitmask)
{
struct rtl_priv *rtlpriv = rtl_priv(hw);
@ -30,7 +23,7 @@ u32 rtl92s_phy_query_bb_reg(struct ieee80211_hw *hw, u32 regaddr, u32 bitmask)
regaddr, bitmask);
originalvalue = rtl_read_dword(rtlpriv, regaddr);
bitshift = _rtl92s_phy_calculate_bit_shift(bitmask);
bitshift = calculate_bit_shift(bitmask);
returnvalue = (originalvalue & bitmask) >> bitshift;
rtl_dbg(rtlpriv, COMP_RF, DBG_TRACE, "BBR MASK=0x%x Addr[0x%x]=0x%x\n",
@ -52,7 +45,7 @@ void rtl92s_phy_set_bb_reg(struct ieee80211_hw *hw, u32 regaddr, u32 bitmask,
if (bitmask != MASKDWORD) {
originalvalue = rtl_read_dword(rtlpriv, regaddr);
bitshift = _rtl92s_phy_calculate_bit_shift(bitmask);
bitshift = calculate_bit_shift(bitmask);
data = ((originalvalue & (~bitmask)) | (data << bitshift));
}
@ -157,7 +150,7 @@ u32 rtl92s_phy_query_rf_reg(struct ieee80211_hw *hw, enum radio_path rfpath,
original_value = _rtl92s_phy_rf_serial_read(hw, rfpath, regaddr);
bitshift = _rtl92s_phy_calculate_bit_shift(bitmask);
bitshift = calculate_bit_shift(bitmask);
readback_value = (original_value & bitmask) >> bitshift;
spin_unlock(&rtlpriv->locks.rf_lock);
@ -188,7 +181,7 @@ void rtl92s_phy_set_rf_reg(struct ieee80211_hw *hw, enum radio_path rfpath,
if (bitmask != RFREG_OFFSET_MASK) {
original_value = _rtl92s_phy_rf_serial_read(hw, rfpath,
regaddr);
bitshift = _rtl92s_phy_calculate_bit_shift(bitmask);
bitshift = calculate_bit_shift(bitmask);
data = ((original_value & (~bitmask)) | (data << bitshift));
}

6
drivers/net/wireless/realtek/rtlwifi/rtl8723ae/phy.c
View File

@ -49,7 +49,7 @@ u32 rtl8723e_phy_query_rf_reg(struct ieee80211_hw *hw,
rfpath, regaddr);
}
bitshift = rtl8723_phy_calculate_bit_shift(bitmask);
bitshift = calculate_bit_shift(bitmask);
readback_value = (original_value & bitmask) >> bitshift;
spin_unlock(&rtlpriv->locks.rf_lock);
@ -80,7 +80,7 @@ void rtl8723e_phy_set_rf_reg(struct ieee80211_hw *hw,
original_value = rtl8723_phy_rf_serial_read(hw,
rfpath,
regaddr);
bitshift = rtl8723_phy_calculate_bit_shift(bitmask);
bitshift = calculate_bit_shift(bitmask);
data =
((original_value & (~bitmask)) |
(data << bitshift));
@ -89,7 +89,7 @@ void rtl8723e_phy_set_rf_reg(struct ieee80211_hw *hw,
rtl8723_phy_rf_serial_write(hw, rfpath, regaddr, data);
} else {
if (bitmask != RFREG_OFFSET_MASK) {
bitshift = rtl8723_phy_calculate_bit_shift(bitmask);
bitshift = calculate_bit_shift(bitmask);
data =
((original_value & (~bitmask)) |
(data << bitshift));

4
drivers/net/wireless/realtek/rtlwifi/rtl8723be/phy.c
View File

@ -41,7 +41,7 @@ u32 rtl8723be_phy_query_rf_reg(struct ieee80211_hw *hw, enum radio_path rfpath,
spin_lock(&rtlpriv->locks.rf_lock);
original_value = rtl8723_phy_rf_serial_read(hw, rfpath, regaddr);
bitshift = rtl8723_phy_calculate_bit_shift(bitmask);
bitshift = calculate_bit_shift(bitmask);
readback_value = (original_value & bitmask) >> bitshift;
spin_unlock(&rtlpriv->locks.rf_lock);
@ -68,7 +68,7 @@ void rtl8723be_phy_set_rf_reg(struct ieee80211_hw *hw, enum radio_path path,
if (bitmask != RFREG_OFFSET_MASK) {
original_value = rtl8723_phy_rf_serial_read(hw, path,
regaddr);
bitshift = rtl8723_phy_calculate_bit_shift(bitmask);
bitshift = calculate_bit_shift(bitmask);
data = ((original_value & (~bitmask)) |
(data << bitshift));
}

12
drivers/net/wireless/realtek/rtlwifi/rtl8723com/phy_common.c
View File

@ -17,7 +17,7 @@ u32 rtl8723_phy_query_bb_reg(struct ieee80211_hw *hw,
rtl_dbg(rtlpriv, COMP_RF, DBG_TRACE,
"regaddr(%#x), bitmask(%#x)\n", regaddr, bitmask);
originalvalue = rtl_read_dword(rtlpriv, regaddr);
bitshift = rtl8723_phy_calculate_bit_shift(bitmask);
bitshift = calculate_bit_shift(bitmask);
returnvalue = (originalvalue & bitmask) >> bitshift;
rtl_dbg(rtlpriv, COMP_RF, DBG_TRACE,
@ -39,7 +39,7 @@ void rtl8723_phy_set_bb_reg(struct ieee80211_hw *hw, u32 regaddr,
if (bitmask != MASKDWORD) {
originalvalue = rtl_read_dword(rtlpriv, regaddr);
bitshift = rtl8723_phy_calculate_bit_shift(bitmask);
bitshift = calculate_bit_shift(bitmask);
data = ((originalvalue & (~bitmask)) | (data << bitshift));
}
@ -51,14 +51,6 @@ void rtl8723_phy_set_bb_reg(struct ieee80211_hw *hw, u32 regaddr,
}
EXPORT_SYMBOL_GPL(rtl8723_phy_set_bb_reg);
u32 rtl8723_phy_calculate_bit_shift(u32 bitmask)
{
u32 i = ffs(bitmask);
return i ? i - 1 : 32;
}
EXPORT_SYMBOL_GPL(rtl8723_phy_calculate_bit_shift);
u32 rtl8723_phy_rf_serial_read(struct ieee80211_hw *hw,
enum radio_path rfpath, u32 offset)
{

1
drivers/net/wireless/realtek/rtlwifi/rtl8723com/phy_common.h
View File

@ -27,7 +27,6 @@ u32 rtl8723_phy_query_bb_reg(struct ieee80211_hw *hw,
u32 regaddr, u32 bitmask);
void rtl8723_phy_set_bb_reg(struct ieee80211_hw *hw, u32 regaddr,
u32 bitmask, u32 data);
u32 rtl8723_phy_calculate_bit_shift(u32 bitmask);
u32 rtl8723_phy_rf_serial_read(struct ieee80211_hw *hw,
enum radio_path rfpath, u32 offset);
void rtl8723_phy_rf_serial_write(struct ieee80211_hw *hw,

15
drivers/net/wireless/realtek/rtlwifi/rtl8821ae/phy.c
View File

@ -27,13 +27,6 @@ static u32 _rtl8821ae_phy_rf_serial_read(struct ieee80211_hw *hw,
static void _rtl8821ae_phy_rf_serial_write(struct ieee80211_hw *hw,
enum radio_path rfpath, u32 offset,
u32 data);
static u32 _rtl8821ae_phy_calculate_bit_shift(u32 bitmask)
{
if (WARN_ON_ONCE(!bitmask))
return 0;
return __ffs(bitmask);
}
static bool _rtl8821ae_phy_bb8821a_config_parafile(struct ieee80211_hw *hw);
/*static bool _rtl8812ae_phy_config_mac_with_headerfile(struct ieee80211_hw *hw);*/
static bool _rtl8821ae_phy_config_mac_with_headerfile(struct ieee80211_hw *hw);
@ -106,7 +99,7 @@ u32 rtl8821ae_phy_query_bb_reg(struct ieee80211_hw *hw, u32 regaddr,
"regaddr(%#x), bitmask(%#x)\n",
regaddr, bitmask);
originalvalue = rtl_read_dword(rtlpriv, regaddr);
bitshift = _rtl8821ae_phy_calculate_bit_shift(bitmask);
bitshift = calculate_bit_shift(bitmask);
returnvalue = (originalvalue & bitmask) >> bitshift;
rtl_dbg(rtlpriv, COMP_RF, DBG_TRACE,
@ -127,7 +120,7 @@ void rtl8821ae_phy_set_bb_reg(struct ieee80211_hw *hw,
if (bitmask != MASKDWORD) {
originalvalue = rtl_read_dword(rtlpriv, regaddr);
bitshift = _rtl8821ae_phy_calculate_bit_shift(bitmask);
bitshift = calculate_bit_shift(bitmask);
data = ((originalvalue & (~bitmask)) |
((data << bitshift) & bitmask));
}
@ -153,7 +146,7 @@ u32 rtl8821ae_phy_query_rf_reg(struct ieee80211_hw *hw,
spin_lock(&rtlpriv->locks.rf_lock);
original_value = _rtl8821ae_phy_rf_serial_read(hw, rfpath, regaddr);
bitshift = _rtl8821ae_phy_calculate_bit_shift(bitmask);
bitshift = calculate_bit_shift(bitmask);
readback_value = (original_value & bitmask) >> bitshift;
spin_unlock(&rtlpriv->locks.rf_lock);
@ -181,7 +174,7 @@ void rtl8821ae_phy_set_rf_reg(struct ieee80211_hw *hw,
if (bitmask != RFREG_OFFSET_MASK) {
original_value =
_rtl8821ae_phy_rf_serial_read(hw, rfpath, regaddr);
bitshift = _rtl8821ae_phy_calculate_bit_shift(bitmask);
bitshift = calculate_bit_shift(bitmask);
data = ((original_value & (~bitmask)) | (data << bitshift));
}

7
drivers/net/wireless/realtek/rtlwifi/wifi.h
View File

@ -3052,4 +3052,11 @@ static inline struct ieee80211_sta *rtl_find_sta(struct ieee80211_hw *hw,
return ieee80211_find_sta(mac->vif, mac_addr);
}
static inline u32 calculate_bit_shift(u32 bitmask)
{
if (WARN_ON_ONCE(!bitmask))
return 0;
return __ffs(bitmask);
}
#endif

4
drivers/net/wireless/realtek/rtw88/fw.c
View File

@ -998,7 +998,7 @@ static u8 rtw_get_rsvd_page_probe_req_location(struct rtw_dev *rtwdev,
if (rsvd_pkt->type != RSVD_PROBE_REQ)
continue;
if ((!ssid && !rsvd_pkt->ssid) ||
rtw_ssid_equal(rsvd_pkt->ssid, ssid))
cfg80211_ssid_eq(rsvd_pkt->ssid, ssid))
location = rsvd_pkt->page;
}
@ -1015,7 +1015,7 @@ static u16 rtw_get_rsvd_page_probe_req_size(struct rtw_dev *rtwdev,
if (rsvd_pkt->type != RSVD_PROBE_REQ)
continue;
if ((!ssid && !rsvd_pkt->ssid) ||
rtw_ssid_equal(rsvd_pkt->ssid, ssid))
cfg80211_ssid_eq(rsvd_pkt->ssid, ssid))
size = rsvd_pkt->probe_req_size;
}

12
drivers/net/wireless/realtek/rtw88/main.h
View File

@ -2090,18 +2090,6 @@ static inline struct ieee80211_vif *rtwvif_to_vif(struct rtw_vif *rtwvif)
return container_of(p, struct ieee80211_vif, drv_priv);
}
static inline bool rtw_ssid_equal(struct cfg80211_ssid *a,
struct cfg80211_ssid *b)
{
if (!a || !b || a->ssid_len != b->ssid_len)
return false;
if (memcmp(a->ssid, b->ssid, a->ssid_len))
return false;
return true;
}
static inline void rtw_chip_efuse_grant_on(struct rtw_dev *rtwdev)
{
if (rtwdev->chip->ops->efuse_grant)

640
drivers/net/wireless/realtek/rtw89/coex.c
View File

@ -6,6 +6,7 @@
#include "debug.h"
#include "fw.h"
#include "mac.h"
#include "phy.h"
#include "ps.h"
#include "reg.h"
@ -122,7 +123,8 @@ static const u32 cxtbl[] = {
0xea55556a, /* 21 */
0xaafafafa, /* 22 */
0xfafaaafa, /* 23 */
0xfafffaff /* 24 */
0xfafffaff, /* 24 */
0xea6a5a5a, /* 25 */
};
static const struct rtw89_btc_ver rtw89_btc_ver_defs[] = {
@ -131,7 +133,7 @@ static const struct rtw89_btc_ver rtw89_btc_ver_defs[] = {
.fcxbtcrpt = 105, .fcxtdma = 3, .fcxslots = 1, .fcxcysta = 5,
.fcxstep = 3, .fcxnullsta = 2, .fcxmreg = 2, .fcxgpiodbg = 1,
.fcxbtver = 1, .fcxbtscan = 2, .fcxbtafh = 2, .fcxbtdevinfo = 1,
.fwlrole = 1, .frptmap = 3, .fcxctrl = 1,
.fwlrole = 2, .frptmap = 3, .fcxctrl = 1,
.info_buf = 1800, .max_role_num = 6,
},
{RTL8852C, RTW89_FW_VER_CODE(0, 27, 57, 0),
@ -159,7 +161,7 @@ static const struct rtw89_btc_ver rtw89_btc_ver_defs[] = {
.fcxbtcrpt = 105, .fcxtdma = 3, .fcxslots = 1, .fcxcysta = 5,
.fcxstep = 3, .fcxnullsta = 2, .fcxmreg = 2, .fcxgpiodbg = 1,
.fcxbtver = 1, .fcxbtscan = 2, .fcxbtafh = 2, .fcxbtdevinfo = 1,
.fwlrole = 1, .frptmap = 3, .fcxctrl = 1,
.fwlrole = 2, .frptmap = 3, .fcxctrl = 1,
.info_buf = 1800, .max_role_num = 6,
},
{RTL8852B, RTW89_FW_VER_CODE(0, 29, 14, 0),
@ -246,6 +248,11 @@ struct rtw89_btc_btf_set_mon_reg {
struct rtw89_btc_fbtc_mreg regs[] __counted_by(reg_num);
} __packed;
struct _wl_rinfo_now {
u8 link_mode;
u32 dbcc_2g_phy: 2;
};
enum btc_btf_set_cx_policy {
CXPOLICY_TDMA = 0x0,
CXPOLICY_SLOT = 0x1,
@ -262,6 +269,8 @@ enum btc_b2w_scoreboard {
BTC_BSCB_RFK_RUN = BIT(5),
BTC_BSCB_RFK_REQ = BIT(6),
BTC_BSCB_LPS = BIT(7),
BTC_BSCB_BT_LNAB0 = BIT(8),
BTC_BSCB_BT_LNAB1 = BIT(10),
BTC_BSCB_WLRFK = BIT(11),
BTC_BSCB_BT_HILNA = BIT(13),
BTC_BSCB_BT_CONNECT = BIT(16),
@ -405,11 +414,14 @@ enum btc_cx_poicy_type {
/* TDMA Fix slot-8: W1:B1 = user-define */
BTC_CXP_FIX_TDW1B1 = (BTC_CXP_FIX << 8) | 8,
/* TDMA Fix slot-9: W1:B1 = 40:20 */
BTC_CXP_FIX_TD4020 = (BTC_CXP_FIX << 8) | 9,
/* TDMA Fix slot-9: W1:B1 = 40:10 */
BTC_CXP_FIX_TD4010ISO = (BTC_CXP_FIX << 8) | 10,
BTC_CXP_FIX_TD4010ISO = (BTC_CXP_FIX << 8) | 9,
/* TDMA Fix slot-10: W1:B1 = 40:10 */
BTC_CXP_FIX_TD4010ISO_DL = (BTC_CXP_FIX << 8) | 10,
/* TDMA Fix slot-11: W1:B1 = 40:10 */
BTC_CXP_FIX_TD4010ISO_UL = (BTC_CXP_FIX << 8) | 11,
/* PS-TDMA Fix slot-0: W1:B1 = 30:30 */
BTC_CXP_PFIX_TD3030 = (BTC_CXP_PFIX << 8) | 0,
@ -710,7 +722,8 @@ static void _reset_btc_var(struct rtw89_dev *rtwdev, u8 type)
if (type & BTC_RESET_CX)
memset(cx, 0, sizeof(*cx));
else if (type & BTC_RESET_BTINFO) /* only for BT enable */
if (type & BTC_RESET_BTINFO) /* only for BT enable */
memset(bt, 0, sizeof(*bt));
if (type & BTC_RESET_CTRL) {
@ -739,12 +752,115 @@ static void _reset_btc_var(struct rtw89_dev *rtwdev, u8 type)
btc->dm.coex_info_map = BTC_COEX_INFO_ALL;
btc->dm.wl_tx_limit.tx_time = BTC_MAX_TX_TIME_DEF;
btc->dm.wl_tx_limit.tx_retry = BTC_MAX_TX_RETRY_DEF;
btc->dm.wl_pre_agc_rb = BTC_PREAGC_NOTFOUND;
btc->dm.wl_btg_rx_rb = BTC_BTGCTRL_BB_GNT_NOTFOUND;
}
if (type & BTC_RESET_MDINFO)
memset(&btc->mdinfo, 0, sizeof(btc->mdinfo));
}
static u8 _search_reg_index(struct rtw89_dev *rtwdev, u8 mreg_num, u16 reg_type, u32 target)
{
const struct rtw89_chip_info *chip = rtwdev->chip;
u8 i;
for (i = 0; i < mreg_num; i++)
if (le16_to_cpu(chip->mon_reg[i].type) == reg_type &&
le32_to_cpu(chip->mon_reg[i].offset) == target) {
return i;
}
return BTC_REG_NOTFOUND;
}
static void _get_reg_status(struct rtw89_dev *rtwdev, u8 type, u8 *val)
{
struct rtw89_btc *btc = &rtwdev->btc;
const struct rtw89_btc_ver *ver = btc->ver;
struct rtw89_btc_module *md = &btc->mdinfo;
union rtw89_btc_fbtc_mreg_val *pmreg;
u32 pre_agc_addr = R_BTC_BB_PRE_AGC_S1;
u32 reg_val;
u8 idx;
if (md->ant.btg_pos == RF_PATH_A)
pre_agc_addr = R_BTC_BB_PRE_AGC_S0;
switch (type) {
case BTC_CSTATUS_TXDIV_POS:
if (md->switch_type == BTC_SWITCH_INTERNAL)
*val = BTC_ANT_DIV_MAIN;
break;
case BTC_CSTATUS_RXDIV_POS:
if (md->switch_type == BTC_SWITCH_INTERNAL)
*val = BTC_ANT_DIV_MAIN;
break;
case BTC_CSTATUS_BB_GNT_MUX:
reg_val = rtw89_phy_read32(rtwdev, R_BTC_BB_BTG_RX);
*val = !(reg_val & B_BTC_BB_GNT_MUX);
break;
case BTC_CSTATUS_BB_GNT_MUX_MON:
if (!btc->fwinfo.rpt_fbtc_mregval.cinfo.valid)
return;
pmreg = &btc->fwinfo.rpt_fbtc_mregval.finfo;
if (ver->fcxmreg == 1) {
idx = _search_reg_index(rtwdev, pmreg->v1.reg_num,
REG_BB, R_BTC_BB_BTG_RX);
if (idx == BTC_REG_NOTFOUND) {
*val = BTC_BTGCTRL_BB_GNT_NOTFOUND;
} else {
reg_val = le32_to_cpu(pmreg->v1.mreg_val[idx]);
*val = !(reg_val & B_BTC_BB_GNT_MUX);
}
} else if (ver->fcxmreg == 2) {
idx = _search_reg_index(rtwdev, pmreg->v2.reg_num,
REG_BB, R_BTC_BB_BTG_RX);
if (idx == BTC_REG_NOTFOUND) {
*val = BTC_BTGCTRL_BB_GNT_NOTFOUND;
} else {
reg_val = le32_to_cpu(pmreg->v2.mreg_val[idx]);
*val = !(reg_val & B_BTC_BB_GNT_MUX);
}
}
break;
case BTC_CSTATUS_BB_PRE_AGC:
reg_val = rtw89_phy_read32(rtwdev, pre_agc_addr);
reg_val &= B_BTC_BB_PRE_AGC_MASK;
*val = (reg_val == B_BTC_BB_PRE_AGC_VAL);
break;
case BTC_CSTATUS_BB_PRE_AGC_MON:
if (!btc->fwinfo.rpt_fbtc_mregval.cinfo.valid)
return;
pmreg = &btc->fwinfo.rpt_fbtc_mregval.finfo;
if (ver->fcxmreg == 1) {
idx = _search_reg_index(rtwdev, pmreg->v1.reg_num,
REG_BB, pre_agc_addr);
if (idx == BTC_REG_NOTFOUND) {
*val = BTC_PREAGC_NOTFOUND;
} else {
reg_val = le32_to_cpu(pmreg->v1.mreg_val[idx]) &
B_BTC_BB_PRE_AGC_MASK;
*val = (reg_val == B_BTC_BB_PRE_AGC_VAL);
}
} else if (ver->fcxmreg == 2) {
idx = _search_reg_index(rtwdev, pmreg->v2.reg_num,
REG_BB, pre_agc_addr);
if (idx == BTC_REG_NOTFOUND) {
*val = BTC_PREAGC_NOTFOUND;
} else {
reg_val = le32_to_cpu(pmreg->v2.mreg_val[idx]) &
B_BTC_BB_PRE_AGC_MASK;
*val = (reg_val == B_BTC_BB_PRE_AGC_VAL);
}
}
break;
default:
break;
}
}
#define BTC_RPT_HDR_SIZE 3
#define BTC_CHK_WLSLOT_DRIFT_MAX 15
#define BTC_CHK_BTSLOT_DRIFT_MAX 15
@ -1003,7 +1119,7 @@ static u32 _chk_btc_report(struct rtw89_dev *rtwdev,
u16 wl_slot_set = 0, wl_slot_real = 0;
u32 trace_step = btc->ctrl.trace_step, rpt_len = 0, diff_t = 0;
u32 cnt_leak_slot, bt_slot_real, bt_slot_set, cnt_rx_imr;
u8 i;
u8 i, val = 0;
rtw89_debug(rtwdev, RTW89_DBG_BTC,
"[BTC], %s(): index:%d\n",
@ -1508,6 +1624,19 @@ static u32 _chk_btc_report(struct rtw89_dev *rtwdev,
goto err;
}
break;
case BTC_RPT_TYPE_MREG:
_get_reg_status(rtwdev, BTC_CSTATUS_BB_GNT_MUX_MON, &val);
if (dm->wl_btg_rx == BTC_BTGCTRL_BB_GNT_FWCTRL)
dm->wl_btg_rx_rb = BTC_BTGCTRL_BB_GNT_FWCTRL;
else
dm->wl_btg_rx_rb = val;
_get_reg_status(rtwdev, BTC_CSTATUS_BB_PRE_AGC_MON, &val);
if (dm->wl_pre_agc == BTC_PREAGC_BB_FWCTRL)
dm->wl_pre_agc_rb = BTC_PREAGC_BB_FWCTRL;
else
dm->wl_pre_agc_rb = val;
break;
case BTC_RPT_TYPE_BT_VER:
case BTC_RPT_TYPE_BT_SCAN:
case BTC_RPT_TYPE_BT_AFH:
@ -2155,8 +2284,9 @@ static void _set_bt_rx_gain(struct rtw89_dev *rtwdev, u8 level)
struct rtw89_btc *btc = &rtwdev->btc;
struct rtw89_btc_bt_info *bt = &btc->cx.bt;
if (bt->rf_para.rx_gain_freerun == level ||
level > BTC_BT_RX_NORMAL_LVL)
if ((bt->rf_para.rx_gain_freerun == level ||
level > BTC_BT_RX_NORMAL_LVL) &&
(!rtwdev->chip->scbd || bt->lna_constrain == level))
return;
bt->rf_para.rx_gain_freerun = level;
@ -2171,32 +2301,59 @@ static void _set_bt_rx_gain(struct rtw89_dev *rtwdev, u8 level)
else
_write_scbd(rtwdev, BTC_WSCB_RXGAIN, true);
_send_fw_cmd(rtwdev, BTFC_SET, SET_BT_LNA_CONSTRAIN, &level, 1);
_send_fw_cmd(rtwdev, BTFC_SET, SET_BT_LNA_CONSTRAIN, &level, sizeof(level));
}
static void _set_rf_trx_para(struct rtw89_dev *rtwdev)
{
const struct rtw89_chip_info *chip = rtwdev->chip;
struct rtw89_btc *btc = &rtwdev->btc;
const struct rtw89_btc_ver *ver = btc->ver;
struct rtw89_btc_dm *dm = &btc->dm;
struct rtw89_btc_wl_info *wl = &btc->cx.wl;
struct rtw89_btc_bt_info *bt = &btc->cx.bt;
struct rtw89_btc_bt_link_info *b = &bt->link_info;
struct rtw89_btc_wl_smap *wl_smap = &wl->status.map;
struct rtw89_btc_rf_trx_para para;
u32 wl_stb_chg = 0;
u8 level_id = 0;
u8 level_id = 0, link_mode = 0, i, dbcc_2g_phy = 0;
if (!dm->freerun) {
/* fix LNA2 = level-5 for BT ACI issue at BTG */
if ((btc->dm.wl_btg_rx && b->profile_cnt.now != 0) ||
dm->bt_only == 1)
dm->trx_para_level = 1;
else
dm->trx_para_level = 0;
if (ver->fwlrole == 0) {
link_mode = wl->role_info.link_mode;
for (i = 0; i < RTW89_PHY_MAX; i++) {
if (wl->dbcc_info.real_band[i] == RTW89_BAND_2G)
dbcc_2g_phy = i;
}
} else if (ver->fwlrole == 1) {
link_mode = wl->role_info_v1.link_mode;
dbcc_2g_phy = wl->role_info_v1.dbcc_2g_phy;
} else if (ver->fwlrole == 2) {
link_mode = wl->role_info_v2.link_mode;
dbcc_2g_phy = wl->role_info_v2.dbcc_2g_phy;
}
level_id = (u8)dm->trx_para_level;
/* decide trx_para_level */
if (btc->mdinfo.ant.type == BTC_ANT_SHARED) {
/* fix LNA2 + TIA gain not change by GNT_BT */
if ((btc->dm.wl_btg_rx && b->profile_cnt.now != 0) ||
dm->bt_only == 1)
dm->trx_para_level = 1; /* for better BT ACI issue */
else
dm->trx_para_level = 0;
} else { /* non-shared antenna */
dm->trx_para_level = 5;
/* modify trx_para if WK 2.4G-STA-DL + bt link */
if (b->profile_cnt.now != 0 &&
link_mode == BTC_WLINK_2G_STA &&
wl->status.map.traffic_dir & BIT(RTW89_TFC_UL)) { /* uplink */
if (wl->rssi_level == 4 && bt->rssi_level > 2)
dm->trx_para_level = 6;
else if (wl->rssi_level == 3 && bt->rssi_level > 3)
dm->trx_para_level = 7;
}
}
level_id = dm->trx_para_level;
if (level_id >= chip->rf_para_dlink_num ||
level_id >= chip->rf_para_ulink_num) {
rtw89_debug(rtwdev, RTW89_DBG_BTC,
@ -2210,25 +2367,26 @@ static void _set_rf_trx_para(struct rtw89_dev *rtwdev)
else
para = chip->rf_para_dlink[level_id];
if (para.wl_tx_power != RTW89_BTC_WL_DEF_TX_PWR)
rtw89_debug(rtwdev, RTW89_DBG_BTC,
"[BTC], %s(): wl_tx_power=%d\n",
__func__, para.wl_tx_power);
_set_wl_tx_power(rtwdev, para.wl_tx_power);
_set_wl_rx_gain(rtwdev, para.wl_rx_gain);
_set_bt_tx_power(rtwdev, para.bt_tx_power);
_set_bt_rx_gain(rtwdev, para.bt_rx_gain);
if (dm->fddt_train) {
_set_wl_rx_gain(rtwdev, 1);
_write_scbd(rtwdev, BTC_WSCB_RXGAIN, true);
} else {
_set_wl_tx_power(rtwdev, para.wl_tx_power);
_set_wl_rx_gain(rtwdev, para.wl_rx_gain);
_set_bt_tx_power(rtwdev, para.bt_tx_power);
_set_bt_rx_gain(rtwdev, para.bt_rx_gain);
}
if (bt->enable.now == 0 || wl->status.map.rf_off == 1 ||
wl->status.map.lps == BTC_LPS_RF_OFF)
if (!bt->enable.now || dm->wl_only || wl_smap->rf_off ||
wl_smap->lps == BTC_LPS_RF_OFF ||
link_mode == BTC_WLINK_5G ||
link_mode == BTC_WLINK_NOLINK ||
(rtwdev->dbcc_en && dbcc_2g_phy != RTW89_PHY_1))
wl_stb_chg = 0;
else
wl_stb_chg = 1;
if (wl_stb_chg != dm->wl_stb_chg) {
rtw89_debug(rtwdev, RTW89_DBG_BTC,
"[BTC], %s(): wl_stb_chg=%d\n",
__func__, wl_stb_chg);
dm->wl_stb_chg = wl_stb_chg;
chip->ops->btc_wl_s1_standby(rtwdev, dm->wl_stb_chg);
}
@ -2661,9 +2819,17 @@ void rtw89_btc_set_policy(struct rtw89_dev *rtwdev, u16 policy_type)
_slot_set(btc, CXST_W1, 40, tbl_w1, SLOT_ISO);
_slot_set(btc, CXST_B1, 10, tbl_b1, SLOT_MIX);
break;
case BTC_CXP_FIX_TD4020:
_slot_set(btc, CXST_W1, 40, cxtbl[1], SLOT_MIX);
_slot_set(btc, CXST_B1, 20, tbl_b1, SLOT_MIX);
case BTC_CXP_FIX_TD4010ISO:
_slot_set(btc, CXST_W1, 40, cxtbl[1], SLOT_ISO);
_slot_set(btc, CXST_B1, 10, tbl_b1, SLOT_MIX);
break;
case BTC_CXP_FIX_TD4010ISO_DL:
_slot_set(btc, CXST_W1, 40, cxtbl[25], SLOT_ISO);
_slot_set(btc, CXST_B1, 10, cxtbl[25], SLOT_ISO);
break;
case BTC_CXP_FIX_TD4010ISO_UL:
_slot_set(btc, CXST_W1, 40, cxtbl[20], SLOT_ISO);
_slot_set(btc, CXST_B1, 10, cxtbl[25], SLOT_MIX);
break;
case BTC_CXP_FIX_TD7010:
_slot_set(btc, CXST_W1, 70, tbl_w1, SLOT_ISO);
@ -3002,9 +3168,13 @@ void rtw89_btc_set_policy_v1(struct rtw89_dev *rtwdev, u16 policy_type)
_slot_set(btc, CXST_W1, 40, cxtbl[1], SLOT_ISO);
_slot_set(btc, CXST_B1, 10, tbl_b1, SLOT_MIX);
break;
case BTC_CXP_FIX_TD4020:
_slot_set(btc, CXST_W1, 40, cxtbl[1], SLOT_MIX);
_slot_set(btc, CXST_B1, 20, tbl_b1, SLOT_MIX);
case BTC_CXP_FIX_TD4010ISO_DL:
_slot_set(btc, CXST_W1, 40, cxtbl[25], SLOT_ISO);
_slot_set(btc, CXST_B1, 10, cxtbl[25], SLOT_ISO);
break;
case BTC_CXP_FIX_TD4010ISO_UL:
_slot_set(btc, CXST_W1, 40, cxtbl[20], SLOT_ISO);
_slot_set(btc, CXST_B1, 10, cxtbl[25], SLOT_MIX);
break;
case BTC_CXP_FIX_TD7010:
_slot_set(btc, CXST_W1, 70, tbl_w1, SLOT_ISO);
@ -3381,17 +3551,32 @@ static void _action_wl_init(struct rtw89_dev *rtwdev)
_set_policy(rtwdev, BTC_CXP_OFF_BT, BTC_ACT_WL_INIT);
}
static void _action_wl_off(struct rtw89_dev *rtwdev)
static void _action_wl_off(struct rtw89_dev *rtwdev, u8 mode)
{
struct rtw89_btc *btc = &rtwdev->btc;
struct rtw89_btc_wl_info *wl = &btc->cx.wl;
rtw89_debug(rtwdev, RTW89_DBG_BTC, "[BTC], %s(): !!\n", __func__);
if (wl->status.map.rf_off || btc->dm.bt_only)
if (wl->status.map.rf_off || btc->dm.bt_only) {
_set_ant(rtwdev, NM_EXEC, BTC_PHY_ALL, BTC_ANT_WOFF);
} else if (wl->status.map.lps == BTC_LPS_RF_ON) {
if (wl->role_info.link_mode == BTC_WLINK_5G)
_set_ant(rtwdev, FC_EXEC, BTC_PHY_ALL, BTC_ANT_W5G);
else
_set_ant(rtwdev, FC_EXEC, BTC_PHY_ALL, BTC_ANT_W2G);
}
_set_policy(rtwdev, BTC_CXP_OFF_BT, BTC_ACT_WL_OFF);
if (mode == BTC_WLINK_5G) {
_set_policy(rtwdev, BTC_CXP_OFF_EQ0, BTC_ACT_WL_OFF);
} else if (wl->status.map.lps == BTC_LPS_RF_ON) {
if (btc->cx.bt.link_info.a2dp_desc.active)
_set_policy(rtwdev, BTC_CXP_OFF_BT, BTC_ACT_WL_OFF);
else
_set_policy(rtwdev, BTC_CXP_OFF_BWB1, BTC_ACT_WL_OFF);
} else {
_set_policy(rtwdev, BTC_CXP_OFF_BT, BTC_ACT_WL_OFF);
}
}
static void _action_freerun(struct rtw89_dev *rtwdev)
@ -3426,31 +3611,25 @@ static void _action_bt_idle(struct rtw89_dev *rtwdev)
{
struct rtw89_btc *btc = &rtwdev->btc;
struct rtw89_btc_bt_link_info *b = &btc->cx.bt.link_info;
struct rtw89_btc_wl_info *wl = &btc->cx.wl;
_set_ant(rtwdev, NM_EXEC, BTC_PHY_ALL, BTC_ANT_W2G);
if (btc->mdinfo.ant.type == BTC_ANT_SHARED) { /* shared-antenna */
switch (btc->cx.state_map) {
case BTC_WBUSY_BNOSCAN: /*wl-busy + bt idle*/
if (b->profile_cnt.now > 0)
_set_policy(rtwdev, BTC_CXP_FIX_TD4010,
BTC_ACT_BT_IDLE);
case BTC_WSCAN_BNOSCAN: /* wl-scan + bt-idle */
if (b->status.map.connect)
_set_policy(rtwdev, BTC_CXP_FIX_TD4010, BTC_ACT_BT_IDLE);
else if (wl->status.map.traffic_dir & BIT(RTW89_TFC_DL))
_set_policy(rtwdev, BTC_CXP_FIX_TD4010ISO_DL, BTC_ACT_BT_IDLE);
else
_set_policy(rtwdev, BTC_CXP_FIX_TD4020,
BTC_ACT_BT_IDLE);
_set_policy(rtwdev, BTC_CXP_FIX_TD4010ISO_UL, BTC_ACT_BT_IDLE);
break;
case BTC_WBUSY_BSCAN: /*wl-busy + bt-inq */
_set_policy(rtwdev, BTC_CXP_PFIX_TD5050,
BTC_ACT_BT_IDLE);
break;
case BTC_WSCAN_BNOSCAN: /* wl-scan + bt-idle */
if (b->profile_cnt.now > 0)
_set_policy(rtwdev, BTC_CXP_FIX_TD4010,
BTC_ACT_BT_IDLE);
else
_set_policy(rtwdev, BTC_CXP_FIX_TD4020,
BTC_ACT_BT_IDLE);
break;
case BTC_WSCAN_BSCAN: /* wl-scan + bt-inq */
_set_policy(rtwdev, BTC_CXP_FIX_TD5050,
BTC_ACT_BT_IDLE);
@ -3617,7 +3796,7 @@ static void _action_bt_pan(struct rtw89_dev *rtwdev)
_set_policy(rtwdev, BTC_CXP_FIX_TD3060, BTC_ACT_BT_PAN);
break;
case BTC_WLINKING: /* wl-connecting + bt-PAN */
_set_policy(rtwdev, BTC_CXP_FIX_TD4020, BTC_ACT_BT_PAN);
_set_policy(rtwdev, BTC_CXP_FIX_TD4010ISO, BTC_ACT_BT_PAN);
break;
case BTC_WIDLE: /* wl-idle + bt-pan */
_set_policy(rtwdev, BTC_CXP_PFIX_TD2080, BTC_ACT_BT_PAN);
@ -3798,46 +3977,134 @@ static void _action_wl_rfk(struct rtw89_dev *rtwdev)
static void _set_btg_ctrl(struct rtw89_dev *rtwdev)
{
struct rtw89_btc *btc = &rtwdev->btc;
const struct rtw89_btc_ver *ver = btc->ver;
struct rtw89_btc_wl_info *wl = &btc->cx.wl;
struct rtw89_btc_wl_role_info *wl_rinfo = &wl->role_info;
struct rtw89_btc_wl_role_info_v1 *wl_rinfo_v1 = &wl->role_info_v1;
struct rtw89_btc_wl_role_info_v2 *wl_rinfo_v2 = &wl->role_info_v2;
struct rtw89_btc_wl_role_info *wl_rinfo_v0 = &wl->role_info;
struct rtw89_btc_wl_dbcc_info *wl_dinfo = &wl->dbcc_info;
bool is_btg;
u8 mode;
const struct rtw89_chip_info *chip = rtwdev->chip;
const struct rtw89_btc_ver *ver = btc->ver;
struct rtw89_btc_bt_info *bt = &btc->cx.bt;
struct rtw89_btc_dm *dm = &btc->dm;
struct _wl_rinfo_now wl_rinfo;
u32 run_reason = btc->dm.run_reason;
u32 is_btg;
u8 i, val;
if (btc->ctrl.manual)
return;
if (ver->fwlrole == 0)
mode = wl_rinfo->link_mode;
wl_rinfo.link_mode = wl_rinfo_v0->link_mode;
else if (ver->fwlrole == 1)
mode = wl_rinfo_v1->link_mode;
wl_rinfo.link_mode = wl_rinfo_v1->link_mode;
else if (ver->fwlrole == 2)
mode = wl_rinfo_v2->link_mode;
wl_rinfo.link_mode = wl_rinfo_v2->link_mode;
else
return;
/* notify halbb ignore GNT_BT or not for WL BB Rx-AGC control */
if (mode == BTC_WLINK_5G) /* always 0 if 5G */
is_btg = false;
else if (mode == BTC_WLINK_25G_DBCC &&
wl_dinfo->real_band[RTW89_PHY_1] != RTW89_BAND_2G)
is_btg = false;
if (rtwdev->dbcc_en) {
if (ver->fwlrole == 0) {
for (i = 0; i < RTW89_PHY_MAX; i++) {
if (wl_dinfo->real_band[i] == RTW89_BAND_2G)
wl_rinfo.dbcc_2g_phy = i;
}
} else if (ver->fwlrole == 1) {
wl_rinfo.dbcc_2g_phy = wl_rinfo_v1->dbcc_2g_phy;
} else if (ver->fwlrole == 2) {
wl_rinfo.dbcc_2g_phy = wl_rinfo_v2->dbcc_2g_phy;
} else {
return;
}
}
if (wl_rinfo.link_mode == BTC_WLINK_25G_MCC)
is_btg = BTC_BTGCTRL_BB_GNT_FWCTRL;
else if (!(bt->run_patch_code && bt->enable.now))
is_btg = BTC_BTGCTRL_DISABLE;
else if (wl_rinfo.link_mode == BTC_WLINK_5G)
is_btg = BTC_BTGCTRL_DISABLE;
else if (dm->freerun)
is_btg = BTC_BTGCTRL_DISABLE;
else if (rtwdev->dbcc_en && wl_rinfo.dbcc_2g_phy != RTW89_PHY_1)
is_btg = BTC_BTGCTRL_DISABLE;
else
is_btg = true;
is_btg = BTC_BTGCTRL_ENABLE;
if (btc->dm.run_reason != BTC_RSN_NTFY_INIT &&
is_btg == btc->dm.wl_btg_rx)
if (dm->wl_btg_rx_rb != dm->wl_btg_rx &&
dm->wl_btg_rx_rb != BTC_BTGCTRL_BB_GNT_NOTFOUND) {
_get_reg_status(rtwdev, BTC_CSTATUS_BB_GNT_MUX, &val);
dm->wl_btg_rx_rb = val;
}
if (run_reason == BTC_RSN_NTFY_INIT ||
run_reason == BTC_RSN_NTFY_SWBAND ||
dm->wl_btg_rx_rb != dm->wl_btg_rx ||
is_btg != dm->wl_btg_rx) {
dm->wl_btg_rx = is_btg;
if (is_btg > BTC_BTGCTRL_ENABLE)
return;
chip->ops->ctrl_btg_bt_rx(rtwdev, is_btg, RTW89_PHY_0);
}
}
static void _set_wl_preagc_ctrl(struct rtw89_dev *rtwdev)
{
struct rtw89_btc *btc = &rtwdev->btc;
struct rtw89_btc_bt_link_info *bt_linfo = &btc->cx.bt.link_info;
struct rtw89_btc_wl_info *wl = &btc->cx.wl;
struct rtw89_btc_wl_role_info_v2 *wl_rinfo = &wl->role_info_v2;
const struct rtw89_chip_info *chip = rtwdev->chip;
const struct rtw89_btc_ver *ver = btc->ver;
struct rtw89_btc_bt_info *bt = &btc->cx.bt;
struct rtw89_btc_dm *dm = &btc->dm;
u8 is_preagc, val;
if (btc->ctrl.manual)
return;
btc->dm.wl_btg_rx = is_btg;
if (wl_rinfo->link_mode == BTC_WLINK_25G_MCC)
is_preagc = BTC_PREAGC_BB_FWCTRL;
else if (!(bt->run_patch_code && bt->enable.now))
is_preagc = BTC_PREAGC_DISABLE;
else if (wl_rinfo->link_mode == BTC_WLINK_5G)
is_preagc = BTC_PREAGC_DISABLE;
else if (wl_rinfo->link_mode == BTC_WLINK_NOLINK ||
btc->cx.bt.link_info.profile_cnt.now == 0)
is_preagc = BTC_PREAGC_DISABLE;
else if (dm->tdma_now.type != CXTDMA_OFF &&
!bt_linfo->hfp_desc.exist &&
!bt_linfo->hid_desc.exist &&
dm->fddt_train == BTC_FDDT_DISABLE)
is_preagc = BTC_PREAGC_DISABLE;
else if (ver->fwlrole == 2 && wl_rinfo->dbcc_en &&
wl_rinfo->dbcc_2g_phy != RTW89_PHY_1)
is_preagc = BTC_PREAGC_DISABLE;
else if (btc->mdinfo.ant.type == BTC_ANT_SHARED)
is_preagc = BTC_PREAGC_DISABLE;
else
is_preagc = BTC_PREAGC_ENABLE;
if (mode == BTC_WLINK_25G_MCC)
return;
if (dm->wl_pre_agc_rb != dm->wl_pre_agc &&
dm->wl_pre_agc_rb != BTC_PREAGC_NOTFOUND) {
_get_reg_status(rtwdev, BTC_CSTATUS_BB_PRE_AGC, &val);
dm->wl_pre_agc_rb = val;
}
rtw89_ctrl_btg_bt_rx(rtwdev, is_btg, RTW89_PHY_0);
if ((wl->coex_mode == BTC_MODE_NORMAL &&
(dm->run_reason == BTC_RSN_NTFY_INIT ||
dm->run_reason == BTC_RSN_NTFY_SWBAND ||
dm->wl_pre_agc_rb != dm->wl_pre_agc)) ||
is_preagc != dm->wl_pre_agc) {
dm->wl_pre_agc = is_preagc;
if (is_preagc > BTC_PREAGC_ENABLE)
return;
chip->ops->ctrl_nbtg_bt_tx(rtwdev, dm->wl_pre_agc, RTW89_PHY_0);
}
}
struct rtw89_txtime_data {
@ -4024,6 +4291,7 @@ static void _action_common(struct rtw89_dev *rtwdev)
struct rtw89_btc_wl_info *wl = &btc->cx.wl;
_set_btg_ctrl(rtwdev);
_set_wl_preagc_ctrl(rtwdev);
_set_wl_tx_limit(rtwdev);
_set_bt_afh_info(rtwdev);
_set_bt_rx_agc(rtwdev);
@ -5008,8 +5276,7 @@ static void _update_bt_scbd(struct rtw89_dev *rtwdev, bool only_update)
return;
}
if (!(val & BTC_BSCB_ON) ||
btc->dm.cnt_dm[BTC_DCNT_BTCNT_HANG] >= BTC_CHK_HANG_MAX)
if (!(val & BTC_BSCB_ON))
bt->enable.now = 0;
else
bt->enable.now = 1;
@ -5035,6 +5302,9 @@ static void _update_bt_scbd(struct rtw89_dev *rtwdev, bool only_update)
bt->btg_type = val & BTC_BSCB_BT_S1 ? BTC_BT_BTG : BTC_BT_ALONE;
bt->link_info.a2dp_desc.exist = !!(val & BTC_BSCB_A2DP_ACT);
bt->lna_constrain = !!(val & BTC_BSCB_BT_LNAB0) +
!!(val & BTC_BSCB_BT_LNAB1) * 2 + 4;
/* if rfk run 1->0 */
if (bt->rfk_info.map.run && !(val & BTC_BSCB_RFK_RUN))
status_change = true;
@ -5128,17 +5398,28 @@ void _run_coex(struct rtw89_dev *rtwdev, enum btc_reason_and_action reason)
}
if (wl->status.map.rf_off_pre == wl->status.map.rf_off &&
wl->status.map.lps_pre == wl->status.map.lps &&
(reason == BTC_RSN_NTFY_POWEROFF ||
reason == BTC_RSN_NTFY_RADIO_STATE)) {
rtw89_debug(rtwdev, RTW89_DBG_BTC,
"[BTC], %s(): return for WL rf off state no change!!\n",
__func__);
return;
wl->status.map.lps_pre == wl->status.map.lps) {
if (reason == BTC_RSN_NTFY_POWEROFF ||
reason == BTC_RSN_NTFY_RADIO_STATE) {
rtw89_debug(rtwdev, RTW89_DBG_BTC,
"[BTC], %s(): return for WL rf off state no change!!\n",
__func__);
return;
}
if (wl->status.map.rf_off == 1 ||
wl->status.map.lps == BTC_LPS_RF_OFF) {
rtw89_debug(rtwdev, RTW89_DBG_BTC,
"[BTC], %s(): return for WL rf off state!!\n",
__func__);
return;
}
}
dm->freerun = false;
dm->cnt_dm[BTC_DCNT_RUN]++;
dm->fddt_train = BTC_FDDT_DISABLE;
btc->ctrl.igno_bt = false;
bt->scan_rx_low_pri = false;
if (btc->ctrl.always_freerun) {
_action_freerun(rtwdev);
@ -5153,15 +5434,11 @@ void _run_coex(struct rtw89_dev *rtwdev, enum btc_reason_and_action reason)
}
if (wl->status.map.rf_off || wl->status.map.lps || dm->bt_only) {
_action_wl_off(rtwdev);
_action_wl_off(rtwdev, mode);
btc->ctrl.igno_bt = true;
goto exit;
}
btc->ctrl.igno_bt = false;
dm->freerun = false;
bt->scan_rx_low_pri = false;
if (reason == BTC_RSN_NTFY_INIT) {
_action_wl_init(rtwdev);
goto exit;
@ -5186,12 +5463,14 @@ void _run_coex(struct rtw89_dev *rtwdev, enum btc_reason_and_action reason)
if (mode == BTC_WLINK_NOLINK || mode == BTC_WLINK_2G_STA ||
mode == BTC_WLINK_5G) {
_action_wl_scan(rtwdev);
bt->scan_rx_low_pri = false;
goto exit;
}
}
if (wl->status.map.scan) {
_action_wl_scan(rtwdev);
bt->scan_rx_low_pri = false;
goto exit;
}
@ -5308,6 +5587,7 @@ void rtw89_btc_ntfy_init(struct rtw89_dev *rtwdev, u8 mode)
rtw89_debug(rtwdev, RTW89_DBG_BTC,
"[BTC], %s(): mode=%d\n", __func__, mode);
wl->coex_mode = mode;
dm->cnt_notify[BTC_NCNT_INIT_COEX]++;
dm->wl_only = mode == BTC_MODE_WL ? 1 : 0;
dm->bt_only = mode == BTC_MODE_BT ? 1 : 0;
@ -5525,6 +5805,37 @@ void rtw89_btc_ntfy_icmp_packet_work(struct work_struct *work)
mutex_unlock(&rtwdev->mutex);
}
static u8 _update_bt_rssi_level(struct rtw89_dev *rtwdev, u8 rssi)
{
const struct rtw89_chip_info *chip = rtwdev->chip;
struct rtw89_btc *btc = &rtwdev->btc;
struct rtw89_btc_bt_info *bt = &btc->cx.bt;
u8 *rssi_st, rssi_th, rssi_level = 0;
u8 i;
/* for rssi locate in which {40, 36, 31, 28}
* if rssi >= 40% (-60dBm) --> rssi_level = 4
* if 36% <= rssi < 40% --> rssi_level = 3
* if 31% <= rssi < 36% --> rssi_level = 2
* if 28% <= rssi < 31% --> rssi_level = 1
* if rssi < 28% --> rssi_level = 0
*/
/* check if rssi across bt_rssi_thres boundary */
for (i = 0; i < BTC_BT_RSSI_THMAX; i++) {
rssi_th = chip->bt_rssi_thres[i];
rssi_st = &bt->link_info.rssi_state[i];
*rssi_st = _update_rssi_state(rtwdev, *rssi_st, rssi, rssi_th);
if (BTC_RSSI_HIGH(*rssi_st)) {
rssi_level = BTC_BT_RSSI_THMAX - i;
break;
}
}
return rssi_level;
}
#define BT_PROFILE_PROTOCOL_MASK GENMASK(7, 4)
static void _update_bt_info(struct rtw89_dev *rtwdev, u8 *buf, u32 len)
@ -5600,7 +5911,8 @@ static void _update_bt_info(struct rtw89_dev *rtwdev, u8 *buf, u32 len)
btinfo.val = bt->raw_info[BTC_BTINFO_H0];
/* raw val is dBm unit, translate from -100~ 0dBm to 0~100%*/
b->rssi = chip->ops->btc_get_bt_rssi(rtwdev, btinfo.hb0.rssi);
btc->dm.trx_info.bt_rssi = b->rssi;
bt->rssi_level = _update_bt_rssi_level(rtwdev, b->rssi);
btc->dm.trx_info.bt_rssi = bt->rssi_level;
/* parse raw info high-Byte1 */
btinfo.val = bt->raw_info[BTC_BTINFO_H1];
@ -5804,22 +6116,22 @@ void rtw89_btc_ntfy_radio_state(struct rtw89_dev *rtwdev, enum btc_rfctrl rf_sta
chip->ops->btc_init_cfg(rtwdev);
} else {
rtw89_btc_fw_en_rpt(rtwdev, RPT_EN_ALL, false);
if (rf_state == BTC_RFCTRL_WL_OFF)
if (rf_state == BTC_RFCTRL_FW_CTRL)
_write_scbd(rtwdev, BTC_WSCB_ACTIVE, false);
else if (rf_state == BTC_RFCTRL_WL_OFF)
_write_scbd(rtwdev, BTC_WSCB_ALL, false);
else if (rf_state == BTC_RFCTRL_LPS_WL_ON &&
wl->status.map.lps_pre != BTC_LPS_OFF)
else
_write_scbd(rtwdev, BTC_WSCB_ACTIVE, false);
if (rf_state == BTC_RFCTRL_LPS_WL_ON &&
wl->status.map.lps_pre != BTC_LPS_OFF)
_update_bt_scbd(rtwdev, true);
}
btc->dm.cnt_dm[BTC_DCNT_BTCNT_HANG] = 0;
if (wl->status.map.lps_pre == BTC_LPS_OFF &&
wl->status.map.lps_pre != wl->status.map.lps)
btc->dm.tdma_instant_excute = 1;
else
btc->dm.tdma_instant_excute = 0;
btc->dm.tdma_instant_excute = 1;
_run_coex(rtwdev, BTC_RSN_NTFY_RADIO_STATE);
btc->dm.tdma_instant_excute = 0;
wl->status.map.rf_off_pre = wl->status.map.rf_off;
wl->status.map.lps_pre = wl->status.map.lps;
}
@ -6058,6 +6370,13 @@ static void rtw89_btc_ntfy_wl_sta_iter(void *data, struct ieee80211_sta *sta)
dm->trx_info.tx_tp = link_info_t->tx_throughput;
dm->trx_info.rx_tp = link_info_t->rx_throughput;
/* Trigger coex-run if 0x10980 reg-value is diff with coex setup */
if ((dm->wl_btg_rx_rb != dm->wl_btg_rx &&
dm->wl_btg_rx_rb != BTC_BTGCTRL_BB_GNT_NOTFOUND) ||
(dm->wl_pre_agc_rb != dm->wl_pre_agc &&
dm->wl_pre_agc_rb != BTC_PREAGC_NOTFOUND))
iter_data->is_sta_change = true;
if (is_sta_change)
iter_data->is_sta_change = true;
@ -6443,8 +6762,9 @@ static void _show_bt_info(struct rtw89_dev *rtwdev, struct seq_file *m)
bt_linfo->pan_desc.active ? "Y" : "N");
seq_printf(m,
" %-15s : rssi:%ddBm, tx_rate:%dM, %s%s%s",
" %-15s : rssi:%ddBm(lvl:%d), tx_rate:%dM, %s%s%s",
"[link]", bt_linfo->rssi - 100,
bt->rssi_level,
bt_linfo->tx_3m ? 3 : 2,
bt_linfo->status.map.inq_pag ? " inq-page!!" : "",
bt_linfo->status.map.acl_busy ? " acl_busy!!" : "",
@ -6553,6 +6873,8 @@ static void _show_bt_info(struct rtw89_dev *rtwdev, struct seq_file *m)
case BTC_CXP_ ## e | BTC_POLICY_EXT_BIT: return #e
#define CASE_BTC_SLOT_STR(e) case CXST_ ## e: return #e
#define CASE_BTC_EVT_STR(e) case CXEVNT_## e: return #e
#define CASE_BTC_INIT(e) case BTC_MODE_## e: return #e
#define CASE_BTC_ANTPATH_STR(e) case BTC_ANT_##e: return #e
static const char *steps_to_str(u16 step)
{
@ -6633,8 +6955,9 @@ static const char *steps_to_str(u16 step)
CASE_BTC_POLICY_STR(FIX_TD3060);
CASE_BTC_POLICY_STR(FIX_TD2080);
CASE_BTC_POLICY_STR(FIX_TDW1B1);
CASE_BTC_POLICY_STR(FIX_TD4020);
CASE_BTC_POLICY_STR(FIX_TD4010ISO);
CASE_BTC_POLICY_STR(FIX_TD4010ISO_DL);
CASE_BTC_POLICY_STR(FIX_TD4010ISO_UL);
CASE_BTC_POLICY_STR(PFIX_TD3030);
CASE_BTC_POLICY_STR(PFIX_TD5050);
CASE_BTC_POLICY_STR(PFIX_TD2030);
@ -6727,6 +7050,37 @@ static const char *id_to_evt(u32 id)
}
}
static const char *id_to_mode(u8 id)
{
switch (id) {
CASE_BTC_INIT(NORMAL);
CASE_BTC_INIT(WL);
CASE_BTC_INIT(BT);
CASE_BTC_INIT(WLOFF);
default:
return "unknown";
}
}
static const char *id_to_ant(u32 id)
{
switch (id) {
CASE_BTC_ANTPATH_STR(WPOWERON);
CASE_BTC_ANTPATH_STR(WINIT);
CASE_BTC_ANTPATH_STR(WONLY);
CASE_BTC_ANTPATH_STR(WOFF);
CASE_BTC_ANTPATH_STR(W2G);
CASE_BTC_ANTPATH_STR(W5G);
CASE_BTC_ANTPATH_STR(W25G);
CASE_BTC_ANTPATH_STR(FREERUN);
CASE_BTC_ANTPATH_STR(WRFK);
CASE_BTC_ANTPATH_STR(BRFK);
CASE_BTC_ANTPATH_STR(MAX);
default:
return "unknown";
}
}
static
void seq_print_segment(struct seq_file *m, const char *prefix, u16 *data,
u8 len, u8 seg_len, u8 start_idx, u8 ring_len)
@ -6781,12 +7135,13 @@ static void _show_dm_info(struct rtw89_dev *rtwdev, struct seq_file *m)
(btc->ctrl.manual ? "(Manual)" : "(Auto)"));
seq_printf(m,
" %-15s : type:%s, reason:%s(), action:%s(), ant_path:%ld, run_cnt:%d\n",
" %-15s : type:%s, reason:%s(), action:%s(), ant_path:%s, init_mode:%s, run_cnt:%d\n",
"[status]",
module->ant.type == BTC_ANT_SHARED ? "shared" : "dedicated",
steps_to_str(dm->run_reason),
steps_to_str(dm->run_action | BTC_ACT_EXT_BIT),
FIELD_GET(GENMASK(7, 0), dm->set_ant_path),
id_to_ant(FIELD_GET(GENMASK(7, 0), dm->set_ant_path)),
id_to_mode(wl->coex_mode),
dm->cnt_dm[BTC_DCNT_RUN]);
_show_dm_step(rtwdev, m);
@ -7689,7 +8044,8 @@ static void _get_gnt(struct rtw89_dev *rtwdev, struct rtw89_mac_ax_coex_gnt *gnt
struct rtw89_mac_ax_gnt *gnt;
u32 val, status;
if (chip->chip_id == RTL8852A || chip->chip_id == RTL8852B) {
if (chip->chip_id == RTL8852A || chip->chip_id == RTL8852B ||
chip->chip_id == RTL8851B) {
rtw89_mac_read_lte(rtwdev, R_AX_LTE_SW_CFG_1, &val);
rtw89_mac_read_lte(rtwdev, R_AX_GNT_VAL, &status);
@ -7751,27 +8107,25 @@ static void _show_mreg_v1(struct rtw89_dev *rtwdev, struct seq_file *m)
bt->scbd, cx->cnt_bt[BTC_BCNT_SCBDREAD],
cx->cnt_bt[BTC_BCNT_SCBDUPDATE]);
/* To avoid I/O if WL LPS or power-off */
if (!wl->status.map.lps && !wl->status.map.rf_off) {
btc->dm.pta_owner = rtw89_mac_get_ctrl_path(rtwdev);
btc->dm.pta_owner = rtw89_mac_get_ctrl_path(rtwdev);
_get_gnt(rtwdev, &gnt_cfg);
_get_gnt(rtwdev, &gnt_cfg);
gnt = gnt_cfg.band[0];
seq_printf(m,
" %-15s : pta_owner:%s, phy-0[gnt_wl:%s-%d/gnt_bt:%s-%d], ",
"[gnt_status]",
chip->chip_id == RTL8852C ? "HW" :
btc->dm.pta_owner == BTC_CTRL_BY_WL ? "WL" : "BT",
gnt.gnt_wl_sw_en ? "SW" : "HW", gnt.gnt_wl,
gnt.gnt_bt_sw_en ? "SW" : "HW", gnt.gnt_bt);
gnt = gnt_cfg.band[0];
seq_printf(m,
" %-15s : pta_owner:%s, phy-0[gnt_wl:%s-%d/gnt_bt:%s-%d], ",
"[gnt_status]",
chip->chip_id == RTL8852C ? "HW" :
btc->dm.pta_owner == BTC_CTRL_BY_WL ? "WL" : "BT",
gnt.gnt_wl_sw_en ? "SW" : "HW", gnt.gnt_wl,
gnt.gnt_bt_sw_en ? "SW" : "HW", gnt.gnt_bt);
gnt = gnt_cfg.band[1];
seq_printf(m, "phy-1[gnt_wl:%s-%d/gnt_bt:%s-%d]\n",
gnt.gnt_wl_sw_en ? "SW" : "HW",
gnt.gnt_wl,
gnt.gnt_bt_sw_en ? "SW" : "HW",
gnt.gnt_bt);
gnt = gnt_cfg.band[1];
seq_printf(m, "phy-1[gnt_wl:%s-%d/gnt_bt:%s-%d]\n",
gnt.gnt_wl_sw_en ? "SW" : "HW",
gnt.gnt_wl,
gnt.gnt_bt_sw_en ? "SW" : "HW",
gnt.gnt_bt);
}
pcinfo = &pfwinfo->rpt_fbtc_mregval.cinfo;
if (!pcinfo->valid) {
rtw89_debug(rtwdev, RTW89_DBG_BTC,
@ -7855,27 +8209,25 @@ static void _show_mreg_v2(struct rtw89_dev *rtwdev, struct seq_file *m)
bt->scbd, cx->cnt_bt[BTC_BCNT_SCBDREAD],
cx->cnt_bt[BTC_BCNT_SCBDUPDATE]);
/* To avoid I/O if WL LPS or power-off */
if (!wl->status.map.lps && !wl->status.map.rf_off) {
btc->dm.pta_owner = rtw89_mac_get_ctrl_path(rtwdev);
btc->dm.pta_owner = rtw89_mac_get_ctrl_path(rtwdev);
_get_gnt(rtwdev, &gnt_cfg);
_get_gnt(rtwdev, &gnt_cfg);
gnt = gnt_cfg.band[0];
seq_printf(m,
" %-15s : pta_owner:%s, phy-0[gnt_wl:%s-%d/gnt_bt:%s-%d], ",
"[gnt_status]",
chip->chip_id == RTL8852C ? "HW" :
btc->dm.pta_owner == BTC_CTRL_BY_WL ? "WL" : "BT",
gnt.gnt_wl_sw_en ? "SW" : "HW", gnt.gnt_wl,
gnt.gnt_bt_sw_en ? "SW" : "HW", gnt.gnt_bt);
gnt = gnt_cfg.band[0];
seq_printf(m,
" %-15s : pta_owner:%s, phy-0[gnt_wl:%s-%d/gnt_bt:%s-%d], ",
"[gnt_status]",
chip->chip_id == RTL8852C ? "HW" :
btc->dm.pta_owner == BTC_CTRL_BY_WL ? "WL" : "BT",
gnt.gnt_wl_sw_en ? "SW" : "HW", gnt.gnt_wl,
gnt.gnt_bt_sw_en ? "SW" : "HW", gnt.gnt_bt);
gnt = gnt_cfg.band[1];
seq_printf(m, "phy-1[gnt_wl:%s-%d/gnt_bt:%s-%d]\n",
gnt.gnt_wl_sw_en ? "SW" : "HW",
gnt.gnt_wl,
gnt.gnt_bt_sw_en ? "SW" : "HW",
gnt.gnt_bt);
gnt = gnt_cfg.band[1];
seq_printf(m, "phy-1[gnt_wl:%s-%d/gnt_bt:%s-%d]\n",
gnt.gnt_wl_sw_en ? "SW" : "HW",
gnt.gnt_wl,
gnt.gnt_bt_sw_en ? "SW" : "HW",
gnt.gnt_bt);
}
pcinfo = &pfwinfo->rpt_fbtc_mregval.cinfo;
if (!pcinfo->valid) {
rtw89_debug(rtwdev, RTW89_DBG_BTC,

38
drivers/net/wireless/realtek/rtw89/coex.h
View File

@ -142,6 +142,44 @@ enum btc_lps_state {
BTC_LPS_RF_ON = 2
};
#define R_BTC_BB_BTG_RX 0x980
#define R_BTC_BB_PRE_AGC_S1 0x476C
#define R_BTC_BB_PRE_AGC_S0 0x4688
#define B_BTC_BB_GNT_MUX GENMASK(20, 17)
#define B_BTC_BB_PRE_AGC_MASK GENMASK(31, 24)
#define B_BTC_BB_PRE_AGC_VAL BIT(31)
#define BTC_REG_NOTFOUND 0xff
enum btc_ant_div_pos {
BTC_ANT_DIV_MAIN = 0,
BTC_ANT_DIV_AUX = 1,
};
enum btc_get_reg_status {
BTC_CSTATUS_TXDIV_POS = 0,
BTC_CSTATUS_RXDIV_POS = 1,
BTC_CSTATUS_BB_GNT_MUX = 2,
BTC_CSTATUS_BB_GNT_MUX_MON = 3,
BTC_CSTATUS_BB_PRE_AGC = 4,
BTC_CSTATUS_BB_PRE_AGC_MON = 5,
};
enum btc_preagc_type {
BTC_PREAGC_DISABLE,
BTC_PREAGC_ENABLE,
BTC_PREAGC_BB_FWCTRL,
BTC_PREAGC_NOTFOUND,
};
enum btc_btgctrl_type {
BTC_BTGCTRL_DISABLE,
BTC_BTGCTRL_ENABLE,
BTC_BTGCTRL_BB_GNT_FWCTRL,
BTC_BTGCTRL_BB_GNT_NOTFOUND,
};
void rtw89_btc_ntfy_poweron(struct rtw89_dev *rtwdev);
void rtw89_btc_ntfy_poweroff(struct rtw89_dev *rtwdev);
void rtw89_btc_ntfy_init(struct rtw89_dev *rtwdev, u8 mode);

23
drivers/net/wireless/realtek/rtw89/core.h
View File

@ -1706,6 +1706,7 @@ struct rtw89_btc_wl_info {
u8 port_id[RTW89_WIFI_ROLE_MLME_MAX];
u8 rssi_level;
u8 cn_report;
u8 coex_mode;
bool scbd_change;
u32 scbd;
@ -1813,6 +1814,7 @@ struct rtw89_btc_bt_info {
union rtw89_btc_bt_rfk_info_map rfk_info;
u8 raw_info[BTC_BTINFO_MAX]; /* raw bt info from mailbox */
u8 rssi_level;
u32 scbd;
u32 feature;
@ -1829,7 +1831,8 @@ struct rtw89_btc_bt_info {
u32 hi_lna_rx: 1;
u32 scan_rx_low_pri: 1;
u32 scan_info_update: 1;
u32 rsvd: 20;
u32 lna_constrain: 3;
u32 rsvd: 17;
};
struct rtw89_btc_cx {
@ -2307,12 +2310,6 @@ struct rtw89_btc_fbtc_fddt_cell_status {
u8 state_phase; /* [0:3] train state, [4:7] train phase */
} __packed;
struct rtw89_btc_fbtc_fddt_cell_status_v5 {
s8 wl_tx_pwr;
s8 bt_tx_pwr;
s8 bt_rx_gain;
} __packed;
struct rtw89_btc_fbtc_cysta_v3 { /* statistics for cycles */
u8 fver;
u8 rsvd;
@ -2376,9 +2373,9 @@ struct rtw89_btc_fbtc_cysta_v5 { /* statistics for cycles */
struct rtw89_btc_fbtc_cycle_a2dp_empty_info a2dp_ept;
struct rtw89_btc_fbtc_a2dp_trx_stat_v4 a2dp_trx[BTC_CYCLE_SLOT_MAX];
struct rtw89_btc_fbtc_cycle_fddt_info_v5 fddt_trx[BTC_CYCLE_SLOT_MAX];
struct rtw89_btc_fbtc_fddt_cell_status_v5 fddt_cells[FDD_TRAIN_WL_DIRECTION]
[FDD_TRAIN_WL_RSSI_LEVEL]
[FDD_TRAIN_BT_RSSI_LEVEL];
struct rtw89_btc_fbtc_fddt_cell_status fddt_cells[FDD_TRAIN_WL_DIRECTION]
[FDD_TRAIN_WL_RSSI_LEVEL]
[FDD_TRAIN_BT_RSSI_LEVEL];
__le32 except_map;
} __packed;
@ -2511,18 +2508,22 @@ struct rtw89_btc_dm {
u32 noisy_level: 3;
u32 coex_info_map: 8;
u32 bt_only: 1;
u32 wl_btg_rx: 1;
u32 wl_btg_rx: 2;
u32 trx_para_level: 8;
u32 wl_stb_chg: 1;
u32 pta_owner: 1;
u32 tdma_instant_excute: 1;
u32 wl_btg_rx_rb: 2;
u16 slot_dur[CXST_MAX];
u8 run_reason;
u8 run_action;
u8 wl_pre_agc: 2;
u8 wl_lna2: 1;
u8 wl_pre_agc_rb: 2;
};
struct rtw89_btc_ctrl {

3
drivers/net/wireless/realtek/rtw89/mac.c
View File

@ -5507,7 +5507,8 @@ bool rtw89_mac_get_ctrl_path(struct rtw89_dev *rtwdev)
if (chip->chip_id == RTL8852C)
return false;
else if (chip->chip_id == RTL8852A || chip->chip_id == RTL8852B)
else if (chip->chip_id == RTL8852A || chip->chip_id == RTL8852B ||
chip->chip_id == RTL8851B)
val = rtw89_read8_mask(rtwdev, R_AX_SYS_SDIO_CTRL + 3,
B_AX_LTE_MUX_CTRL_PATH >> 24);

1072
drivers/net/wireless/realtek/rtw89/mac_be.c
View File

File diff suppressed because it is too large Load Diff

541
drivers/net/wireless/realtek/rtw89/reg.h
View File

@ -4924,6 +4924,24 @@
B_BE_CR_WRFF_OVERFLOW_ERR_INT_EN | \
B_BE_CR_WRFF_UNDERFLOW_ERR_INT_EN)
#define R_BE_DISP_FWD_WLAN_0 0x8938
#define B_BE_FWD_WLAN_CPU_TYPE_13_MASK GENMASK(31, 30)
#define B_BE_FWD_WLAN_CPU_TYPE_12_MASK GENMASK(29, 28)
#define B_BE_FWD_WLAN_CPU_TYPE_11_MASK GENMASK(27, 26)
#define B_BE_FWD_WLAN_CPU_TYPE_10_MASK GENMASK(25, 24)
#define B_BE_FWD_WLAN_CPU_TYPE_9_MASK GENMASK(23, 22)
#define B_BE_FWD_WLAN_CPU_TYPE_8_MASK GENMASK(21, 20)
#define B_BE_FWD_WLAN_CPU_TYPE_7_MASK GENMASK(19, 18)
#define B_BE_FWD_WLAN_CPU_TYPE_6_MASK GENMASK(17, 16)
#define B_BE_FWD_WLAN_CPU_TYPE_5_MASK GENMASK(15, 14)
#define B_BE_FWD_WLAN_CPU_TYPE_4_MASK GENMASK(13, 12)
#define B_BE_FWD_WLAN_CPU_TYPE_3_MASK GENMASK(11, 10)
#define B_BE_FWD_WLAN_CPU_TYPE_2_MASK GENMASK(9, 8)
#define B_BE_FWD_WLAN_CPU_TYPE_1_MASK GENMASK(7, 6)
#define B_BE_FWD_WLAN_CPU_TYPE_0_CTL_MASK GENMASK(5, 4)
#define B_BE_FWD_WLAN_CPU_TYPE_0_MNG_MASK GENMASK(3, 2)
#define B_BE_FWD_WLAN_CPU_TYPE_0_DATA_MASK GENMASK(1, 0)
#define R_BE_WDE_PKTBUF_CFG 0x8C08
#define B_BE_WDE_FREE_PAGE_NUM_MASK GENMASK(28, 16)
#define B_BE_WDE_START_BOUND_MASK GENMASK(14, 8)
@ -5387,11 +5405,47 @@
#define B_BE_PKTIN_ERR_IMR_SET (B_BE_SW_MERGE_ERR_INT_EN | \
B_BE_GET_NULL_PKTID_ERR_INT_EN)
#define R_BE_HDR_SHCUT_SETTING 0x9B00
#define B_BE_TX_ADDR_MLD_TO_LIK BIT(4)
#define B_BE_TX_HW_SEC_HDR_EN BIT(3)
#define B_BE_TX_MAC_MPDU_PROC_EN BIT(2)
#define B_BE_TX_HW_ACK_POLICY_EN BIT(1)
#define B_BE_TX_HW_SEQ_EN BIT(0)
#define R_BE_MPDU_TX_ERR_IMR 0x9BF4
#define B_BE_TX_TIMEOUT_ERR_EN BIT(0)
#define B_BE_MPDU_TX_ERR_IMR_CLR B_BE_TX_TIMEOUT_ERR_EN
#define B_BE_MPDU_TX_ERR_IMR_SET 0
#define R_BE_MPDU_PROC 0x9C00
#define B_BE_PORT_SEL BIT(29)
#define B_BE_WPKT_WLANCPU_QSEL_MASK GENMASK(28, 27)
#define B_BE_WPKT_DATACPU_QSEL_MASK GENMASK(26, 25)
#define B_BE_WPKT_FW_RLS BIT(24)
#define B_BE_FWD_RPKT_MASK GENMASK(23, 16)
#define B_BE_FWD_WPKT_MASK GENMASK(15, 8)
#define B_BE_RXFWD_PRIO_MASK GENMASK(5, 4)
#define B_BE_RXFWD_EN BIT(3)
#define B_BE_DROP_NONDMA_PPDU BIT(2)
#define B_BE_APPEND_FCS BIT(0)
#define R_BE_CUT_AMSDU_CTRL 0x9C94
#define B_BE_EN_CUT_AMSDU BIT(31)
#define B_BE_CUT_AMSDU_CHKLEN_EN BIT(30)
#define B_BE_CA_CHK_ADDRCAM_EN BIT(29)
#define B_BE_MPDU_CUT_CTRL_EN BIT(24)
#define B_BE_CUT_AMSDU_CHKLEN_L_TH_MASK GENMASK(23, 16)
#define B_BE_CUT_AMSDU_CHKLEN_H_TH_MASK GENMASK(15, 0)
#define R_BE_RX_HDRTRNS 0x9CC0
#define B_BE_RX_MGN_MLD_ADDR_EN BIT(6)
#define B_BE_HDR_INFO_MASK GENMASK(5, 4)
#define B_BE_HC_ADDR_HIT_EN BIT(3)
#define B_BE_RX_ADDR_LINK_TO_MLO BIT(2)
#define B_BE_HDR_CNV BIT(1)
#define B_BE_RX_HDR_CNV_EN BIT(0)
#define TRXCFG_MPDU_PROC_RX_HDR_CONV 0x00000000
#define R_BE_MPDU_RX_ERR_IMR 0x9CF4
#define B_BE_LEN_ERR_IMR BIT(3)
#define B_BE_TIMEOUT_ERR_IMR BIT(1)
@ -5472,6 +5526,22 @@
#define B_BE_RX_HANG_ERROR BIT(1)
#define B_BE_TX_HANG_ERROR BIT(0)
#define R_BE_TXPKTCTL_MPDUINFO_CFG 0x9F10
#define B_BE_MPDUINFO_FEN BIT(31)
#define B_BE_MPDUINFO_PKTID_MASK GENMASK(27, 16)
#define B_BE_MPDUINFO_B1_BADDR_MASK GENMASK(5, 0)
#define MPDU_INFO_B1_OFST 18
#define R_BE_TXPKTCTL_B0_PRELD_CFG0 0x9F48
#define B_BE_B0_PRELD_FEN BIT(31)
#define B_BE_B0_PRELD_USEMAXSZ_MASK GENMASK(25, 16)
#define B_BE_B0_PRELD_CAM_G1ENTNUM_MASK GENMASK(12, 8)
#define B_BE_B0_PRELD_CAM_G0ENTNUM_MASK GENMASK(4, 0)
#define R_BE_TXPKTCTL_B0_PRELD_CFG1 0x9F4C
#define B_BE_B0_PRELD_NXT_TXENDWIN_MASK GENMASK(11, 8)
#define B_BE_B0_PRELD_NXT_RSVMINSZ_MASK GENMASK(7, 0)
#define R_BE_TXPKTCTL_B0_ERRFLAG_IMR 0x9F78
#define B_BE_B0_IMR_DBG_USRCTL_RLSBMPLEN BIT(25)
#define B_BE_B0_IMR_DBG_USRCTL_RDNRLSCMD BIT(24)
@ -5502,6 +5572,16 @@
B_BE_B0_IMR_ERR_PRELD_RLSPKTSZERR | \
B_BE_B0_IMR_ERR_PRELD_ENTNUMCFG)
#define R_BE_TXPKTCTL_B1_PRELD_CFG0 0x9F88
#define B_BE_B1_PRELD_FEN BIT(31)
#define B_BE_B1_PRELD_USEMAXSZ_MASK GENMASK(25, 16)
#define B_BE_B1_PRELD_CAM_G1ENTNUM_MASK GENMASK(12, 8)
#define B_BE_B1_PRELD_CAM_G0ENTNUM_MASK GENMASK(4, 0)
#define R_BE_TXPKTCTL_B1_PRELD_CFG1 0x9F8C
#define B_BE_B1_PRELD_NXT_TXENDWIN_MASK GENMASK(11, 8)
#define B_BE_B1_PRELD_NXT_RSVMINSZ_MASK GENMASK(7, 0)
#define R_BE_TXPKTCTL_B1_ERRFLAG_IMR 0x9FB8
#define B_BE_B1_IMR_DBG_USRCTL_RLSBMPLEN BIT(25)
#define B_BE_B1_IMR_DBG_USRCTL_RDNRLSCMD BIT(24)
@ -5532,6 +5612,12 @@
B_BE_B1_IMR_ERR_PRELD_RLSPKTSZERR | \
B_BE_B1_IMR_ERR_PRELD_ENTNUMCFG)
#define R_BE_MLO_INIT_CTL 0xA114
#define B_BE_MLO_TABLE_INIT_DONE BIT(31)
#define B_BE_MLO_TABLE_CLR_DONE BIT(30)
#define B_BE_MLO_TABLE_REINIT BIT(23)
#define B_BE_MLO_TABLE_HW_FLAG_CLR BIT(22)
#define R_BE_MLO_ERR_IDCT_IMR 0xA128
#define B_BE_MLO_ERR_IDCT_IMR_0 BIT(31)
#define B_BE_MLO_ERR_IDCT_IMR_1 BIT(30)
@ -5561,6 +5647,30 @@
#define B_BE_PLRLS_CTL_EVT01_ISR BIT(1)
#define B_BE_PLRLS_CTL_FRZTO_ISR BIT(0)
#define R_BE_SS_CTRL 0xA310
#define B_BE_SS_INIT_DONE BIT(31)
#define B_BE_WDE_STA_DIS BIT(30)
#define B_BE_WARM_INIT BIT(29)
#define B_BE_BAND_TRIG_EN BIT(28)
#define B_BE_RMAC_REQ_DIS BIT(27)
#define B_BE_DLYTX_SEL_MASK GENMASK(25, 24)
#define B_BE_WMM3_SWITCH_MASK GENMASK(23, 22)
#define B_BE_WMM2_SWITCH_MASK GENMASK(21, 20)
#define B_BE_WMM1_SWITCH_MASK GENMASK(19, 18)
#define B_BE_WMM0_SWITCH_MASK GENMASK(17, 16)
#define B_BE_STA_OPTION_CR BIT(15)
#define B_BE_EMLSR_STA_EMPTY_EN BIT(11)
#define B_BE_MLO_HW_CHGLINK_EN BIT(10)
#define B_BE_BAND1_TRIG_EN BIT(9)
#define B_BE_RMAC1_REQ_DIS BIT(8)
#define B_BE_MRT_SRAM_EN BIT(7)
#define B_BE_MRT_INIT_EN BIT(6)
#define B_BE_AVG_LENG_EN BIT(5)
#define B_BE_AVG_INIT_EN BIT(4)
#define B_BE_LENG_INIT_EN BIT(2)
#define B_BE_PMPA_INIT_EN BIT(1)
#define B_BE_SS_EN BIT(0)
#define R_BE_INTERRUPT_MASK_REG 0xA3F0
#define B_BE_PLE_B_PKTID_ERR_IMR BIT(2)
#define B_BE_RPT_TIMEOUT_IMR BIT(1)
@ -5705,6 +5815,13 @@
#define B_BE_ADDRSRCH_EN BIT(1)
#define B_BE_BTCOEX_EN BIT(0)
#define R_BE_CMAC_SHARE_ACQCHK_CFG_0 0x0E010
#define B_BE_ACQCHK_ERR_FLAG_MASK GENMASK(31, 24)
#define B_BE_R_ACQCHK_ENTRY_IDX_SEL_MASK GENMASK(7, 4)
#define B_BE_MACID_ACQ_GRP1_CLR_P BIT(3)
#define B_BE_MACID_ACQ_GRP0_CLR_P BIT(2)
#define B_BE_R_MACID_ACQ_CHK_EN BIT(0)
#define R_BE_CMAC_FUNC_EN 0x10000
#define R_BE_CMAC_FUNC_EN_C1 0x14000
#define B_BE_CMAC_CRPRT BIT(31)
@ -5756,6 +5873,40 @@
B_BE_RMAC_CKEN | B_BE_TXTIME_CKEN | B_BE_RESP_PKTCTL_CKEN | \
B_BE_SIGB_CKEN)
#define R_BE_TX_SUB_BAND_VALUE 0x10088
#define R_BE_TX_SUB_BAND_VALUE_C1 0x14088
#define B_BE_PRI20_BITMAP_MASK GENMASK(31, 16)
#define BE_PRI20_BITMAP_MAX 15
#define B_BE_TXSB_160M_MASK GENMASK(15, 12)
#define S_BE_TXSB_160M_0 0
#define S_BE_TXSB_160M_1 1
#define B_BE_TXSB_80M_MASK GENMASK(11, 8)
#define S_BE_TXSB_80M_0 0
#define S_BE_TXSB_80M_2 2
#define S_BE_TXSB_80M_4 4
#define B_BE_TXSB_40M_MASK GENMASK(7, 4)
#define S_BE_TXSB_40M_0 0
#define S_BE_TXSB_40M_1 1
#define S_BE_TXSB_40M_4 4
#define B_BE_TXSB_20M_MASK GENMASK(3, 0)
#define S_BE_TXSB_20M_8 8
#define S_BE_TXSB_20M_4 4
#define S_BE_TXSB_20M_2 2
#define R_BE_PTCL_RRSR0 0x1008C
#define R_BE_PTCL_RRSR0_C1 0x1408C
#define B_BE_RRSR_HE_MASK GENMASK(31, 24)
#define B_BE_RRSR_VHT_MASK GENMASK(23, 16)
#define B_BE_RRSR_HT_MASK GENMASK(15, 8)
#define B_BE_RRSR_OFDM_MASK GENMASK(7, 0)
#define R_BE_PTCL_RRSR1 0x10090
#define R_BE_PTCL_RRSR1_C1 0x14090
#define B_BE_RRSR_EHT_MASK GENMASK(23, 16)
#define B_BE_RRSR_RATE_EN_MASK GENMASK(12, 8)
#define B_BE_RSC_MASK GENMASK(7, 6)
#define B_BE_RRSR_CCK_MASK GENMASK(3, 0)
#define R_BE_CMAC_ERR_IMR 0x10160
#define R_BE_CMAC_ERR_IMR_C1 0x14160
#define B_BE_CMAC_FW_ERR_IDCT_EN BIT(16)
@ -5843,6 +5994,55 @@
#define B_BE_P0_SYNC_PORT_SRC_SEL_MASK GENMASK(26, 24)
#define B_BE_P0_TSFTR_SYNC_OFFSET_MASK GENMASK(18, 0)
#define R_BE_EDCA_BCNQ_PARAM 0x10324
#define R_BE_EDCA_BCNQ_PARAM_C1 0x14324
#define B_BE_BCNQ_CW_MASK GENMASK(31, 24)
#define B_BE_BCNQ_AIFS_MASK GENMASK(23, 16)
#define BCN_IFS_25US 0x19
#define B_BE_PIFS_MASK GENMASK(15, 8)
#define B_BE_FORCE_BCN_IFS_MASK GENMASK(7, 0)
#define R_BE_PREBKF_CFG_0 0x10338
#define R_BE_PREBKF_CFG_0_C1 0x14338
#define B_BE_100NS_TIME_MASK GENMASK(28, 24)
#define B_BE_RX_AIR_END_TIME_MASK GENMASK(22, 16)
#define B_BE_MACTX_LATENCY_MASK GENMASK(10, 8)
#define B_BE_PREBKF_TIME_MASK GENMASK(4, 0)
#define R_BE_CCA_CFG_0 0x10340
#define R_BE_CCA_CFG_0_C1 0x14340
#define B_BE_R_SIFS_AGGR_TIME_V1_MASK GENMASK(31, 24)
#define B_BE_EDCCA_SEC160_EN BIT(23)
#define B_BE_EDCCA_SEC80_EN BIT(22)
#define B_BE_EDCCA_SEC40_EN BIT(21)
#define B_BE_EDCCA_SEC20_EN BIT(20)
#define B_BE_SEC160_EN BIT(19)
#define B_BE_CCA_BITMAP_EN BIT(18)
#define B_BE_TXPKTCTL_RST_EDCA_EN BIT(17)
#define B_BE_WMAC_RST_EDCA_EN BIT(16)
#define B_BE_TXFAIL_BRK_TXOP_EN BIT(11)
#define B_BE_EDCCA_PER20_BITMAP_SIFS_EN BIT(10)
#define B_BE_NO_GNT_WL_BRK_TXOP_EN BIT(9)
#define B_BE_NAV_BRK_TXOP_EN BIT(8)
#define B_BE_TX_NAV_EN BIT(7)
#define B_BE_BCN_IGNORE_EDCCA BIT(6)
#define B_BE_NO_GNT_WL_EN BIT(5)
#define B_BE_EDCCA_EN BIT(4)
#define B_BE_SEC80_EN BIT(3)
#define B_BE_SEC40_EN BIT(2)
#define B_BE_SEC20_EN BIT(1)
#define B_BE_CCA_EN BIT(0)
#define R_BE_CTN_CFG_0 0x1034C
#define R_BE_CTN_CFG_0_C1 0x1434C
#define B_BE_OTHER_LINK_BKF_BLK_TX_THD_MASK GENMASK(30, 24)
#define B_BE_CCK_SIFS_COMP_MASK GENMASK(22, 16)
#define B_BE_PIFS_TIMEUNIT_MASK GENMASK(15, 14)
#define B_BE_PREBKF_TIME_NONAC_MASK GENMASK(12, 8)
#define B_BE_SR_TX_EN BIT(2)
#define B_BE_NAV_BLK_MGQ BIT(1)
#define B_BE_NAV_BLK_HGQ BIT(0)
#define R_BE_MUEDCA_BE_PARAM_0 0x10350
#define R_BE_MUEDCA_BK_PARAM_0 0x10354
#define R_BE_MUEDCA_VI_PARAM_0 0x10358
@ -5855,6 +6055,63 @@
#define B_BE_SET_MUEDCATIMER_TF_0 BIT(4)
#define B_BE_MUEDCA_EN_0 BIT(0)
#define R_BE_TB_CHK_CCA_NAV 0x103AC
#define R_BE_TB_CHK_CCA_NAV_C1 0x143AC
#define B_BE_TB_CHK_TX_NAV BIT(15)
#define B_BE_TB_CHK_INTRA_NAV BIT(14)
#define B_BE_TB_CHK_BASIC_NAV BIT(13)
#define B_BE_TB_CHK_NO_GNT_WL BIT(12)
#define B_BE_TB_CHK_EDCCA_S160 BIT(11)
#define B_BE_TB_CHK_EDCCA_S80 BIT(10)
#define B_BE_TB_CHK_EDCCA_S40 BIT(9)
#define B_BE_TB_CHK_EDCCA_S20 BIT(8)
#define B_BE_TB_CHK_CCA_S160 BIT(7)
#define B_BE_TB_CHK_CCA_S80 BIT(6)
#define B_BE_TB_CHK_CCA_S40 BIT(5)
#define B_BE_TB_CHK_CCA_S20 BIT(4)
#define B_BE_TB_CHK_EDCCA_BITMAP BIT(3)
#define B_BE_TB_CHK_CCA_BITMAP BIT(2)
#define B_BE_TB_CHK_EDCCA_P20 BIT(1)
#define B_BE_TB_CHK_CCA_P20 BIT(0)
#define R_BE_HE_SIFS_CHK_CCA_NAV 0x103B4
#define R_BE_HE_SIFS_CHK_CCA_NAV_C1 0x143B4
#define B_BE_HE_SIFS_CHK_TX_NAV BIT(15)
#define B_BE_HE_SIFS_CHK_INTRA_NAV BIT(14)
#define B_BE_HE_SIFS_CHK_BASIC_NAV BIT(13)
#define B_BE_HE_SIFS_CHK_NO_GNT_WL BIT(12)
#define B_BE_HE_SIFS_CHK_EDCCA_S160 BIT(11)
#define B_BE_HE_SIFS_CHK_EDCCA_S80 BIT(10)
#define B_BE_HE_SIFS_CHK_EDCCA_S40 BIT(9)
#define B_BE_HE_SIFS_CHK_EDCCA_S20 BIT(8)
#define B_BE_HE_SIFS_CHK_CCA_S160 BIT(7)
#define B_BE_HE_SIFS_CHK_CCA_S80 BIT(6)
#define B_BE_HE_SIFS_CHK_CCA_S40 BIT(5)
#define B_BE_HE_SIFS_CHK_CCA_S20 BIT(4)
#define B_BE_HE_SIFS_CHK_EDCCA_BITMAP BIT(3)
#define B_BE_HE_SIFS_CHK_CCA_BITMAP BIT(2)
#define B_BE_HE_SIFS_CHK_EDCCA_P20 BIT(1)
#define B_BE_HE_SIFS_CHK_CCA_P20 BIT(0)
#define R_BE_HE_CTN_CHK_CCA_NAV 0x103C4
#define R_BE_HE_CTN_CHK_CCA_NAV_C1 0x143C4
#define B_BE_HE_CTN_CHK_TX_NAV BIT(15)
#define B_BE_HE_CTN_CHK_INTRA_NAV BIT(14)
#define B_BE_HE_CTN_CHK_BASIC_NAV BIT(13)
#define B_BE_HE_CTN_CHK_NO_GNT_WL BIT(12)
#define B_BE_HE_CTN_CHK_EDCCA_S160 BIT(11)
#define B_BE_HE_CTN_CHK_EDCCA_S80 BIT(10)
#define B_BE_HE_CTN_CHK_EDCCA_S40 BIT(9)
#define B_BE_HE_CTN_CHK_EDCCA_S20 BIT(8)
#define B_BE_HE_CTN_CHK_CCA_S160 BIT(7)
#define B_BE_HE_CTN_CHK_CCA_S80 BIT(6)
#define B_BE_HE_CTN_CHK_CCA_S40 BIT(5)
#define B_BE_HE_CTN_CHK_CCA_S20 BIT(4)
#define B_BE_HE_CTN_CHK_EDCCA_BITMAP BIT(3)
#define B_BE_HE_CTN_CHK_CCA_BITMAP BIT(2)
#define B_BE_HE_CTN_CHK_EDCCA_P20 BIT(1)
#define B_BE_HE_CTN_CHK_CCA_P20 BIT(0)
#define R_BE_SCHEDULE_ERR_IMR 0x103E8
#define R_BE_SCHEDULE_ERR_IMR_C1 0x143E8
#define B_BE_FSM_TIMEOUT_ERR_INT_EN BIT(0)
@ -5980,12 +6237,51 @@
#define R_BE_PORT_HGQ_WINDOW_CFG 0x105A0
#define R_BE_PORT_HGQ_WINDOW_CFG_C1 0x145A0
#define R_BE_PTCL_COMMON_SETTING_0 0x10800
#define R_BE_PTCL_COMMON_SETTING_0_C1 0x14800
#define B_BE_PCIE_MODE_MASK GENMASK(15, 14)
#define B_BE_CPUMGQ_LIFETIME_EN BIT(8)
#define B_BE_MGQ_LIFETIME_EN BIT(7)
#define B_BE_LIFETIME_EN BIT(6)
#define B_BE_DIS_PTCL_CLK_GATING BIT(5)
#define B_BE_PTCL_TRIGGER_SS_EN_UL BIT(4)
#define B_BE_PTCL_TRIGGER_SS_EN_1 BIT(3)
#define B_BE_PTCL_TRIGGER_SS_EN_0 BIT(2)
#define B_BE_CMAC_TX_MODE_1 BIT(1)
#define B_BE_CMAC_TX_MODE_0 BIT(0)
#define R_BE_TB_PPDU_CTRL 0x1080C
#define R_BE_TB_PPDU_CTRL_C1 0x1480C
#define B_BE_TB_PPDU_BK_DIS BIT(15)
#define B_BE_TB_PPDU_BE_DIS BIT(14)
#define B_BE_TB_PPDU_VI_DIS BIT(13)
#define B_BE_TB_PPDU_VO_DIS BIT(12)
#define B_BE_QOSNULL_UPD_MUEDCA_EN BIT(3)
#define B_BE_TB_BYPASS_TXPWR BIT(2)
#define B_BE_SW_PREFER_AC_MASK GENMASK(1, 0)
#define R_BE_AMPDU_AGG_LIMIT 0x10810
#define R_BE_AMPDU_AGG_LIMIT_C1 0x14810
#define B_BE_AMPDU_MAX_TIME_MASK GENMASK(31, 24)
#define AMPDU_MAX_TIME 0x9E
#define B_BE_RA_TRY_RATE_AGG_LMT_MASK GENMASK(23, 16)
#define B_BE_RTS_MAX_AGG_NUM_MASK GENMASK(15, 8)
#define B_BE_MAX_AGG_NUM_MASK GENMASK(7, 0)
#define R_BE_AGG_LEN_HT_0 0x10814
#define R_BE_AGG_LEN_HT_0_C1 0x14814
#define B_BE_AMPDU_MAX_LEN_HT_MASK GENMASK(31, 16)
#define B_BE_RTS_TXTIME_TH_MASK GENMASK(15, 8)
#define B_BE_RTS_LEN_TH_MASK GENMASK(7, 0)
#define R_BE_SIFS_SETTING 0x10824
#define R_BE_SIFS_SETTING_C1 0x14824
#define B_BE_HW_CTS2SELF_PKT_LEN_TH_MASK GENMASK(31, 24)
#define B_BE_HW_CTS2SELF_PKT_LEN_TH_TWW_MASK GENMASK(23, 18)
#define B_BE_HW_CTS2SELF_EN BIT(16)
#define B_BE_SPEC_SIFS_OFDM_PTCL_MASK GENMASK(15, 8)
#define B_BE_SPEC_SIFS_CCK_PTCL_MASK GENMASK(7, 0)
#define R_BE_MBSSID_DROP_0 0x1083C
#define R_BE_MBSSID_DROP_0_C1 0x1483C
#define B_BE_GI_LTF_FB_SEL BIT(30)
@ -6084,6 +6380,24 @@
#define B_BE_TXPRT_FULL_DROP_ERR BIT(9)
#define B_BE_F2PCMDRPT_FULL_DROP_ERR BIT(8)
#define R_BE_PTCL_FSM_MON 0x108E8
#define R_BE_PTCL_FSM_MON_C1 0x148E8
#define B_BE_PTCL_FSM2_TO_MODE BIT(30)
#define B_BE_PTCL_FSM2_TO_THR_MASK GENMASK(29, 24)
#define B_BE_PTCL_FSM1_TO_MODE BIT(22)
#define B_BE_PTCL_FSM1_TO_THR_MASK GENMASK(21, 16)
#define B_BE_PTCL_FSM0_TO_MODE BIT(14)
#define B_BE_PTCL_FSM0_TO_THR_MASK GENMASK(13, 8)
#define B_BE_PTCL_TX_ARB_TO_MODE BIT(6)
#define B_BE_PTCL_TX_ARB_TO_THR_MASK GENMASK(5, 0)
#define R_BE_PTCL_TX_CTN_SEL 0x108EC
#define R_BE_PTCL_TX_CTN_SEL_C1 0x148EC
#define B_BE_PTCL_TXOP_STAT BIT(8)
#define B_BE_PTCL_BUSY BIT(7)
#define B_BE_PTCL_DROP BIT(5)
#define B_BE_PTCL_TX_QUEUE_IDX_MASK GENMASK(4, 0)
#define R_BE_RX_ERROR_FLAG 0x10C00
#define R_BE_RX_ERROR_FLAG_C1 0x14C00
#define B_BE_RX_CSI_NOT_RELEASE_ERROR BIT(31)
@ -6198,6 +6512,15 @@
B_BE_RX_RU0_FSM_HANG_ERROR_IMR | \
B_BE_RX_GET_NULL_PKT_ERROR_IMR)
#define R_BE_RX_CTRL_1 0x10C0C
#define R_BE_RX_CTRL_1_C1 0x14C0C
#define B_BE_RXDMA_TXRPT_QUEUE_ID_SW_MASK GENMASK(30, 25)
#define B_BE_RXDMA_F2PCMDRPT_QUEUE_ID_SW_MASK GENMASK(23, 18)
#define B_BE_RXDMA_TXRPT_PORT_ID_SW_MASK GENMASK(17, 14)
#define B_BE_RXDMA_F2PCMDRPT_PORT_ID_SW_MASK GENMASK(13, 10)
#define B_BE_DBG_SEL_MASK GENMASK(1, 0)
#define WLCPU_RXCH2_QID 0xA
#define R_BE_TX_ERROR_FLAG 0x10C6C
#define R_BE_TX_ERROR_FLAG_C1 0x14C6C
#define B_BE_TX_RU0_FSM_HANG_ERROR BIT(31)
@ -6353,6 +6676,15 @@
#define B_BE_UPD_HGQMD BIT(1)
#define B_BE_UPD_TIMIE BIT(0)
#define R_BE_WMTX_TCR_BE_4 0x10E2C
#define R_BE_WMTX_TCR_BE_4_C1 0x14E2C
#define B_BE_UL_EHT_MUMIMO_LTF_MODE BIT(30)
#define B_BE_UL_HE_MUMIMO_LTF_MODE BIT(29)
#define B_BE_EHT_HE_PPDU_4XLTF_ZLD_USTIMER_MASK GENMASK(28, 24)
#define B_BE_EHT_HE_PPDU_2XLTF_ZLD_USTIMER_MASK GENMASK(20, 16)
#define B_BE_NON_LEGACY_PPDU_ZLD_USTIMER_MASK GENMASK(12, 8)
#define B_BE_LEGACY_PPDU_ZLD_USTIMER_MASK GENMASK(4, 0)
#define R_BE_RSP_CHK_SIG 0x11000
#define R_BE_RSP_CHK_SIG_C1 0x15000
#define B_BE_RSP_STATIC_RTS_CHK_SERV_BW_EN BIT(30)
@ -6385,6 +6717,46 @@
#define WMAC_SPEC_SIFS_OFDM_1115E 0x11
#define B_BE_WMAC_SPEC_SIFS_CCK_MASK GENMASK(7, 0)
#define R_BE_TRXPTCL_RESP_1 0x11008
#define R_BE_TRXPTCL_RESP_1_C1 0x15008
#define B_BE_WMAC_RESP_SR_MODE_EN BIT(31)
#define B_BE_FTM_RRSR_RATE_EN_MASK GENMASK(28, 24)
#define B_BE_NESS_MASK GENMASK(23, 22)
#define B_BE_WMAC_RESP_DOPPLEB_BE_EN BIT(21)
#define B_BE_WMAC_RESP_DCM_EN BIT(20)
#define B_BE_WMAC_CLR_ABORT_RESP_TX_CNT BIT(15)
#define B_BE_WMAC_RESP_REF_RATE_SEL BIT(12)
#define B_BE_WMAC_RESP_REF_RATE_MASK GENMASK(11, 0)
#define R_BE_MAC_LOOPBACK 0x11020
#define R_BE_MAC_LOOPBACK_C1 0x15020
#define B_BE_MACLBK_DIS_GCLK BIT(30)
#define B_BE_MACLBK_STS_EN BIT(29)
#define B_BE_MACLBK_RDY_PERIOD_MASK GENMASK(28, 17)
#define B_BE_MACLBK_PLCP_DLY_MASK GENMASK(16, 8)
#define S_BE_MACLBK_PLCP_DLY_DEF 0x28
#define B_BE_MACLBK_RDY_NUM_MASK GENMASK(7, 3)
#define B_BE_MACLBK_EN BIT(0)
#define R_BE_WMAC_NAV_CTL 0x11080
#define R_BE_WMAC_NAV_CTL_C1 0x15080
#define B_BE_WMAC_NAV_UPPER_EN BIT(26)
#define B_BE_WMAC_0P125US_TIMER_MASK GENMASK(25, 18)
#define B_BE_WMAC_PLCP_UP_NAV_EN BIT(17)
#define B_BE_WMAC_TF_UP_NAV_EN BIT(16)
#define B_BE_WMAC_NAV_UPPER_MASK GENMASK(15, 8)
#define NAV_25MS 0xC4
#define B_BE_WMAC_RTS_RST_DUR_MASK GENMASK(7, 0)
#define R_BE_RXTRIG_TEST_USER_2 0x110B0
#define R_BE_RXTRIG_TEST_USER_2_C1 0x150B0
#define B_BE_RXTRIG_MACID_MASK GENMASK(31, 24)
#define B_BE_RXTRIG_RU26_DIS BIT(21)
#define B_BE_RXTRIG_FCSCHK_EN BIT(20)
#define B_BE_RXTRIG_PORT_SEL_MASK GENMASK(19, 17)
#define B_BE_RXTRIG_EN BIT(16)
#define B_BE_RXTRIG_USERINFO_2_MASK GENMASK(15, 0)
#define R_BE_TRXPTCL_ERROR_INDICA_MASK 0x110BC
#define R_BE_TRXPTCL_ERROR_INDICA_MASK_C1 0x150BC
#define B_BE_WMAC_FTM_TIMEOUT_MODE BIT(30)
@ -6526,6 +6898,103 @@
#define B_BE_BFMEE_HT_CSI_RATE_MASK GENMASK(7, 0)
#define CSI_INIT_RATE_EHT 0x3
#define R_BE_WMAC_ACK_BA_RESP_LEGACY 0x11200
#define R_BE_WMAC_ACK_BA_RESP_LEGACY_C1 0x15200
#define B_BE_ACK_BA_RESP_LEGACY_CHK_NSTR BIT(16)
#define B_BE_ACK_BA_RESP_LEGACY_CHK_TX_NAV BIT(15)
#define B_BE_ACK_BA_RESP_LEGACY_CHK_INTRA_NAV BIT(14)
#define B_BE_ACK_BA_RESP_LEGACY_CHK_BASIC_NAV BIT(13)
#define B_BE_ACK_BA_RESP_LEGACY_CHK_BTCCA BIT(12)
#define B_BE_ACK_BA_RESP_LEGACY_CHK_SEC_EDCCA160 BIT(11)
#define B_BE_ACK_BA_RESP_LEGACY_CHK_SEC_EDCCA80 BIT(10)
#define B_BE_ACK_BA_RESP_LEGACY_CHK_SEC_EDCCA40 BIT(9)
#define B_BE_ACK_BA_RESP_LEGACY_CHK_SEC_EDCCA20 BIT(8)
#define B_BE_ACK_BA_RESP_LEGACY_CHK_EDCCA_PER20_BMP BIT(7)
#define B_BE_ACK_BA_RESP_LEGACY_CHK_CCA_PER20_BMP BIT(6)
#define B_BE_ACK_BA_RESP_LEGACY_CHK_SEC_CCA160 BIT(5)
#define B_BE_ACK_BA_RESP_LEGACY_CHK_SEC_CCA80 BIT(4)
#define B_BE_ACK_BA_RESP_LEGACY_CHK_SEC_CCA40 BIT(3)
#define B_BE_ACK_BA_RESP_LEGACY_CHK_SEC_CCA20 BIT(2)
#define B_BE_ACK_BA_RESP_LEGACY_CHK_EDCCA BIT(1)
#define B_BE_ACK_BA_RESP_LEGACY_CHK_CCA BIT(0)
#define R_BE_WMAC_ACK_BA_RESP_HE 0x11204
#define R_BE_WMAC_ACK_BA_RESP_HE_C1 0x15204
#define B_BE_ACK_BA_RESP_HE_CHK_NSTR BIT(16)
#define B_BE_ACK_BA_RESP_HE_CHK_TX_NAV BIT(15)
#define B_BE_ACK_BA_RESP_HE_CHK_INTRA_NAV BIT(14)
#define B_BE_ACK_BA_RESP_HE_CHK_BASIC_NAV BIT(13)
#define B_BE_ACK_BA_RESP_HE_CHK_BTCCA BIT(12)
#define B_BE_ACK_BA_RESP_HE_CHK_SEC_EDCCA160 BIT(11)
#define B_BE_ACK_BA_RESP_HE_CHK_SEC_EDCCA80 BIT(10)
#define B_BE_ACK_BA_RESP_HE_CHK_SEC_EDCCA40 BIT(9)
#define B_BE_ACK_BA_RESP_HE_CHK_SEC_EDCCA20 BIT(8)
#define B_BE_ACK_BA_RESP_HE_CHK_EDCCA_PER20_BMP BIT(7)
#define B_BE_ACK_BA_RESP_HE_CHK_CCA_PER20_BMP BIT(6)
#define B_BE_ACK_BA_RESP_HE_CHK_SEC_CCA160 BIT(5)
#define B_BE_ACK_BA_RESP_HE_CHK_SEC_CCA80 BIT(4)
#define B_BE_ACK_BA_RESP_HE_CHK_SEC_CCA40 BIT(3)
#define B_BE_ACK_BA_RESP_HE_CHK_SEC_CCA20 BIT(2)
#define B_BE_ACK_BA_RESP_HE_CHK_EDCCA BIT(1)
#define B_BE_ACK_BA_RESP_HE_CHK_CCA BIT(0)
#define R_BE_WMAC_ACK_BA_RESP_EHT_LEG_PUNC 0x11208
#define R_BE_WMAC_ACK_BA_RESP_EHT_LEG_PUNC_C1 0x15208
#define B_BE_ACK_BA_EHT_LEG_PUNC_CHK_NSTR BIT(16)
#define B_BE_ACK_BA_EHT_LEG_PUNC_CHK_TX_NAV BIT(15)
#define B_BE_ACK_BA_EHT_LEG_PUNC_CHK_INTRA_NAV BIT(14)
#define B_BE_ACK_BA_EHT_LEG_PUNC_CHK_BASIC_NAV BIT(13)
#define B_BE_ACK_BA_EHT_LEG_PUNC_CHK_BTCCA BIT(12)
#define B_BE_ACK_BA_EHT_LEG_PUNC_CHK_SEC_EDCCA160 BIT(11)
#define B_BE_ACK_BA_EHT_LEG_PUNC_CHK_SEC_EDCCA80 BIT(10)
#define B_BE_ACK_BA_EHT_LEG_PUNC_CHK_SEC_EDCCA40 BIT(9)
#define B_BE_ACK_BA_EHT_LEG_PUNC_CHK_SEC_EDCCA20 BIT(8)
#define B_BE_ACK_BA_EHT_LEG_PUNC_CHK_EDCCA_PER20_BMP BIT(7)
#define B_BE_ACK_BA_EHT_LEG_PUNC_CHK_CCA_PER20_BMP BIT(6)
#define B_BE_ACK_BA_EHT_LEG_PUNC_CHK_SEC_CCA160 BIT(5)
#define B_BE_ACK_BA_EHT_LEG_PUNC_CHK_SEC_CCA80 BIT(4)
#define B_BE_ACK_BA_EHT_LEG_PUNC_CHK_SEC_CCA40 BIT(3)
#define B_BE_ACK_BA_EHT_LEG_PUNC_CHK_SEC_CCA20 BIT(2)
#define B_BE_ACK_BA_EHT_LEG_PUNC_CHK_EDCCA BIT(1)
#define B_BE_ACK_BA_EHT_LEG_PUNC_CHK_CCA BIT(0)
#define R_BE_RCR 0x11400
#define R_BE_RCR_C1 0x15400
#define B_BE_BUSY_CHKSN BIT(15)
#define B_BE_DYN_CHEN BIT(14)
#define B_BE_AUTO_RST BIT(13)
#define B_BE_TIMER_SEL BIT(12)
#define B_BE_STOP_RX_IN BIT(11)
#define B_BE_PSR_RDY_CHKDIS BIT(10)
#define B_BE_DRV_INFO_SZ_MASK GENMASK(9, 8)
#define B_BE_HDR_CNV_SZ_MASK GENMASK(7, 6)
#define B_BE_PHY_RPT_SZ_MASK GENMASK(5, 4)
#define B_BE_CH_EN BIT(0)
#define R_BE_DLK_PROTECT_CTL 0x11402
#define R_BE_DLK_PROTECT_CTL_C1 0x15402
#define B_BE_RX_DLK_CCA_TIME_MASK GENMASK(15, 8)
#define TRXCFG_RMAC_CCA_TO 32
#define B_BE_RX_DLK_DATA_TIME_MASK GENMASK(7, 4)
#define TRXCFG_RMAC_DATA_TO 15
#define B_BE_RX_DLK_RST_FSM BIT(3)
#define B_BE_RX_DLK_RST_SKIPDMA BIT(2)
#define B_BE_RX_DLK_RST_EN BIT(1)
#define B_BE_RX_DLK_INT_EN BIT(0)
#define R_BE_PLCP_HDR_FLTR 0x11404
#define R_BE_PLCP_HDR_FLTR_C1 0x15404
#define B_BE_PLCP_RXFA_RESET_TYPE_MASK GENMASK(15, 12)
#define B_BE_PLCP_RXFA_RESET_EN BIT(11)
#define B_BE_DIS_CHK_MIN_LEN BIT(8)
#define B_BE_HE_SIGB_CRC_CHK BIT(6)
#define B_BE_VHT_MU_SIGB_CRC_CHK BIT(5)
#define B_BE_VHT_SU_SIGB_CRC_CHK BIT(4)
#define B_BE_SIGA_CRC_CHK BIT(3)
#define B_BE_LSIG_PARITY_CHK_EN BIT(2)
#define B_BE_CCK_SIG_CHK BIT(1)
#define B_BE_CCK_CRC_CHK BIT(0)
#define R_BE_RX_FLTR_OPT 0x11420
#define R_BE_RX_FLTR_OPT_C1 0x15420
#define B_BE_UID_FILTER_MASK GENMASK(31, 24)
@ -6545,6 +7014,55 @@
#define B_BE_A_A1_MATCH BIT(1)
#define B_BE_SNIFFER_MODE BIT(0)
#define R_BE_CTRL_FLTR 0x11424
#define R_BE_CTRL_FLTR_C1 0x15424
#define B_BE_CTRL_STYPE_MASK GENMASK(15, 0)
#define RX_FLTR_FRAME_DROP_BE 0x0000
#define RX_FLTR_FRAME_ACCEPT_BE 0xFFFF
#define R_BE_MGNT_FLTR 0x11428
#define R_BE_MGNT_FLTR_C1 0x15428
#define B_BE_MGNT_STYPE_MASK GENMASK(15, 0)
#define R_BE_DATA_FLTR 0x1142C
#define R_BE_DATA_FLTR_C1 0x1542C
#define B_BE_DATA_STYPE_MASK GENMASK(15, 0)
#define R_BE_ADDR_CAM_CTRL 0x11434
#define R_BE_ADDR_CAM_CTRL_C1 0x15434
#define B_BE_ADDR_CAM_RANGE_MASK GENMASK(23, 16)
#define ADDR_CAM_SERCH_RANGE 0x7f
#define B_BE_ADDR_CAM_CMPLIMT_MASK GENMASK(15, 12)
#define B_BE_ADDR_CAM_IORST BIT(10)
#define B_BE_DIS_ADDR_CLK_GATED BIT(9)
#define B_BE_ADDR_CAM_CLR BIT(8)
#define B_BE_ADDR_CAM_A2_B0_CHK BIT(2)
#define B_BE_ADDR_CAM_SRCH_PERPKT BIT(1)
#define B_BE_ADDR_CAM_EN BIT(0)
#define R_BE_RESPBA_CAM_CTRL 0x1143C
#define R_BE_RESPBA_CAM_CTRL_C1 0x1543C
#define B_BE_BACAM_SKIP_ALL_QOSNULL BIT(24)
#define B_BE_BACAM_STD_SSN_SEL BIT(20)
#define B_BE_BACAM_TEMP_SZ_MASK GENMASK(17, 16)
#define B_BE_BACAM_RST_IDX_MASK GENMASK(15, 8)
#define B_BE_BACAM_SHIFT_POLL BIT(7)
#define B_BE_BACAM_IORST BIT(6)
#define B_BE_BACAM_GCK_DIS BIT(5)
#define B_BE_COMPL_VAL BIT(3)
#define B_BE_SSN_SEL BIT(2)
#define B_BE_BACAM_RST_MASK GENMASK(1, 0)
#define S_BE_BACAM_RST_DONE 0
#define S_BE_BACAM_RST_ENT 1
#define S_BE_BACAM_RST_ALL 2
#define R_BE_RX_SR_CTRL 0x1144A
#define R_BE_RX_SR_CTRL_C1 0x1544A
#define B_BE_SR_OP_MODE_MASK GENMASK(5, 4)
#define B_BE_SRG_CHK_EN BIT(2)
#define B_BE_SR_CTRL_PLCP_EN BIT(1)
#define B_BE_SR_EN BIT(0)
#define R_BE_CSIRPT_OPTION 0x11464
#define R_BE_CSIRPT_OPTION_C1 0x15464
#define B_BE_CSIPRT_EHTSU_AID_EN BIT(26)
@ -6590,6 +7108,29 @@
B_BE_RX_ERR_STS_ACT_TO_MSK | \
B_BE_RX_ERR_TRIG_ACT_TO_MSK)
#define R_BE_RX_PLCP_EXT_OPTION_1 0x11514
#define R_BE_RX_PLCP_EXT_OPTION_1_C1 0x15514
#define B_BE_PLCP_CLOSE_RX_UNSPUUORT BIT(19)
#define B_BE_PLCP_CLOSE_RX_BB_BRK BIT(18)
#define B_BE_PLCP_CLOSE_RX_PSDU_PRES BIT(17)
#define B_BE_PLCP_CLOSE_RX_NDP BIT(16)
#define B_BE_PLCP_NSS_SRC BIT(11)
#define B_BE_PLCP_DOPPLEB_BE_SRC BIT(10)
#define B_BE_PLCP_STBC_SRC BIT(9)
#define B_BE_PLCP_SU_PSDU_LEN_SRC BIT(8)
#define B_BE_PLCP_RXSB_SRC BIT(7)
#define B_BE_PLCP_BW_SRC_MASK GENMASK(6, 5)
#define B_BE_PLCP_GILTF_SRC BIT(4)
#define B_BE_PLCP_NSTS_SRC BIT(3)
#define B_BE_PLCP_MCS_SRC BIT(2)
#define B_BE_PLCP_CH20_WIDATA_SRC BIT(1)
#define B_BE_PLCP_PPDU_TYPE_SRC BIT(0)
#define R_BE_RESP_CSI_RESERVED_PAGE 0x11810
#define R_BE_RESP_CSI_RESERVED_PAGE_C1 0x15810
#define B_BE_CSI_RESERVED_PAGE_NUM_MASK GENMASK(27, 16)
#define B_BE_CSI_RESERVED_START_PAGE_MASK GENMASK(11, 0)
#define R_BE_RESP_IMR 0x11884
#define R_BE_RESP_IMR_C1 0x15884
#define B_BE_RESP_TBL_FLAG_ERR_ISR_EN BIT(17)

25
drivers/net/wireless/virtual/mac80211_hwsim.c
View File

@ -190,10 +190,25 @@ static const struct ieee80211_regdomain hwsim_world_regdom_custom_03 = {
}
};
static const struct ieee80211_regdomain hwsim_world_regdom_custom_04 = {
.n_reg_rules = 6,
.alpha2 = "99",
.reg_rules = {
REG_RULE(2412 - 10, 2462 + 10, 40, 0, 20, 0),
REG_RULE(2484 - 10, 2484 + 10, 40, 0, 20, 0),
REG_RULE(5150 - 10, 5240 + 10, 80, 0, 30, 0),
REG_RULE(5260 - 10, 5320 + 10, 80, 0, 30,
NL80211_RRF_DFS_CONCURRENT | NL80211_RRF_DFS),
REG_RULE(5745 - 10, 5825 + 10, 80, 0, 30, 0),
REG_RULE(5855 - 10, 5925 + 10, 80, 0, 33, 0),
}
};
static const struct ieee80211_regdomain *hwsim_world_regdom_custom[] = {
&hwsim_world_regdom_custom_01,
&hwsim_world_regdom_custom_02,
&hwsim_world_regdom_custom_03,
&hwsim_world_regdom_custom_04,
};
struct hwsim_vif_priv {
@ -4029,6 +4044,8 @@ static const struct ieee80211_sband_iftype_data sband_capa_2ghz[] = {
IEEE80211_HE_MAC_CAP3_OMI_CONTROL |
IEEE80211_HE_MAC_CAP3_MAX_AMPDU_LEN_EXP_EXT_3,
.mac_cap_info[4] = IEEE80211_HE_MAC_CAP4_AMSDU_IN_AMPDU,
.phy_cap_info[0] =
IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_IN_2G,
.phy_cap_info[1] =
IEEE80211_HE_PHY_CAP1_PREAMBLE_PUNC_RX_MASK |
IEEE80211_HE_PHY_CAP1_DEVICE_CLASS_A |
@ -4134,6 +4151,8 @@ static const struct ieee80211_sband_iftype_data sband_capa_2ghz[] = {
IEEE80211_HE_MAC_CAP3_OMI_CONTROL |
IEEE80211_HE_MAC_CAP3_MAX_AMPDU_LEN_EXP_EXT_3,
.mac_cap_info[4] = IEEE80211_HE_MAC_CAP4_AMSDU_IN_AMPDU,
.phy_cap_info[0] =
IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_IN_2G,
.phy_cap_info[1] =
IEEE80211_HE_PHY_CAP1_PREAMBLE_PUNC_RX_MASK |
IEEE80211_HE_PHY_CAP1_DEVICE_CLASS_A |
@ -4237,6 +4256,8 @@ static const struct ieee80211_sband_iftype_data sband_capa_2ghz[] = {
IEEE80211_HE_MAC_CAP3_OMI_CONTROL |
IEEE80211_HE_MAC_CAP3_MAX_AMPDU_LEN_EXP_EXT_3,
.mac_cap_info[4] = IEEE80211_HE_MAC_CAP4_AMSDU_IN_AMPDU,
.phy_cap_info[0] =
IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_IN_2G,
.phy_cap_info[1] =
IEEE80211_HE_PHY_CAP1_PREAMBLE_PUNC_RX_MASK |
IEEE80211_HE_PHY_CAP1_DEVICE_CLASS_A |
@ -5288,6 +5309,10 @@ static int mac80211_hwsim_new_radio(struct genl_info *info,
schedule_timeout_interruptible(1);
}
/* TODO: Add param */
wiphy_ext_feature_set(hw->wiphy,
NL80211_EXT_FEATURE_DFS_CONCURRENT);
if (param->no_vif)
ieee80211_hw_set(hw, NO_AUTO_VIF);

1
include/linux/ieee80211.h
View File

@ -2720,6 +2720,7 @@ static inline bool ieee80211_he_capa_size_ok(const u8 *data, u8 len)
#define IEEE80211_6GHZ_CTRL_REG_LPI_AP 0
#define IEEE80211_6GHZ_CTRL_REG_SP_AP 1
#define IEEE80211_6GHZ_CTRL_REG_VLP_AP 2
/**
* struct ieee80211_he_6ghz_oper - HE 6 GHz operation Information field

46
include/net/cfg80211.h
View File

@ -117,6 +117,11 @@ struct wiphy;
* This may be due to the driver or due to regulatory bandwidth
* restrictions.
* @IEEE80211_CHAN_NO_EHT: EHT operation is not permitted on this channel.
* @IEEE80211_CHAN_DFS_CONCURRENT: See %NL80211_RRF_DFS_CONCURRENT
* @IEEE80211_CHAN_NO_UHB_VLP_CLIENT: Client connection with VLP AP
* not permitted using this channel
* @IEEE80211_CHAN_NO_UHB_AFC_CLIENT: Client connection with AFC AP
* not permitted using this channel
*/
enum ieee80211_channel_flags {
IEEE80211_CHAN_DISABLED = 1<<0,
@ -140,6 +145,9 @@ enum ieee80211_channel_flags {
IEEE80211_CHAN_16MHZ = 1<<18,
IEEE80211_CHAN_NO_320MHZ = 1<<19,
IEEE80211_CHAN_NO_EHT = 1<<20,
IEEE80211_CHAN_DFS_CONCURRENT = 1<<21,
IEEE80211_CHAN_NO_UHB_VLP_CLIENT= 1<<22,
IEEE80211_CHAN_NO_UHB_AFC_CLIENT= 1<<23,
};
#define IEEE80211_CHAN_NO_HT40 \
@ -3225,8 +3233,8 @@ struct cfg80211_ibss_params {
*
* @behaviour: requested BSS selection behaviour.
* @param: parameters for requestion behaviour.
* @band_pref: preferred band for %NL80211_BSS_SELECT_ATTR_BAND_PREF.
* @adjust: parameters for %NL80211_BSS_SELECT_ATTR_RSSI_ADJUST.
* @param.band_pref: preferred band for %NL80211_BSS_SELECT_ATTR_BAND_PREF.
* @param.adjust: parameters for %NL80211_BSS_SELECT_ATTR_RSSI_ADJUST.
*/
struct cfg80211_bss_selection {
enum nl80211_bss_select_attr behaviour;
@ -6063,7 +6071,6 @@ void wiphy_delayed_work_flush(struct wiphy *wiphy,
* wireless device if it has no netdev
* @u: union containing data specific to @iftype
* @connected: indicates if connected or not (STA mode)
* @bssid: (private) Used by the internal configuration code
* @wext: (private) Used by the internal wireless extensions compat code
* @wext.ibss: (private) IBSS data part of wext handling
* @wext.connect: (private) connection handling data
@ -6083,8 +6090,6 @@ void wiphy_delayed_work_flush(struct wiphy *wiphy,
* @mgmt_registrations: list of registrations for management frames
* @mgmt_registrations_need_update: mgmt registrations were updated,
* need to propagate the update to the driver
* @beacon_interval: beacon interval used on this device for transmitting
* beacons, 0 when not valid
* @address: The address for this device, valid only if @netdev is %NULL
* @is_running: true if this is a non-netdev device that has been started, e.g.
* the P2P Device.
@ -7165,6 +7170,23 @@ enum cfg80211_bss_frame_type {
int cfg80211_get_ies_channel_number(const u8 *ie, size_t ielen,
enum nl80211_band band);
/**
* cfg80211_ssid_eq - compare two SSIDs
* @a: first SSID
* @b: second SSID
*
* Return: %true if SSIDs are equal, %false otherwise.
*/
static inline bool
cfg80211_ssid_eq(struct cfg80211_ssid *a, struct cfg80211_ssid *b)
{
if (WARN_ON(!a || !b))
return false;
if (a->ssid_len != b->ssid_len)
return false;
return memcmp(a->ssid, b->ssid, a->ssid_len) ? false : true;
}
/**
* cfg80211_inform_bss_data - inform cfg80211 of a new BSS
*
@ -7346,8 +7368,6 @@ void cfg80211_auth_timeout(struct net_device *dev, const u8 *addr);
/**
* struct cfg80211_rx_assoc_resp_data - association response data
* @bss: the BSS that association was requested with, ownership of the pointer
* moves to cfg80211 in the call to cfg80211_rx_assoc_resp()
* @buf: (Re)Association Response frame (header + body)
* @len: length of the frame data
* @uapsd_queues: bitmap of queues configured for uapsd. Same format
@ -7357,6 +7377,8 @@ void cfg80211_auth_timeout(struct net_device *dev, const u8 *addr);
* @ap_mld_addr: AP MLD address (in case of MLO)
* @links: per-link information indexed by link ID, use links[0] for
* non-MLO connections
* @links.bss: the BSS that association was requested with, ownership of the
* pointer moves to cfg80211 in the call to cfg80211_rx_assoc_resp()
* @links.status: Set this (along with a BSS pointer) for links that
* were rejected by the AP.
*/
@ -9375,6 +9397,16 @@ bool cfg80211_valid_disable_subchannel_bitmap(u16 *bitmap,
*/
void cfg80211_links_removed(struct net_device *dev, u16 link_mask);
/**
* cfg80211_schedule_channels_check - schedule regulatory check if needed
* @wdev: the wireless device to check
*
* In case the device supports NO_IR or DFS relaxations, schedule regulatory
* channels check, as previous concurrent operation conditions may not
* hold anymore.
*/
void cfg80211_schedule_channels_check(struct wireless_dev *wdev);
#ifdef CONFIG_CFG80211_DEBUGFS
/**
* wiphy_locked_debugfs_read - do a locked read in debugfs

38
include/net/mac80211.h
View File

@ -476,9 +476,9 @@ struct ieee80211_ba_event {
/**
* struct ieee80211_event - event to be sent to the driver
* @type: The event itself. See &enum ieee80211_event_type.
* @rssi: relevant if &type is %RSSI_EVENT
* @mlme: relevant if &type is %AUTH_EVENT
* @ba: relevant if &type is %BAR_RX_EVENT or %BA_FRAME_TIMEOUT
* @u.rssi: relevant if &type is %RSSI_EVENT
* @u.mlme: relevant if &type is %AUTH_EVENT
* @u.ba: relevant if &type is %BAR_RX_EVENT or %BA_FRAME_TIMEOUT
* @u:union holding the fields above
*/
struct ieee80211_event {
@ -541,8 +541,6 @@ struct ieee80211_fils_discovery {
* @link_id: link ID, or 0 for non-MLO
* @htc_trig_based_pkt_ext: default PE in 4us units, if BSS supports HE
* @uora_exists: is the UORA element advertised by AP
* @ack_enabled: indicates support to receive a multi-TID that solicits either
* ACK, BACK or both
* @uora_ocw_range: UORA element's OCW Range field
* @frame_time_rts_th: HE duration RTS threshold, in units of 32us
* @he_support: does this BSS support HE
@ -1150,11 +1148,6 @@ ieee80211_rate_get_vht_nss(const struct ieee80211_tx_rate *rate)
* @ack: union part for pure ACK data
* @ack.cookie: cookie for the ACK
* @driver_data: array of driver_data pointers
* @ampdu_ack_len: number of acked aggregated frames.
* relevant only if IEEE80211_TX_STAT_AMPDU was set.
* @ampdu_len: number of aggregated frames.
* relevant only if IEEE80211_TX_STAT_AMPDU was set.
* @ack_signal: signal strength of the ACK frame
*/
struct ieee80211_tx_info {
/* common information */
@ -1362,6 +1355,9 @@ ieee80211_tx_info_clear_status(struct ieee80211_tx_info *info)
* the frame.
* @RX_FLAG_FAILED_PLCP_CRC: Set this flag if the PCLP check failed on
* the frame.
* @RX_FLAG_MACTIME: The timestamp passed in the RX status (@mactime
* field) is valid if this field is non-zero, and the position
* where the timestamp was sampled depends on the value.
* @RX_FLAG_MACTIME_START: The timestamp passed in the RX status (@mactime
* field) is valid and contains the time the first symbol of the MPDU
* was received. This is useful in monitor mode and for proper IBSS
@ -1371,6 +1367,11 @@ ieee80211_tx_info_clear_status(struct ieee80211_tx_info *info)
* (including FCS) was received.
* @RX_FLAG_MACTIME_PLCP_START: The timestamp passed in the RX status (@mactime
* field) is valid and contains the time the SYNC preamble was received.
* @RX_FLAG_MACTIME_IS_RTAP_TS64: The timestamp passed in the RX status @mactime
* is only for use in the radiotap timestamp header, not otherwise a valid
* @mactime value. Note this is a separate flag so that we continue to see
* %RX_FLAG_MACTIME as unset. Also note that in this case the timestamp is
* reported to be 64 bits wide, not just 32.
* @RX_FLAG_NO_SIGNAL_VAL: The signal strength value is not present.
* Valid only for data frames (mainly A-MPDU)
* @RX_FLAG_AMPDU_DETAILS: A-MPDU details are known, in particular the reference
@ -1441,12 +1442,12 @@ ieee80211_tx_info_clear_status(struct ieee80211_tx_info *info)
enum mac80211_rx_flags {
RX_FLAG_MMIC_ERROR = BIT(0),
RX_FLAG_DECRYPTED = BIT(1),
RX_FLAG_MACTIME_PLCP_START = BIT(2),
RX_FLAG_ONLY_MONITOR = BIT(2),
RX_FLAG_MMIC_STRIPPED = BIT(3),
RX_FLAG_IV_STRIPPED = BIT(4),
RX_FLAG_FAILED_FCS_CRC = BIT(5),
RX_FLAG_FAILED_PLCP_CRC = BIT(6),
RX_FLAG_MACTIME_START = BIT(7),
RX_FLAG_MACTIME_IS_RTAP_TS64 = BIT(7),
RX_FLAG_NO_SIGNAL_VAL = BIT(8),
RX_FLAG_AMPDU_DETAILS = BIT(9),
RX_FLAG_PN_VALIDATED = BIT(10),
@ -1455,8 +1456,10 @@ enum mac80211_rx_flags {
RX_FLAG_AMPDU_IS_LAST = BIT(13),
RX_FLAG_AMPDU_DELIM_CRC_ERROR = BIT(14),
RX_FLAG_AMPDU_DELIM_CRC_KNOWN = BIT(15),
RX_FLAG_MACTIME_END = BIT(16),
RX_FLAG_ONLY_MONITOR = BIT(17),
RX_FLAG_MACTIME = BIT(16) | BIT(17),
RX_FLAG_MACTIME_PLCP_START = 1 << 16,
RX_FLAG_MACTIME_START = 2 << 16,
RX_FLAG_MACTIME_END = 3 << 16,
RX_FLAG_SKIP_MONITOR = BIT(18),
RX_FLAG_AMSDU_MORE = BIT(19),
RX_FLAG_RADIOTAP_TLV_AT_END = BIT(20),
@ -2835,8 +2838,6 @@ enum ieee80211_hw_flags {
* the default is _GI | _BANDWIDTH.
* Use the %IEEE80211_RADIOTAP_VHT_KNOWN_\* values.
*
* @radiotap_he: HE radiotap validity flags
*
* @radiotap_timestamp: Information for the radiotap timestamp field; if the
* @units_pos member is set to a non-negative value then the timestamp
* field will be added and populated from the &struct ieee80211_rx_status
@ -4271,6 +4272,8 @@ struct ieee80211_prep_tx_info {
* disable background CAC/radar detection.
* @net_fill_forward_path: Called from .ndo_fill_forward_path in order to
* resolve a path for hardware flow offloading
* @can_activate_links: Checks if a specific active_links bitmap is
* supported by the driver.
* @change_vif_links: Change the valid links on an interface, note that while
* removing the old link information is still valid (link_conf pointer),
* but may immediately disappear after the function returns. The old or
@ -4651,6 +4654,9 @@ struct ieee80211_ops {
struct ieee80211_sta *sta,
struct net_device_path_ctx *ctx,
struct net_device_path *path);
bool (*can_activate_links)(struct ieee80211_hw *hw,
struct ieee80211_vif *vif,
u16 active_links);
int (*change_vif_links)(struct ieee80211_hw *hw,
struct ieee80211_vif *vif,
u16 old_links, u16 new_links,

29
include/uapi/linux/nl80211.h
View File

@ -4256,6 +4256,14 @@ enum nl80211_wmm_rule {
* in current regulatory domain.
* @NL80211_FREQUENCY_ATTR_PSD: Power spectral density (in dBm) that
* is allowed on this channel in current regulatory domain.
* @NL80211_FREQUENCY_ATTR_DFS_CONCURRENT: Operation on this channel is
* allowed for peer-to-peer or adhoc communication under the control
* of a DFS master which operates on the same channel (FCC-594280 D01
* Section B.3). Should be used together with %NL80211_RRF_DFS only.
* @NL80211_FREQUENCY_ATTR_NO_UHB_VLP_CLIENT: Client connection to VLP AP
* not allowed using this channel
* @NL80211_FREQUENCY_ATTR_NO_UHB_AFC_CLIENT: Client connection to AFC AP
* not allowed using this channel
* @NL80211_FREQUENCY_ATTR_MAX: highest frequency attribute number
* currently defined
* @__NL80211_FREQUENCY_ATTR_AFTER_LAST: internal use
@ -4295,6 +4303,9 @@ enum nl80211_frequency_attr {
NL80211_FREQUENCY_ATTR_NO_320MHZ,
NL80211_FREQUENCY_ATTR_NO_EHT,
NL80211_FREQUENCY_ATTR_PSD,
NL80211_FREQUENCY_ATTR_DFS_CONCURRENT,
NL80211_FREQUENCY_ATTR_NO_UHB_VLP_CLIENT,
NL80211_FREQUENCY_ATTR_NO_UHB_AFC_CLIENT,
/* keep last */
__NL80211_FREQUENCY_ATTR_AFTER_LAST,
@ -4500,6 +4511,12 @@ enum nl80211_sched_scan_match_attr {
* @NL80211_RRF_NO_320MHZ: 320MHz operation not allowed
* @NL80211_RRF_NO_EHT: EHT operation not allowed
* @NL80211_RRF_PSD: Ruleset has power spectral density value
* @NL80211_RRF_DFS_CONCURRENT: Operation on this channel is allowed for
peer-to-peer or adhoc communication under the control of a DFS master
which operates on the same channel (FCC-594280 D01 Section B.3).
Should be used together with %NL80211_RRF_DFS only.
* @NL80211_RRF_NO_UHB_VLP_CLIENT: Client connection to VLP AP not allowed
* @NL80211_RRF_NO_UHB_AFC_CLIENT: Client connection to AFC AP not allowed
*/
enum nl80211_reg_rule_flags {
NL80211_RRF_NO_OFDM = 1<<0,
@ -4521,6 +4538,9 @@ enum nl80211_reg_rule_flags {
NL80211_RRF_NO_320MHZ = 1<<18,
NL80211_RRF_NO_EHT = 1<<19,
NL80211_RRF_PSD = 1<<20,
NL80211_RRF_DFS_CONCURRENT = 1<<21,
NL80211_RRF_NO_UHB_VLP_CLIENT = 1<<22,
NL80211_RRF_NO_UHB_AFC_CLIENT = 1<<23,
};
#define NL80211_RRF_PASSIVE_SCAN NL80211_RRF_NO_IR
@ -5076,9 +5096,12 @@ enum nl80211_bss_use_for {
* BSS isn't possible
* @NL80211_BSS_CANNOT_USE_NSTR_NONPRIMARY: NSTR nonprimary links aren't
* supported by the device, and this BSS entry represents one.
* @NL80211_BSS_CANNOT_USE_UHB_PWR_MISMATCH: STA is not supporting
* the AP power type (SP, VLP, AP) that the AP uses.
*/
enum nl80211_bss_cannot_use_reasons {
NL80211_BSS_CANNOT_USE_NSTR_NONPRIMARY = 1 << 0,
NL80211_BSS_CANNOT_USE_UHB_PWR_MISMATCH = 1 << 1,
};
/**
@ -6492,6 +6515,11 @@ enum nl80211_feature_flags {
* @NL80211_EXT_FEATURE_OWE_OFFLOAD_AP: Driver/Device wants to do OWE DH IE
* handling in AP mode.
*
* @NL80211_EXT_FEATURE_DFS_CONCURRENT: The device supports peer-to-peer or
* ad hoc operation on DFS channels under the control of a concurrent
* DFS master on the same channel as described in FCC-594280 D01
* (Section B.3). This, for example, allows P2P GO and P2P clients to
* operate on DFS channels as long as there's a concurrent BSS connection.
* @NUM_NL80211_EXT_FEATURES: number of extended features.
* @MAX_NL80211_EXT_FEATURES: highest extended feature index.
*/
@ -6565,6 +6593,7 @@ enum nl80211_ext_feature_index {
NL80211_EXT_FEATURE_AUTH_AND_DEAUTH_RANDOM_TA,
NL80211_EXT_FEATURE_OWE_OFFLOAD,
NL80211_EXT_FEATURE_OWE_OFFLOAD_AP,
NL80211_EXT_FEATURE_DFS_CONCURRENT,
/* add new features before the definition below */
NUM_NL80211_EXT_FEATURES,

20
net/mac80211/driver-ops.h
View File

@ -1666,6 +1666,26 @@ static inline int drv_net_setup_tc(struct ieee80211_local *local,
return ret;
}
static inline bool drv_can_activate_links(struct ieee80211_local *local,
struct ieee80211_sub_if_data *sdata,
u16 active_links)
{
bool ret = true;
lockdep_assert_wiphy(local->hw.wiphy);
if (!check_sdata_in_driver(sdata))
return false;
trace_drv_can_activate_links(local, sdata, active_links);
if (local->ops->can_activate_links)
ret = local->ops->can_activate_links(&local->hw, &sdata->vif,
active_links);
trace_drv_return_bool(local, ret);
return ret;
}
int drv_change_vif_links(struct ieee80211_local *local,
struct ieee80211_sub_if_data *sdata,
u16 old_links, u16 new_links,

6
net/mac80211/ieee80211_i.h
View File

@ -439,6 +439,7 @@ struct ieee80211_mgd_assoc_data {
bool need_beacon;
bool synced;
bool timeout_started;
bool comeback; /* whether the AP has requested association comeback */
bool s1g;
unsigned int assoc_link_id;
@ -1775,10 +1776,7 @@ static inline bool txq_has_queue(struct ieee80211_txq *txq)
static inline bool
ieee80211_have_rx_timestamp(struct ieee80211_rx_status *status)
{
WARN_ON_ONCE(status->flag & RX_FLAG_MACTIME_START &&
status->flag & RX_FLAG_MACTIME_END);
return !!(status->flag & (RX_FLAG_MACTIME_START | RX_FLAG_MACTIME_END |
RX_FLAG_MACTIME_PLCP_START));
return status->flag & RX_FLAG_MACTIME;
}
void ieee80211_vif_inc_num_mcast(struct ieee80211_sub_if_data *sdata);

3
net/mac80211/link.c
View File

@ -444,6 +444,9 @@ int ieee80211_set_active_links(struct ieee80211_vif *vif, u16 active_links)
lockdep_assert_wiphy(local->hw.wiphy);
if (!drv_can_activate_links(local, sdata, active_links))
return -EINVAL;
old_active = sdata->vif.active_links;
if (old_active & active_links) {
/*

61
net/mac80211/mlme.c
View File

@ -43,6 +43,9 @@
#define IEEE80211_ASSOC_TIMEOUT_SHORT (HZ / 10)
#define IEEE80211_ASSOC_MAX_TRIES 3
#define IEEE80211_ADV_TTLM_SAFETY_BUFFER_MS msecs_to_jiffies(100)
#define IEEE80211_ADV_TTLM_ST_UNDERFLOW 0xff00
static int max_nullfunc_tries = 2;
module_param(max_nullfunc_tries, int, 0644);
MODULE_PARM_DESC(max_nullfunc_tries,
@ -598,6 +601,7 @@ static int ieee80211_config_bw(struct ieee80211_link_data *link,
return ret;
}
cfg80211_schedule_channels_check(&sdata->wdev);
return 0;
}
@ -5381,6 +5385,7 @@ static void ieee80211_rx_mgmt_assoc_resp(struct ieee80211_sub_if_data *sdata,
assoc_data->ap_addr, tu, ms);
assoc_data->timeout = jiffies + msecs_to_jiffies(ms);
assoc_data->timeout_started = true;
assoc_data->comeback = true;
if (ms > IEEE80211_ASSOC_TIMEOUT)
run_again(sdata, assoc_data->timeout);
goto notify_driver;
@ -5964,6 +5969,13 @@ ieee80211_parse_adv_t2l(struct ieee80211_sub_if_data *sdata,
pos++;
ttlm_info->switch_time = get_unaligned_le16(pos);
/* Since ttlm_info->switch_time == 0 means no switch time, bump it
* by 1.
*/
if (!ttlm_info->switch_time)
ttlm_info->switch_time = 1;
pos += 2;
if (control & IEEE80211_TTLM_CONTROL_EXPECTED_DUR_PRESENT) {
@ -6058,25 +6070,46 @@ static void ieee80211_process_adv_ttlm(struct ieee80211_sub_if_data *sdata,
}
if (ttlm_info.switch_time) {
u32 st_us, delay = 0;
u32 ts_l26 = beacon_ts & GENMASK(25, 0);
u16 beacon_ts_tu, st_tu, delay;
u32 delay_jiffies;
u64 mask;
/* The t2l map switch time is indicated with a partial
* TSF value, convert it to TSF and calc the delay
* to the start time.
* TSF value (bits 10 to 25), get the partial beacon TS
* as well, and calc the delay to the start time.
*/
st_us = ieee80211_tu_to_usec(ttlm_info.switch_time);
if (st_us > ts_l26)
delay = st_us - ts_l26;
mask = GENMASK_ULL(25, 10);
beacon_ts_tu = (beacon_ts & mask) >> 10;
st_tu = ttlm_info.switch_time;
delay = st_tu - beacon_ts_tu;
/*
* If the switch time is far in the future, then it
* could also be the previous switch still being
* announced.
* We can simply ignore it for now, if it is a future
* switch the AP will continue to announce it anyway.
*/
if (delay > IEEE80211_ADV_TTLM_ST_UNDERFLOW)
return;
delay_jiffies = TU_TO_JIFFIES(delay);
/* Link switching can take time, so schedule it
* 100ms before to be ready on time
*/
if (delay_jiffies > IEEE80211_ADV_TTLM_SAFETY_BUFFER_MS)
delay_jiffies -=
IEEE80211_ADV_TTLM_SAFETY_BUFFER_MS;
else
continue;
delay_jiffies = 0;
sdata->u.mgd.ttlm_info = ttlm_info;
wiphy_delayed_work_cancel(sdata->local->hw.wiphy,
&sdata->u.mgd.ttlm_work);
wiphy_delayed_work_queue(sdata->local->hw.wiphy,
&sdata->u.mgd.ttlm_work,
usecs_to_jiffies(delay));
delay_jiffies);
return;
}
}
@ -6720,8 +6753,18 @@ void ieee80211_sta_work(struct ieee80211_sub_if_data *sdata)
}
ifmgd->auth_data->timeout_started = true;
} else if (ifmgd->assoc_data &&
!ifmgd->assoc_data->comeback &&
(ieee80211_is_assoc_req(fc) ||
ieee80211_is_reassoc_req(fc))) {
/*
* Update association timeout based on the TX status
* for the (Re)Association Request frame. Skip this if
* we have already processed a (Re)Association Response
* frame that indicated need for association comeback
* at a specific time in the future. This could happen
* if the TX status information is delayed enough for
* the response to be received and processed first.
*/
if (status_acked) {
ifmgd->assoc_data->timeout =
jiffies + IEEE80211_ASSOC_TIMEOUT_SHORT;

13
net/mac80211/rx.c
View File

@ -566,7 +566,8 @@ ieee80211_add_rx_radiotap_header(struct ieee80211_local *local,
if (local->hw.radiotap_timestamp.units_pos >= 0) {
u16 accuracy = 0;
u8 flags = IEEE80211_RADIOTAP_TIMESTAMP_FLAG_32BIT;
u8 flags;
u64 ts;
rthdr->it_present |=
cpu_to_le32(BIT(IEEE80211_RADIOTAP_TIMESTAMP));
@ -575,7 +576,15 @@ ieee80211_add_rx_radiotap_header(struct ieee80211_local *local,
while ((pos - (u8 *)rthdr) & 7)
pos++;
put_unaligned_le64(status->device_timestamp, pos);
if (status->flag & RX_FLAG_MACTIME_IS_RTAP_TS64) {
flags = IEEE80211_RADIOTAP_TIMESTAMP_FLAG_64BIT;
ts = status->mactime;
} else {
flags = IEEE80211_RADIOTAP_TIMESTAMP_FLAG_32BIT;
ts = status->device_timestamp;
}
put_unaligned_le64(ts, pos);
pos += sizeof(u64);
if (local->hw.radiotap_timestamp.accuracy >= 0) {

25
net/mac80211/trace.h
View File

@ -2512,6 +2512,31 @@ TRACE_EVENT(drv_net_setup_tc,
)
);
TRACE_EVENT(drv_can_activate_links,
TP_PROTO(struct ieee80211_local *local,
struct ieee80211_sub_if_data *sdata,
u16 active_links),
TP_ARGS(local, sdata, active_links),
TP_STRUCT__entry(
LOCAL_ENTRY
VIF_ENTRY
__field(u16, active_links)
),
TP_fast_assign(
LOCAL_ASSIGN;
VIF_ASSIGN;
__entry->active_links = active_links;
),
TP_printk(
LOCAL_PR_FMT VIF_PR_FMT " requested active_links:0x%04x\n",
LOCAL_PR_ARG, VIF_PR_ARG, __entry->active_links
)
);
TRACE_EVENT(drv_change_vif_links,
TP_PROTO(struct ieee80211_local *local,
struct ieee80211_sub_if_data *sdata,

16
net/mac80211/util.c
View File

@ -4176,6 +4176,7 @@ u64 ieee80211_calculate_rx_timestamp(struct ieee80211_local *local,
unsigned int mpdu_offset)
{
u64 ts = status->mactime;
bool mactime_plcp_start;
struct rate_info ri;
u16 rate;
u8 n_ltf;
@ -4183,6 +4184,9 @@ u64 ieee80211_calculate_rx_timestamp(struct ieee80211_local *local,
if (WARN_ON(!ieee80211_have_rx_timestamp(status)))
return 0;
mactime_plcp_start = (status->flag & RX_FLAG_MACTIME) ==
RX_FLAG_MACTIME_PLCP_START;
memset(&ri, 0, sizeof(ri));
ri.bw = status->bw;
@ -4197,7 +4201,7 @@ u64 ieee80211_calculate_rx_timestamp(struct ieee80211_local *local,
if (status->enc_flags & RX_ENC_FLAG_SHORT_GI)
ri.flags |= RATE_INFO_FLAGS_SHORT_GI;
/* TODO/FIXME: is this right? handle other PPDUs */
if (status->flag & RX_FLAG_MACTIME_PLCP_START) {
if (mactime_plcp_start) {
mpdu_offset += 2;
ts += 36;
}
@ -4214,7 +4218,7 @@ u64 ieee80211_calculate_rx_timestamp(struct ieee80211_local *local,
* See P802.11ax_D6.0, section 27.3.4 for
* VHT PPDU format.
*/
if (status->flag & RX_FLAG_MACTIME_PLCP_START) {
if (mactime_plcp_start) {
mpdu_offset += 2;
ts += 36;
@ -4238,7 +4242,7 @@ u64 ieee80211_calculate_rx_timestamp(struct ieee80211_local *local,
* See P802.11REVmd_D3.0, section 19.3.2 for
* HT PPDU format.
*/
if (status->flag & RX_FLAG_MACTIME_PLCP_START) {
if (mactime_plcp_start) {
mpdu_offset += 2;
if (status->enc_flags & RX_ENC_FLAG_HT_GF)
ts += 24;
@ -4266,7 +4270,7 @@ u64 ieee80211_calculate_rx_timestamp(struct ieee80211_local *local,
* See P802.11REVmd_D3.0, section 21.3.2 for
* VHT PPDU format.
*/
if (status->flag & RX_FLAG_MACTIME_PLCP_START) {
if (mactime_plcp_start) {
mpdu_offset += 2;
ts += 36;
@ -4288,7 +4292,7 @@ u64 ieee80211_calculate_rx_timestamp(struct ieee80211_local *local,
sband = local->hw.wiphy->bands[status->band];
ri.legacy = sband->bitrates[status->rate_idx].bitrate;
if (status->flag & RX_FLAG_MACTIME_PLCP_START) {
if (mactime_plcp_start) {
if (status->band == NL80211_BAND_5GHZ) {
ts += 20;
mpdu_offset += 2;
@ -4310,7 +4314,7 @@ u64 ieee80211_calculate_rx_timestamp(struct ieee80211_local *local,
return 0;
/* rewind from end of MPDU */
if (status->flag & RX_FLAG_MACTIME_END)
if ((status->flag & RX_FLAG_MACTIME) == RX_FLAG_MACTIME_END)
ts -= mpdu_len * 8 * 10 / rate;
ts += mpdu_offset * 8 * 10 / rate;

94
net/wireless/chan.c
View File

@ -515,9 +515,83 @@ static u32 cfg80211_get_end_freq(u32 center_freq,
return end_freq;
}
static bool
cfg80211_dfs_permissive_check_wdev(struct cfg80211_registered_device *rdev,
enum nl80211_iftype iftype,
struct wireless_dev *wdev,
struct ieee80211_channel *chan)
{
unsigned int link_id;
for_each_valid_link(wdev, link_id) {
struct ieee80211_channel *other_chan = NULL;
struct cfg80211_chan_def chandef = {};
int ret;
/* In order to avoid daisy chaining only allow BSS STA */
if (wdev->iftype != NL80211_IFTYPE_STATION ||
!wdev->links[link_id].client.current_bss)
continue;
other_chan =
wdev->links[link_id].client.current_bss->pub.channel;
if (!other_chan)
continue;
if (chan == other_chan)
return true;
/* continue if we can't get the channel */
ret = rdev_get_channel(rdev, wdev, link_id, &chandef);
if (ret)
continue;
if (cfg80211_is_sub_chan(&chandef, chan, false))
return true;
}
return false;
}
/*
* Check if P2P GO is allowed to operate on a DFS channel
*/
static bool cfg80211_dfs_permissive_chan(struct wiphy *wiphy,
enum nl80211_iftype iftype,
struct ieee80211_channel *chan)
{
struct wireless_dev *wdev;
struct cfg80211_registered_device *rdev = wiphy_to_rdev(wiphy);
lockdep_assert_held(&rdev->wiphy.mtx);
if (!wiphy_ext_feature_isset(&rdev->wiphy,
NL80211_EXT_FEATURE_DFS_CONCURRENT) ||
!(chan->flags & IEEE80211_CHAN_DFS_CONCURRENT))
return false;
/* only valid for P2P GO */
if (iftype != NL80211_IFTYPE_P2P_GO)
return false;
/*
* Allow only if there's a concurrent BSS
*/
list_for_each_entry(wdev, &rdev->wiphy.wdev_list, list) {
bool ret = cfg80211_dfs_permissive_check_wdev(rdev, iftype,
wdev, chan);
if (ret)
return ret;
}
return false;
}
static int cfg80211_get_chans_dfs_required(struct wiphy *wiphy,
u32 center_freq,
u32 bandwidth)
u32 bandwidth,
enum nl80211_iftype iftype)
{
struct ieee80211_channel *c;
u32 freq, start_freq, end_freq;
@ -530,9 +604,11 @@ static int cfg80211_get_chans_dfs_required(struct wiphy *wiphy,
if (!c)
return -EINVAL;
if (c->flags & IEEE80211_CHAN_RADAR)
if (c->flags & IEEE80211_CHAN_RADAR &&
!cfg80211_dfs_permissive_chan(wiphy, iftype, c))
return 1;
}
return 0;
}
@ -558,7 +634,7 @@ int cfg80211_chandef_dfs_required(struct wiphy *wiphy,
ret = cfg80211_get_chans_dfs_required(wiphy,
ieee80211_chandef_to_khz(chandef),
width);
width, iftype);
if (ret < 0)
return ret;
else if (ret > 0)
@ -569,7 +645,7 @@ int cfg80211_chandef_dfs_required(struct wiphy *wiphy,
ret = cfg80211_get_chans_dfs_required(wiphy,
MHZ_TO_KHZ(chandef->center_freq2),
width);
width, iftype);
if (ret < 0)
return ret;
else if (ret > 0)
@ -1337,15 +1413,19 @@ static bool _cfg80211_reg_can_beacon(struct wiphy *wiphy,
bool check_no_ir)
{
bool res;
u32 prohibited_flags = IEEE80211_CHAN_DISABLED |
IEEE80211_CHAN_RADAR;
u32 prohibited_flags = IEEE80211_CHAN_DISABLED;
int dfs_required;
trace_cfg80211_reg_can_beacon(wiphy, chandef, iftype, check_no_ir);
if (check_no_ir)
prohibited_flags |= IEEE80211_CHAN_NO_IR;
if (cfg80211_chandef_dfs_required(wiphy, chandef, iftype) > 0 &&
dfs_required = cfg80211_chandef_dfs_required(wiphy, chandef, iftype);
if (dfs_required != 0)
prohibited_flags |= IEEE80211_CHAN_RADAR;
if (dfs_required > 0 &&
cfg80211_chandef_dfs_available(wiphy, chandef)) {
/* We can skip IEEE80211_CHAN_NO_IR if chandef dfs available */
prohibited_flags = IEEE80211_CHAN_DISABLED;

24
net/wireless/nl80211.c
View File

@ -1201,6 +1201,15 @@ static int nl80211_msg_put_channel(struct sk_buff *msg, struct wiphy *wiphy,
if ((chan->flags & IEEE80211_CHAN_NO_EHT) &&
nla_put_flag(msg, NL80211_FREQUENCY_ATTR_NO_EHT))
goto nla_put_failure;
if ((chan->flags & IEEE80211_CHAN_DFS_CONCURRENT) &&
nla_put_flag(msg, NL80211_FREQUENCY_ATTR_DFS_CONCURRENT))
goto nla_put_failure;
if ((chan->flags & IEEE80211_CHAN_NO_UHB_VLP_CLIENT) &&
nla_put_flag(msg, NL80211_FREQUENCY_ATTR_NO_UHB_VLP_CLIENT))
goto nla_put_failure;
if ((chan->flags & IEEE80211_CHAN_NO_UHB_AFC_CLIENT) &&
nla_put_flag(msg, NL80211_FREQUENCY_ATTR_NO_UHB_AFC_CLIENT))
goto nla_put_failure;
}
if (nla_put_u32(msg, NL80211_FREQUENCY_ATTR_MAX_TX_POWER,
@ -19471,6 +19480,7 @@ void cfg80211_ch_switch_notify(struct net_device *dev,
break;
}
cfg80211_schedule_channels_check(wdev);
cfg80211_sched_dfs_chan_update(rdev);
nl80211_ch_switch_notify(rdev, dev, link_id, chandef, GFP_KERNEL,
@ -20228,6 +20238,20 @@ nla_put_failure:
}
EXPORT_SYMBOL(cfg80211_update_owe_info_event);
void cfg80211_schedule_channels_check(struct wireless_dev *wdev)
{
struct wiphy *wiphy = wdev->wiphy;
/* Schedule channels check if NO_IR or DFS relaxations are supported */
if (wdev->iftype == NL80211_IFTYPE_STATION &&
(wiphy_ext_feature_isset(wiphy,
NL80211_EXT_FEATURE_DFS_CONCURRENT) ||
(IS_ENABLED(CONFIG_CFG80211_REG_RELAX_NO_IR) &&
wiphy->regulatory_flags & REGULATORY_ENABLE_RELAX_NO_IR)))
reg_check_channels();
}
EXPORT_SYMBOL(cfg80211_schedule_channels_check);
/* initialisation/exit functions */
int __init nl80211_init(void)

8
net/wireless/reg.c
View File

@ -1593,6 +1593,12 @@ static u32 map_regdom_flags(u32 rd_flags)
channel_flags |= IEEE80211_CHAN_NO_320MHZ;
if (rd_flags & NL80211_RRF_NO_EHT)
channel_flags |= IEEE80211_CHAN_NO_EHT;
if (rd_flags & NL80211_RRF_DFS_CONCURRENT)
channel_flags |= IEEE80211_CHAN_DFS_CONCURRENT;
if (rd_flags & NL80211_RRF_NO_UHB_VLP_CLIENT)
channel_flags |= IEEE80211_CHAN_NO_UHB_VLP_CLIENT;
if (rd_flags & NL80211_RRF_NO_UHB_AFC_CLIENT)
channel_flags |= IEEE80211_CHAN_NO_UHB_AFC_CLIENT;
if (rd_flags & NL80211_RRF_PSD)
channel_flags |= IEEE80211_CHAN_PSD;
return channel_flags;
@ -2478,7 +2484,7 @@ static void reg_check_chans_work(struct work_struct *work)
rtnl_unlock();
}
static void reg_check_channels(void)
void reg_check_channels(void)
{
/*
* Give usermode a chance to do something nicer (move to another

5
net/wireless/reg.h
View File

@ -181,6 +181,11 @@ bool reg_dfs_domain_same(struct wiphy *wiphy1, struct wiphy *wiphy2);
*/
int reg_reload_regdb(void);
/**
* reg_check_channels - schedule regulatory enforcement
*/
void reg_check_channels(void);
extern const u8 shipped_regdb_certs[];
extern unsigned int shipped_regdb_certs_len;
extern const u8 extra_regdb_certs[];

79
net/wireless/scan.c
View File

@ -1818,15 +1818,15 @@ __cfg80211_bss_update(struct cfg80211_registered_device *rdev,
bool signal_valid, unsigned long ts)
{
struct cfg80211_internal_bss *found = NULL;
struct cfg80211_bss_ies *ies;
if (WARN_ON(!tmp->pub.channel))
return NULL;
goto free_ies;
tmp->ts = ts;
if (WARN_ON(!rcu_access_pointer(tmp->pub.ies))) {
return NULL;
}
if (WARN_ON(!rcu_access_pointer(tmp->pub.ies)))
goto free_ies;
found = rb_find_bss(rdev, tmp, BSS_CMP_REGULAR);
@ -1836,7 +1836,6 @@ __cfg80211_bss_update(struct cfg80211_registered_device *rdev,
} else {
struct cfg80211_internal_bss *new;
struct cfg80211_internal_bss *hidden;
struct cfg80211_bss_ies *ies;
/*
* create a copy -- the "res" variable that is passed in
@ -1845,15 +1844,8 @@ __cfg80211_bss_update(struct cfg80211_registered_device *rdev,
*/
new = kzalloc(sizeof(*new) + rdev->wiphy.bss_priv_size,
GFP_ATOMIC);
if (!new) {
ies = (void *)rcu_dereference(tmp->pub.beacon_ies);
if (ies)
kfree_rcu(ies, rcu_head);
ies = (void *)rcu_dereference(tmp->pub.proberesp_ies);
if (ies)
kfree_rcu(ies, rcu_head);
return NULL;
}
if (!new)
goto free_ies;
memcpy(new, tmp, sizeof(*new));
new->refcount = 1;
INIT_LIST_HEAD(&new->hidden_list);
@ -1871,8 +1863,12 @@ __cfg80211_bss_update(struct cfg80211_registered_device *rdev,
list_add(&new->hidden_list,
&hidden->hidden_list);
hidden->refcount++;
ies = (void *)rcu_dereference(new->pub.beacon_ies);
rcu_assign_pointer(new->pub.beacon_ies,
hidden->pub.beacon_ies);
if (ies)
kfree_rcu(ies, rcu_head);
}
} else {
/*
@ -1909,6 +1905,16 @@ __cfg80211_bss_update(struct cfg80211_registered_device *rdev,
bss_ref_get(rdev, found);
return found;
free_ies:
ies = (void *)rcu_dereference(tmp->pub.beacon_ies);
if (ies)
kfree_rcu(ies, rcu_head);
ies = (void *)rcu_dereference(tmp->pub.proberesp_ies);
if (ies)
kfree_rcu(ies, rcu_head);
return NULL;
}
struct cfg80211_internal_bss *
@ -2848,6 +2854,36 @@ cfg80211_inform_bss_data(struct wiphy *wiphy,
}
EXPORT_SYMBOL(cfg80211_inform_bss_data);
static bool cfg80211_uhb_power_type_valid(const u8 *ie,
size_t ielen,
const u32 flags)
{
const struct element *tmp;
struct ieee80211_he_operation *he_oper;
tmp = cfg80211_find_ext_elem(WLAN_EID_EXT_HE_OPERATION, ie, ielen);
if (tmp && tmp->datalen >= sizeof(*he_oper) + 1) {
const struct ieee80211_he_6ghz_oper *he_6ghz_oper;
he_oper = (void *)&tmp->data[1];
he_6ghz_oper = ieee80211_he_6ghz_oper(he_oper);
if (!he_6ghz_oper)
return false;
switch (u8_get_bits(he_6ghz_oper->control,
IEEE80211_HE_6GHZ_OPER_CTRL_REG_INFO)) {
case IEEE80211_6GHZ_CTRL_REG_LPI_AP:
return true;
case IEEE80211_6GHZ_CTRL_REG_SP_AP:
return !(flags & IEEE80211_CHAN_NO_UHB_AFC_CLIENT);
case IEEE80211_6GHZ_CTRL_REG_VLP_AP:
return !(flags & IEEE80211_CHAN_NO_UHB_VLP_CLIENT);
}
}
return false;
}
/* cfg80211_inform_bss_width_frame helper */
static struct cfg80211_bss *
cfg80211_inform_single_bss_frame_data(struct wiphy *wiphy,
@ -2906,6 +2942,14 @@ cfg80211_inform_single_bss_frame_data(struct wiphy *wiphy,
if (!channel)
return NULL;
if (channel->band == NL80211_BAND_6GHZ &&
!cfg80211_uhb_power_type_valid(variable, ielen, channel->flags)) {
data->restrict_use = 1;
data->use_for = 0;
data->cannot_use_reasons =
NL80211_BSS_CANNOT_USE_UHB_PWR_MISMATCH;
}
if (ext) {
const struct ieee80211_s1g_bcn_compat_ie *compat;
const struct element *elem;
@ -3150,10 +3194,9 @@ void cfg80211_update_assoc_bss_entry(struct wireless_dev *wdev,
if (new) {
/* to save time, update IEs for transmitting bss only */
if (cfg80211_update_known_bss(rdev, cbss, new, false)) {
new->pub.proberesp_ies = NULL;
new->pub.beacon_ies = NULL;
}
cfg80211_update_known_bss(rdev, cbss, new, false);
new->pub.proberesp_ies = NULL;
new->pub.beacon_ies = NULL;
list_for_each_entry_safe(nontrans_bss, tmp,
&new->pub.nontrans_list,

2
net/wireless/sme.c
View File

@ -1394,6 +1394,8 @@ void __cfg80211_disconnected(struct net_device *dev, const u8 *ie,
#endif
schedule_work(&cfg80211_disconnect_work);
cfg80211_schedule_channels_check(wdev);
}
void cfg80211_disconnected(struct net_device *dev, u16 reason,