ARM: dts: sunxi: Fix DE2 clocks register range
commit da180322582bd9db07f29e6d4a2d170afde0703f upstream. As it can be seen from DE2 manual, clock range is 0x10000. Fix it. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Fixes: 73f122c82775 ("ARM: dts: sun8i: a83t: Add display pipeline") Fixes: 05a43a262d03 ("ARM: dts: sun8i: r40: Add HDMI pipeline") Fixes: 21b299209330 ("ARM: sun8i: v3s: add device nodes for DE2 display pipeline") Fixes: d8c6f1f0295c ("ARM: sun8i: h3/h5: add DE2 CCU device node for H3") [wens@csie.org: added fixes tags] Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -313,7 +313,7 @@
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display_clocks: clock@1000000 {
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compatible = "allwinner,sun8i-a83t-de2-clk";
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reg = <0x01000000 0x100000>;
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reg = <0x01000000 0x10000>;
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clocks = <&ccu CLK_BUS_DE>,
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<&ccu CLK_PLL_DE>;
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clock-names = "bus",
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@ -118,7 +118,7 @@
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display_clocks: clock@1000000 {
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compatible = "allwinner,sun8i-r40-de2-clk",
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"allwinner,sun8i-h3-de2-clk";
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reg = <0x01000000 0x100000>;
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reg = <0x01000000 0x10000>;
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clocks = <&ccu CLK_BUS_DE>,
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<&ccu CLK_DE>;
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clock-names = "bus",
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@ -105,7 +105,7 @@
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display_clocks: clock@1000000 {
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compatible = "allwinner,sun8i-v3s-de2-clk";
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reg = <0x01000000 0x100000>;
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reg = <0x01000000 0x10000>;
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clocks = <&ccu CLK_BUS_DE>,
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<&ccu CLK_DE>;
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clock-names = "bus",
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@ -113,7 +113,7 @@
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display_clocks: clock@1000000 {
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/* compatible is in per SoC .dtsi file */
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reg = <0x01000000 0x100000>;
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reg = <0x01000000 0x10000>;
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clocks = <&ccu CLK_BUS_DE>,
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<&ccu CLK_DE>;
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clock-names = "bus",
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