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drm/i915: Extract intel_dbuf_mdclk_min_tracker_update()

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Extract the stuff that writes the dbuf/mbus ratio stuff
into its own function. Will help with correctly sequencing
the operations done during mbus programming.

Reviewed-by: Uma Shankar <uma.shankar@intel.com>
Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240402155016.13733-9-ville.syrjala@linux.intel.com
This commit is contained in:
Ville Syrjälä 2024-04-02 18:50:10 +03:00
parent 8d7fc2612e
commit a2e83f27cc
1 changed files with 25 additions and 18 deletions
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43
drivers/gpu/drm/i915/display/skl_watermark.c
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@ -3653,6 +3653,30 @@ void intel_dbuf_mdclk_cdclk_ratio_update(struct drm_i915_private *i915, u8 ratio
DBUF_MIN_TRACKER_STATE_SERVICE(ratio - 1));
}
static void intel_dbuf_mdclk_min_tracker_update(struct intel_atomic_state *state)
{
struct drm_i915_private *i915 = to_i915(state->base.dev);
const struct intel_dbuf_state *old_dbuf_state =
intel_atomic_get_old_dbuf_state(state);
const struct intel_dbuf_state *new_dbuf_state =
intel_atomic_get_new_dbuf_state(state);
if (DISPLAY_VER(i915) >= 20 &&
old_dbuf_state->mdclk_cdclk_ratio != new_dbuf_state->mdclk_cdclk_ratio) {
/*
* For Xe2LPD and beyond, when there is a change in the ratio
* between MDCLK and CDCLK, updates to related registers need to
* happen at a specific point in the CDCLK change sequence. In
* that case, we defer to the call to
* intel_dbuf_mdclk_cdclk_ratio_update() to the CDCLK logic.
*/
return;
}
intel_dbuf_mdclk_cdclk_ratio_update(i915, new_dbuf_state->mdclk_cdclk_ratio,
new_dbuf_state->joined_mbus);
}
static void intel_dbuf_mbus_join_update(struct intel_atomic_state *state)
{
struct drm_i915_private *i915 = to_i915(state->base.dev);
@ -3683,10 +3707,6 @@ static void intel_dbuf_mbus_join_update(struct intel_atomic_state *state)
static void update_mbus_pre_enable(struct intel_atomic_state *state)
{
struct drm_i915_private *i915 = to_i915(state->base.dev);
const struct intel_dbuf_state *old_dbuf_state =
intel_atomic_get_old_dbuf_state(state);
const struct intel_dbuf_state *new_dbuf_state =
intel_atomic_get_new_dbuf_state(state);
if (!HAS_MBUS_JOINING(i915))
return;
@ -3697,20 +3717,7 @@ static void update_mbus_pre_enable(struct intel_atomic_state *state)
*/
intel_dbuf_mbus_join_update(state);
if (DISPLAY_VER(i915) >= 20 &&
old_dbuf_state->mdclk_cdclk_ratio != new_dbuf_state->mdclk_cdclk_ratio) {
/*
* For Xe2LPD and beyond, when there is a change in the ratio
* between MDCLK and CDCLK, updates to related registers need to
* happen at a specific point in the CDCLK change sequence. In
* that case, we defer to the call to
* intel_dbuf_mdclk_cdclk_ratio_update() to the CDCLK logic.
*/
return;
}
intel_dbuf_mdclk_cdclk_ratio_update(i915, new_dbuf_state->mdclk_cdclk_ratio,
new_dbuf_state->joined_mbus);
intel_dbuf_mdclk_min_tracker_update(state);
}
void intel_dbuf_pre_plane_update(struct intel_atomic_state *state)