RISC-V SoC Kconfig Updates for v6.10
A few different bits of SoC-related Kconfig work. The first part of this is shared with the DT updates - the modification of all SOC_CANAAN users to SOC_CANAAN_K210 to split the existing m-mode nommu k210 away from the k230 that is able to be used in a "common" kernel. The other thing here is the removal of most of the SOC_VENDOR options, with their ARCH_VENDOR equivalents that've been waiting in the wings for 1 year+ now made visible. Due a lapse on my part when originally adding the ARCH_VENDOR stuff, the Microchip transition isn't complete - the _POLARFIRE was a mistake to keep as there's gonna be non-PolarFire RISC-V stuff from Microchip soonTM. Signed-off-by: Conor Dooley <conor.dooley@microchip.com> -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQRh246EGq/8RLhDjO14tDGHoIJi0gUCZjUIHwAKCRB4tDGHoIJi 0r8RAQD+B5rJde/sQuQlmkJGrmZfyE/6/I1ZFxv0/xHhRPNWRAD/RFTTDthL/7c4 frMGl/nWSD3fvGmXrQ7Dp6wc1APIdQI= =BWHh -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmY57kAACgkQYKtH/8kJ Uie0Sg/8D8tZVOtBrpVJG/P5F7W1QdcC336GHBMQCho38C0/4AK5ltvdyxmSxmCl k84qaLdYNrGIvJ5o6MRmSAZyzT3y3jLYVA8C2Zsrp+Do8KkvvJGl219pUvp5A0J3 eoMApJ34wx6dQM9LfpLcvU9C3Z767KeiiRm0h5CTV0IUfJnZB/7IQgwSajEGLOr/ CHtFZpbYK6VgCDgVhbacSY8495jJrIU4i5RDlILst5K64XrmS2UU2oen2L3X/u8h xi5nQ//3qCiIfp5UqvBY12OYF8lVzB+F/Uo9vDCpeF9HFiIE69qMgYJiSviCPbwH T54zue+oBPGfL57HQoMTYQGUG4GvlnW7JR841GsIlPjrs54uw2kXDZB586n3tqzN esAQCc/sNnCuUX9TYKKBzkIrmQ1oTPRdGO61r+lSgxjYQ/ed++eh6KStlbPmttVo piEaxSpLS7TOZcVOyXHFrWK6OR4yB6MD6ZvOGJlJKJZSdfMNTlGcoymiJ0j7hVQb QJSr3LaIfQMP+Uf5ZWWlNZIxvwxQKER8v6MbyH3vGAVYa+DnDBzaj9Fh364thJnt Uybpz7SDQMIugnB+uSe+D1o65XfTEKOn/OHXYEQVYyoWs63QfTE9012+Q4KqBFBQ 5ylIkvM9r3xMBkzZT3EU8lgr5gx9r5QQuX9czJ7INSBxo4SmuKE= =QGOJ -----END PGP SIGNATURE----- Merge tag 'riscv-config-for-v6.10' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux into soc/drivers RISC-V SoC Kconfig Updates for v6.10 A few different bits of SoC-related Kconfig work. The first part of this is shared with the DT updates - the modification of all SOC_CANAAN users to SOC_CANAAN_K210 to split the existing m-mode nommu k210 away from the k230 that is able to be used in a "common" kernel. The other thing here is the removal of most of the SOC_VENDOR options, with their ARCH_VENDOR equivalents that've been waiting in the wings for 1 year+ now made visible. Due a lapse on my part when originally adding the ARCH_VENDOR stuff, the Microchip transition isn't complete - the _POLARFIRE was a mistake to keep as there's gonna be non-PolarFire RISC-V stuff from Microchip soonTM. Signed-off-by: Conor Dooley <conor.dooley@microchip.com> * tag 'riscv-config-for-v6.10' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux: riscv: config: enable ARCH_CANAAN in defconfig RISC-V: drop SOC_VIRT for ARCH_VIRT RISC-V: drop SOC_SIFIVE for ARCH_SIFIVE RISC-V: drop SOC_MICROCHIP_POLARFIRE for ARCH_MICROCHIP RISC-V: Drop unused SOC_CANAAN reset: k210: Deprecate SOC_CANAAN and use SOC_CANAAN_K210 pinctrl: k210: Deprecate SOC_CANAAN and use SOC_CANAAN_K210 clk: k210: Deprecate SOC_CANAAN and use SOC_CANAAN_K210 soc: canaan: Deprecate SOC_CANAAN and use SOC_CANAAN_K210 for K210 riscv: Kconfig.socs: Split ARCH_CANAAN and SOC_CANAAN_K210 Link: https://lore.kernel.org/r/20240503-mardi-underling-3d81a9f97329@spud Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
commit
a3116c8881
@ -1,12 +1,12 @@
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menu "SoC selection"
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config ARCH_MICROCHIP_POLARFIRE
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def_bool SOC_MICROCHIP_POLARFIRE
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def_bool ARCH_MICROCHIP
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config SOC_MICROCHIP_POLARFIRE
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bool "Microchip PolarFire SoCs"
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config ARCH_MICROCHIP
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bool "Microchip SoCs"
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help
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This enables support for Microchip PolarFire SoC platforms.
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This enables support for Microchip SoC platforms.
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config ARCH_RENESAS
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bool "Renesas RISC-V SoCs"
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@ -14,9 +14,6 @@ config ARCH_RENESAS
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This enables support for the RISC-V based Renesas SoCs.
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config ARCH_SIFIVE
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def_bool SOC_SIFIVE
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config SOC_SIFIVE
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bool "SiFive SoCs"
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select ERRATA_SIFIVE if !XIP_KERNEL
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help
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@ -55,9 +52,6 @@ config ARCH_THEAD
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This enables support for the RISC-V based T-HEAD SoCs.
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config ARCH_VIRT
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def_bool SOC_VIRT
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config SOC_VIRT
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bool "QEMU Virt Machine"
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select CLINT_TIMER if RISCV_M_MODE
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select POWER_RESET
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@ -72,11 +66,13 @@ config SOC_VIRT
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This enables support for QEMU Virt Machine.
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config ARCH_CANAAN
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def_bool SOC_CANAAN
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bool "Canaan Kendryte SoC"
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help
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This enables support for Canaan Kendryte series SoC platform hardware.
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config SOC_CANAAN
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config SOC_CANAAN_K210
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bool "Canaan Kendryte K210 SoC"
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depends on !MMU
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depends on !MMU && ARCH_CANAAN
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select CLINT_TIMER if RISCV_M_MODE
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select ARCH_HAS_RESET_CONTROLLER
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select PINCTRL
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@ -154,7 +154,7 @@ vdso-install-y += arch/riscv/kernel/vdso/vdso.so.dbg
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vdso-install-$(CONFIG_COMPAT) += arch/riscv/kernel/compat_vdso/compat_vdso.so.dbg
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ifneq ($(CONFIG_XIP_KERNEL),y)
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ifeq ($(CONFIG_RISCV_M_MODE)$(CONFIG_ARCH_CANAAN),yy)
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ifeq ($(CONFIG_RISCV_M_MODE)$(CONFIG_SOC_CANAAN_K210),yy)
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KBUILD_IMAGE := $(boot)/loader.bin
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else
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ifeq ($(CONFIG_EFI_ZBOOT),)
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@ -25,14 +25,15 @@ CONFIG_BLK_DEV_INITRD=y
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CONFIG_EXPERT=y
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# CONFIG_SYSFS_SYSCALL is not set
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CONFIG_PROFILING=y
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CONFIG_SOC_MICROCHIP_POLARFIRE=y
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CONFIG_ARCH_MICROCHIP=y
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CONFIG_ARCH_RENESAS=y
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CONFIG_SOC_SIFIVE=y
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CONFIG_ARCH_SIFIVE=y
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CONFIG_ARCH_SOPHGO=y
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CONFIG_SOC_STARFIVE=y
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CONFIG_ARCH_SUNXI=y
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CONFIG_ARCH_THEAD=y
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CONFIG_SOC_VIRT=y
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CONFIG_ARCH_VIRT=y
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CONFIG_ARCH_CANAAN=y
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CONFIG_SMP=y
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CONFIG_HOTPLUG_CPU=y
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CONFIG_PM=y
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@ -27,7 +27,8 @@ CONFIG_EXPERT=y
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CONFIG_SLUB=y
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CONFIG_SLUB_TINY=y
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# CONFIG_MMU is not set
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CONFIG_SOC_CANAAN=y
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CONFIG_ARCH_CANAAN=y
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CONFIG_SOC_CANAAN_K210=y
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CONFIG_NONPORTABLE=y
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CONFIG_SMP=y
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CONFIG_NR_CPUS=2
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@ -19,7 +19,8 @@ CONFIG_EXPERT=y
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CONFIG_SLUB=y
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CONFIG_SLUB_TINY=y
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# CONFIG_MMU is not set
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CONFIG_SOC_CANAAN=y
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CONFIG_ARCH_CANAAN=y
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CONFIG_SOC_CANAAN_K210=y
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CONFIG_NONPORTABLE=y
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CONFIG_SMP=y
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CONFIG_NR_CPUS=2
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@ -24,7 +24,7 @@ CONFIG_EXPERT=y
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CONFIG_SLUB=y
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CONFIG_SLUB_TINY=y
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# CONFIG_MMU is not set
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CONFIG_SOC_VIRT=y
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CONFIG_ARCH_VIRT=y
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CONFIG_NONPORTABLE=y
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CONFIG_SMP=y
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CONFIG_CMDLINE="root=/dev/vda rw earlycon=uart8250,mmio,0x10000000,115200n8 console=ttyS0"
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@ -451,8 +451,8 @@ config COMMON_CLK_FIXED_MMIO
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config COMMON_CLK_K210
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bool "Clock driver for the Canaan Kendryte K210 SoC"
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depends on OF && RISCV && SOC_CANAAN
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default SOC_CANAAN
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depends on OF && RISCV && SOC_CANAAN_K210
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default SOC_CANAAN_K210
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help
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Support for the Canaan Kendryte K210 RISC-V SoC clocks.
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@ -235,13 +235,13 @@ config PINCTRL_INGENIC
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config PINCTRL_K210
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bool "Pinctrl driver for the Canaan Kendryte K210 SoC"
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depends on RISCV && SOC_CANAAN && OF
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depends on RISCV && SOC_CANAAN_K210 && OF
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select GENERIC_PINMUX_FUNCTIONS
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select GENERIC_PINCONF
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select GPIOLIB
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select OF_GPIO
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select REGMAP_MMIO
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default SOC_CANAAN
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default SOC_CANAAN_K210
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help
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Add support for the Canaan Kendryte K210 RISC-V SOC Field
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Programmable IO Array (FPIOA) controller.
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@ -103,9 +103,9 @@ config RESET_INTEL_GW
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config RESET_K210
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bool "Reset controller driver for Canaan Kendryte K210 SoC"
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depends on (SOC_CANAAN || COMPILE_TEST) && OF
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depends on (SOC_CANAAN_K210 || COMPILE_TEST) && OF
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select MFD_SYSCON
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default SOC_CANAAN
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default SOC_CANAAN_K210
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help
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Support for the Canaan Kendryte K210 RISC-V SoC reset controller.
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Say Y if you want to control reset signals provided by this
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@ -7,7 +7,7 @@ obj-y += apple/
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obj-y += aspeed/
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obj-$(CONFIG_ARCH_AT91) += atmel/
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obj-y += bcm/
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obj-$(CONFIG_SOC_CANAAN) += canaan/
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obj-$(CONFIG_ARCH_CANAAN) += canaan/
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obj-$(CONFIG_ARCH_DOVE) += dove/
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obj-$(CONFIG_MACH_DOVE) += dove/
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obj-y += fsl/
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@ -2,9 +2,9 @@
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config SOC_K210_SYSCTL
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bool "Canaan Kendryte K210 SoC system controller"
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depends on RISCV && SOC_CANAAN && OF
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depends on RISCV && SOC_CANAAN_K210 && OF
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depends on COMMON_CLK_K210
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default SOC_CANAAN
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default SOC_CANAAN_K210
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select PM
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select MFD_SYSCON
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help
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@ -13,7 +13,7 @@ if not os.path.isfile(OPENSBI_PATH):
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QEMU_ARCH = QemuArchParams(linux_arch='riscv',
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kconfig='''
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CONFIG_SOC_VIRT=y
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CONFIG_ARCH_VIRT=y
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CONFIG_SERIAL_8250=y
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CONFIG_SERIAL_8250_CONSOLE=y
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CONFIG_SERIAL_OF_PLATFORM=y
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@ -2,7 +2,7 @@ CONFIG_NONPORTABLE=y
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CONFIG_ARCH_RV32I=y
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CONFIG_MMU=y
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CONFIG_FPU=y
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CONFIG_SOC_VIRT=y
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CONFIG_ARCH_VIRT=y
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CONFIG_RISCV_ISA_FALLBACK=y
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CONFIG_SERIAL_8250=y
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CONFIG_SERIAL_8250_CONSOLE=y
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@ -1,7 +1,7 @@
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CONFIG_ARCH_RV64I=y
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CONFIG_MMU=y
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CONFIG_FPU=y
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CONFIG_SOC_VIRT=y
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CONFIG_ARCH_VIRT=y
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CONFIG_RISCV_ISA_FALLBACK=y
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CONFIG_SERIAL_8250=y
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CONFIG_SERIAL_8250_CONSOLE=y
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