MIPS: OCTEON: Consolidate the edge and level irq_chip structures.
We can consolidate octeon_irq_chip_ciu_edge and octeon_irq_chip_ciu as they only differ in the .irq_ack element, and that is unused by the level handler. This gets rid of a bunch of duplicate definitions. Signed-off-by: David Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3931/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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@ -729,18 +729,6 @@ static struct irq_chip octeon_irq_chip_ciu_v2 = {
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.name = "CIU",
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.irq_enable = octeon_irq_ciu_enable_v2,
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.irq_disable = octeon_irq_ciu_disable_all_v2,
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.irq_mask = octeon_irq_ciu_disable_local_v2,
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.irq_unmask = octeon_irq_ciu_enable_v2,
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#ifdef CONFIG_SMP
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.irq_set_affinity = octeon_irq_ciu_set_affinity_v2,
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.irq_cpu_offline = octeon_irq_cpu_offline_ciu,
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#endif
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};
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static struct irq_chip octeon_irq_chip_ciu_edge_v2 = {
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.name = "CIU-E",
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.irq_enable = octeon_irq_ciu_enable_v2,
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.irq_disable = octeon_irq_ciu_disable_all_v2,
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.irq_ack = octeon_irq_ciu_ack,
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.irq_mask = octeon_irq_ciu_disable_local_v2,
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.irq_unmask = octeon_irq_ciu_enable_v2,
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@ -754,19 +742,8 @@ static struct irq_chip octeon_irq_chip_ciu = {
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.name = "CIU",
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.irq_enable = octeon_irq_ciu_enable,
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.irq_disable = octeon_irq_ciu_disable_all,
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.irq_mask = octeon_irq_dummy_mask,
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#ifdef CONFIG_SMP
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.irq_set_affinity = octeon_irq_ciu_set_affinity,
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.irq_cpu_offline = octeon_irq_cpu_offline_ciu,
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#endif
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};
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static struct irq_chip octeon_irq_chip_ciu_edge = {
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.name = "CIU-E",
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.irq_enable = octeon_irq_ciu_enable,
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.irq_disable = octeon_irq_ciu_disable_all,
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.irq_mask = octeon_irq_dummy_mask,
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.irq_ack = octeon_irq_ciu_ack,
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.irq_mask = octeon_irq_dummy_mask,
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#ifdef CONFIG_SMP
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.irq_set_affinity = octeon_irq_ciu_set_affinity,
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.irq_cpu_offline = octeon_irq_cpu_offline_ciu,
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@ -993,7 +970,6 @@ static void __init octeon_irq_init_ciu(void)
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{
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unsigned int i;
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struct irq_chip *chip;
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struct irq_chip *chip_edge;
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struct irq_chip *chip_mbox;
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struct irq_chip *chip_wd;
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struct irq_chip *chip_gpio;
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@ -1008,7 +984,6 @@ static void __init octeon_irq_init_ciu(void)
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octeon_irq_ip2 = octeon_irq_ip2_v2;
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octeon_irq_ip3 = octeon_irq_ip3_v2;
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chip = &octeon_irq_chip_ciu_v2;
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chip_edge = &octeon_irq_chip_ciu_edge_v2;
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chip_mbox = &octeon_irq_chip_ciu_mbox_v2;
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chip_wd = &octeon_irq_chip_ciu_wd_v2;
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chip_gpio = &octeon_irq_chip_ciu_gpio_v2;
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@ -1016,7 +991,6 @@ static void __init octeon_irq_init_ciu(void)
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octeon_irq_ip2 = octeon_irq_ip2_v1;
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octeon_irq_ip3 = octeon_irq_ip3_v1;
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chip = &octeon_irq_chip_ciu;
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chip_edge = &octeon_irq_chip_ciu_edge;
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chip_mbox = &octeon_irq_chip_ciu_mbox;
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chip_wd = &octeon_irq_chip_ciu_wd;
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chip_gpio = &octeon_irq_chip_ciu_gpio;
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@ -1046,7 +1020,7 @@ static void __init octeon_irq_init_ciu(void)
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octeon_irq_set_ciu_mapping(OCTEON_IRQ_TWSI, 0, 45, chip, handle_level_irq);
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octeon_irq_set_ciu_mapping(OCTEON_IRQ_RML, 0, 46, chip, handle_level_irq);
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for (i = 0; i < 4; i++)
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octeon_irq_set_ciu_mapping(i + OCTEON_IRQ_TIMER0, 0, i + 52, chip_edge, handle_edge_irq);
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octeon_irq_set_ciu_mapping(i + OCTEON_IRQ_TIMER0, 0, i + 52, chip, handle_edge_irq);
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octeon_irq_set_ciu_mapping(OCTEON_IRQ_USB0, 0, 56, chip, handle_level_irq);
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octeon_irq_set_ciu_mapping(OCTEON_IRQ_TWSI2, 0, 59, chip, handle_level_irq);
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